From patchwork Wed Feb 25 21:01:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramamurthy X-Patchwork-Id: 443654 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E7417140111 for ; Thu, 26 Feb 2015 08:02:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752617AbbBYVCd (ORCPT ); Wed, 25 Feb 2015 16:02:33 -0500 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:42970 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752557AbbBYVCc (ORCPT ); Wed, 25 Feb 2015 16:02:32 -0500 X-IronPort-AV: E=Sophos;i="5.09,647,1418112000"; d="scan'208";a="58025586" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 25 Feb 2015 13:44:35 -0800 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Wed, 25 Feb 2015 13:02:30 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.174.1; Wed, 25 Feb 2015 13:02:30 -0800 Received: from lbrmn-lnxub64.broadcom.com (unknown [10.136.8.214]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 7B76F415DE; Wed, 25 Feb 2015 12:58:40 -0800 (PST) From: Arun Ramamurthy To: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , Kumar Gala , "Russell King" , Jean-Christophe Plagniol-Villard , Tomi Valkeinen CC: , , , Dmitry Torokhov , "Anatol Pomazau" , Jonathan Richardson , Scott Branden , Ray Jui , , Arun Ramamurthy Subject: [PATCH] video: ARM CLCD: Added dt support to set tim2 register Date: Wed, 25 Feb 2015 13:01:19 -0800 Message-ID: <1424898082-1522-1-git-send-email-arun.ramamurthy@broadcom.com> X-Mailer: git-send-email 2.3.0 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Added code based on linaro tree: http://git.linaro.org/kernel/linux-linaro-stable.git with commit id:6846e7822c4cab5a84672baace3b768c2d0db142 at drivers/video/amba-clcd.c. This lets the driver set certain tim2 register bits after reading them from device tree. Reviewed-by: Ray Jui Reviewed-by: Scott Branden Signed-off-by: Arun Ramamurthy --- .../devicetree/bindings/video/arm,pl11x.txt | 17 ++++++++- drivers/video/fbdev/amba-clcd.c | 41 ++++++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/video/arm,pl11x.txt b/Documentation/devicetree/bindings/video/arm,pl11x.txt index 3e3039a..14d6f87 100644 --- a/Documentation/devicetree/bindings/video/arm,pl11x.txt +++ b/Documentation/devicetree/bindings/video/arm,pl11x.txt @@ -35,6 +35,21 @@ Optional properties: cell's memory interface can handle; if not present, the memory interface is fast enough to handle all possible video modes +- tim2: Used to set certain bits in LCDTiming2 register. + It can be TIM2_CLKSEL or TIM2_IOE or both + + TIM2_CLKSEL: This bit drives the CLCDCLKSEL signal. It is the select + signal for the external LCD clock multiplexor. + + TIM2_IOE: Invert output enable: + 0 = CLAC output pin is active HIGH in TFT mode + 1 = CLAC output pin is active LOW in TFT mode. + This bit selects the active polarity of the output enable signal in + TFT mode. In this mode, the CLAC pin is an enable that indicates to + the LCD panel when valid display data is available. In active + display mode, data is driven onto the LCD data lines at the + programmed edge of CLCP when CLAC is in its active state. + Required sub-nodes: - port: describes LCD panel signals, following the common binding @@ -76,7 +91,7 @@ Example: clocks = <&oscclk1>, <&oscclk2>; clock-names = "clcdclk", "apb_pclk"; max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */ - + tim2 = "TIM2_CLKSEL"; port { clcd_pads: endpoint { remote-endpoint = <&clcd_panel>; diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c index 32c0b6b..4e4e50f 100644 --- a/drivers/video/fbdev/amba-clcd.c +++ b/drivers/video/fbdev/amba-clcd.c @@ -41,6 +41,44 @@ /* This is limited to 16 characters when displayed by X startup */ static const char *clcd_name = "CLCD FB"; +struct string_lookup { + const char *string; + const u32 val; +}; + +static const struct string_lookup tim2_lookups[] = { + { "TIM2_CLKSEL", TIM2_CLKSEL}, + { "TIM2_IOE", TIM2_IOE}, + { NULL, 0}, +}; + +static u32 parse_setting(const struct string_lookup *lookup, const char *name) +{ + int i = 0; + + while (lookup[i].string != NULL) { + if (strcmp(lookup[i].string, name) == 0) + return lookup[i].val; + ++i; + } + return 0; +} + +static u32 get_string_lookup(struct device_node *node, const char *name, + const struct string_lookup *lookup) +{ + const char *string; + int count, i; + u32 ret = 0; + + count = of_property_count_strings(node, name); + if (count >= 0) + for (i = 0; i < count; i++) + if (of_property_read_string_index(node, name, i, + &string) == 0) + ret |= parse_setting(lookup, string); + return ret; +} /* * Unfortunately, the enable/disable functions may be called either from * process or IRQ context, and we _need_ to delay. This is _not_ good. @@ -626,6 +664,9 @@ static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0) /* Bypass pixel clock divider, data output on the falling edge */ fb->panel->tim2 = TIM2_BCD | TIM2_IPC; + fb->panel->tim2 |= get_string_lookup(fb->dev->dev.of_node, + "tim2", tim2_lookups); + /* TFT display, vert. comp. interrupt at the start of the back porch */ fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);