From patchwork Thu Jan 29 07:20:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Danin X-Patchwork-Id: 434376 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 22D0314027C for ; Thu, 29 Jan 2015 18:28:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753495AbbA2H2T (ORCPT ); Thu, 29 Jan 2015 02:28:19 -0500 Received: from fallback7.mail.ru ([94.100.181.128]:45114 "EHLO fallback7.mail.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752807AbbA2H2S (ORCPT ); Thu, 29 Jan 2015 02:28:18 -0500 X-Greylist: delayed 317 seconds by postgrey-1.27 at vger.kernel.org; Thu, 29 Jan 2015 02:28:17 EST Received: from smtp47.i.mail.ru (smtp47.i.mail.ru [94.100.177.107]) by fallback7.mail.ru (mPOP.Fallback_MX) with ESMTP id E4BE012B569D5; Thu, 29 Jan 2015 10:23:12 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=E/l8xGfNPGVXNvx+TcPkabBCojC5VeJP9ZR3n70aAz4=; b=ksMZc52aMRhn2M1PArIcsXruuoNt89fxLOTRXSIyZOQcI3xd5oY6EDmQZ5JLyfsgog8JkO7EkQcT14wvVb8t4XlMvzj5eBb6MthiKU1r8E6sK0L0HrPGd07JR18ZRKN1BTJGqVIY1KpiK3m6yOyWCIu57T2UC9mW9MnSz40vd40=; Received: from [87.255.2.218] (port=5004 helo=localhost.localdomain) by smtp47.i.mail.ru with esmtpa (envelope-from ) id 1YGjR7-0000rV-0X; Thu, 29 Jan 2015 10:22:50 +0300 From: Andrey Danin To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, ac100@lists.launchpad.net Cc: Andrey Danin , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Stephen Warren , Thierry Reding , Alexandre Courbot , Marc Dietrich Subject: [PATCH 3/3] dt: paz00: define nvec as child of i2c bus Date: Thu, 29 Jan 2015 10:20:22 +0300 Message-Id: <1422516022-27161-4-git-send-email-danindrey@mail.ru> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1422516022-27161-1-git-send-email-danindrey@mail.ru> References: <1422516022-27161-1-git-send-email-danindrey@mail.ru> X-Spam: Not detected X-Mras: Ok Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org NVEC driver was reimplemented to use tegra i2c. Use common i2c bindings for NVEC node. Signed-off-by: Andrey Danin --- .../devicetree/bindings/nvec/nvidia,nvec.txt | 19 ++----------------- arch/arm/boot/dts/tegra20-paz00.dts | 22 +++++++++------------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt index 5ae601e..d82c125 100644 --- a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt +++ b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt @@ -2,20 +2,5 @@ NVIDIA compliant embedded controller Required properties: - compatible : should be "nvidia,nvec". -- reg : the iomem of the i2c slave controller -- interrupts : the interrupt line of the i2c slave controller -- clock-frequency : the frequency of the i2c bus -- gpios : the gpio used for ec request -- slave-addr: the i2c address of the slave controller -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names : Must include the following entries: - Tegra20/Tegra30: - - div-clk - - fast-clk - Tegra114: - - div-clk -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - i2c +- request-gpios : the gpio used for ec request +- reg: the i2c address of the slave controller diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index ed7e100..65e247b 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -288,20 +288,16 @@ clock-frequency = <100000>; }; - nvec@7000c500 { - compatible = "nvidia,nvec"; - reg = <0x7000c500 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; + i2c@7000c500 { + status = "okay"; clock-frequency = <80000>; - request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; - slave-addr = <138>; - clocks = <&tegra_car TEGRA20_CLK_I2C3>, - <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; - clock-names = "div-clk", "fast-clk"; - resets = <&tegra_car 67>; - reset-names = "i2c"; + + nvec: nvec@45 { + compatible = "nvidia,nvec"; + request-gpios = <&gpio TEGRA_GPIO(V, 2) + GPIO_ACTIVE_HIGH>; + reg = <0x45>; + }; }; i2c@7000d000 {