From patchwork Tue Nov 18 12:13:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomeu Vizoso X-Patchwork-Id: 412014 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45EEC14010F for ; Tue, 18 Nov 2014 23:25:45 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754412AbaKRMXX (ORCPT ); Tue, 18 Nov 2014 07:23:23 -0500 Received: from mail-wi0-f180.google.com ([209.85.212.180]:33921 "EHLO mail-wi0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754372AbaKRMXU (ORCPT ); Tue, 18 Nov 2014 07:23:20 -0500 Received: by mail-wi0-f180.google.com with SMTP id n3so5032433wiv.1 for ; Tue, 18 Nov 2014 04:23:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=SLSByI9p2npxZHjHgTWTYprv5bUu0JjQYLvCm/PQ74Q=; b=ZHyZLAL5U4JTaxuTCeapmPhQlVjK/SUtJqPgdqJpa3wTsPxkLrQT0ZBvi83kQhgSh0 sqjHOgjFfAj2P/ZuDezGcGoMEri70lz/UlzhkyL4cP98/iaD+D+cwcqNJX1LygAqarD7 GyKczFsco9nL1EZqXzKJ2fGhcDAJgSaaFOEPZ7eSAHa4A9wEEsDKgw+zRJ4JJKCcn6GQ zdT+KByW8w0VaMoLNkiKJEPLuofDlCrIgu8711fTMdCtMzO/vkB/MPaslG3Y1gzJUZcm bHjx+AFzxysSCSps/R6VgpwnAdb8lWHf4mkIb6G2DByGvQ8mZ3mbuISTPQ0qRrborXqj rIag== X-Received: by 10.181.13.102 with SMTP id ex6mr38740505wid.78.1416313399386; Tue, 18 Nov 2014 04:23:19 -0800 (PST) Received: from cizrna.lan (37-48-52-184.tmcz.cz. [37.48.52.184]) by mx.google.com with ESMTPSA id dg7sm7736396wib.24.2014.11.18.04.23.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Nov 2014 04:23:18 -0800 (PST) From: Tomeu Vizoso To: linux-tegra@vger.kernel.org Cc: Javier Martinez Canillas , mikko.perttunen@kapsi.fi, acourbot@nvidia.com, Tomeu Vizoso , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding , Alexandre Courbot , Peter De Schrijver , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 07/14] of: document external-memory-controller property in tegra124-car Date: Tue, 18 Nov 2014 13:13:09 +0100 Message-Id: <1416312860-4446-8-git-send-email-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1416312860-4446-1-git-send-email-tomeu.vizoso@collabora.com> References: <1416312860-4446-1-git-send-email-tomeu.vizoso@collabora.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This property contains a phandle to the EMC driver that is needed by the EMC clock to request the EMC driver to do its part of the clock change sequence. Signed-off-by: Tomeu Vizoso --- Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt index 2197ffd..a7000db 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt @@ -18,6 +18,7 @@ Required properties : - #reset-cells : Should be 1. In clock consumers, this cell represents the bit number in the CAR's array of CLK_RST_CONTROLLER_RST_DEVICES_* registers. +- nvidia,external-memory-controller : phandle of the EMC driver. The node should contain a "emc-timings" subnode for each supported RAM type (see field RAM_CODE in register PMC_STRAPPING_OPT_A). @@ -48,6 +49,7 @@ Example SoC include file: reg = <0x60006000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; + nvidia,external-memory-controller = <&emc>; }; usb@c5004000 {