diff mbox

[v4,04/13] of: document new emc-timings subnode in nvidia, tegra124-car

Message ID 1415779051-26410-5-git-send-email-tomeu.vizoso@collabora.com
State Superseded, archived
Headers show

Commit Message

Tomeu Vizoso Nov. 12, 2014, 7:56 a.m. UTC
The EMC clock needs some extra information for changing its rate.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>

---

v4:	* Remove comma from unit-address of CAR node in the example
	* Simplify reg property value in the example
---
 .../bindings/clock/nvidia,tegra124-car.txt         | 44 +++++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

Comments

Thierry Reding Nov. 12, 2014, 2:18 p.m. UTC | #1
On Wed, Nov 12, 2014 at 08:56:27AM +0100, Tomeu Vizoso wrote:
[...]
>  Example SoC include file:
>  
>  / {
> -	tegra_car: clock {
> +	tegra_car: clock@60006000 {
>  		compatible = "nvidia,tegra124-car";
>  		reg = <0x60006000 0x1000>;
>  		#clock-cells = <1>;
> @@ -60,4 +83,23 @@ Example board file:
>  	&tegra_car {
>  		clocks = <&clk_32k> <&osc>;
>  	};
> +
> +	clock@60006000 {
> +		emc-timings@3 {

Shouldn't this be following the same naming scheme as the memory
controller's subnodes?

> +			nvidia,ram-code = <3>;
> +
> +			timing@12750000 {

And this?

Thierry
Tomeu Vizoso Nov. 13, 2014, 9:36 a.m. UTC | #2
On 12 November 2014 15:18, Thierry Reding <thierry.reding@gmail.com> wrote:
> On Wed, Nov 12, 2014 at 08:56:27AM +0100, Tomeu Vizoso wrote:
> [...]
>>  Example SoC include file:
>>
>>  / {
>> -     tegra_car: clock {
>> +     tegra_car: clock@60006000 {
>>               compatible = "nvidia,tegra124-car";
>>               reg = <0x60006000 0x1000>;
>>               #clock-cells = <1>;
>> @@ -60,4 +83,23 @@ Example board file:
>>       &tegra_car {
>>               clocks = <&clk_32k> <&osc>;
>>       };
>> +
>> +     clock@60006000 {
>> +             emc-timings@3 {
>
> Shouldn't this be following the same naming scheme as the memory
> controller's subnodes?
>
>> +                     nvidia,ram-code = <3>;
>> +
>> +                     timing@12750000 {
>
> And this?

Thanks for pointing these out. My bad.

Regards,

Tomeu
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
index ded5d62..cab5cd7 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -19,10 +19,33 @@  Required properties :
   In clock consumers, this cell represents the bit number in the CAR's
   array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
+The node should contain a "emc-timings" subnode for each supported RAM type (see
+field RAM_CODE in register PMC_STRAPPING_OPT_A), with its unit address being its
+RAM_CODE.
+
+Required properties for "emc-timings" nodes :
+- nvidia,ram-code : Should contain the value of RAM_CODE this timing set
+  is used for.
+
+Each "emc-timings" node should contain a "timing" subnode for every supported
+EMC clock rate. The "timing" subnodes should have the clock rate in Hz as their
+unit address.
+
+Required properties for "timing" nodes :
+- clock-frequency : Should contain the memory clock rate to which this timing
+relates.
+- nvidia,parent-clock-frequency : Should contain the rate at which the current
+parent of the EMC clock should be running at this timing.
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names : Must include the following entries:
+  - emc-parent : the clock that should be the parent of the EMC clock at this
+timing.
+
 Example SoC include file:
 
 / {
-	tegra_car: clock {
+	tegra_car: clock@60006000 {
 		compatible = "nvidia,tegra124-car";
 		reg = <0x60006000 0x1000>;
 		#clock-cells = <1>;
@@ -60,4 +83,23 @@  Example board file:
 	&tegra_car {
 		clocks = <&clk_32k> <&osc>;
 	};
+
+	clock@60006000 {
+		emc-timings@3 {
+			nvidia,ram-code = <3>;
+
+			timing@12750000 {
+				clock-frequency = <12750000>;
+				nvidia,parent-clock-frequency = <408000000>;
+				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
+				clock-names = "emc-parent";
+			};
+			timing@20400000 {
+				clock-frequency = <20400000>;
+				nvidia,parent-clock-frequency = <408000000>;
+				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
+				clock-names = "emc-parent";
+			};
+		};
+	};
 };