From patchwork Mon Oct 13 20:19:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Ricard X-Patchwork-Id: 399279 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E90381400DD for ; Tue, 14 Oct 2014 07:20:13 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753654AbaJMUUN (ORCPT ); Mon, 13 Oct 2014 16:20:13 -0400 Received: from mail-wi0-f177.google.com ([209.85.212.177]:38584 "EHLO mail-wi0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751546AbaJMUUM (ORCPT ); Mon, 13 Oct 2014 16:20:12 -0400 Received: by mail-wi0-f177.google.com with SMTP id fb4so8412100wid.16 for ; Mon, 13 Oct 2014 13:20:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=JmdEKar9mPy2X0/ee9tyaA4mlPJice5LQu8ovcGFu20=; b=i7uz6wgnMEupY5MSyj98Oa2rSQsGxmCWNuOosWutKu2eyS6QvggCgoeiE2WVXlYDxp pH3OGvfWu2YbcLkk4DKViYq+8daJoNWbdhXSRKsd45hJiMXTJLulEPTcowhqeZ+LKm4I 9jA3VANBHHjvrxkXqKLvBE3LEzb38TuDkjcH+zsnbYXWyFljkKyseB/sk7/a4ZSVTGdp +FMW8fVjExSMDmVwy2Oiwma7VTFiQRGvBDZmxeSiPhxQO7caPdwQ91sJrVUwJAx9Xkp1 qWC01endYkCYv4YsXUxHNMfXLXBaMupn7iTFgiXrXJfBqAJ/DMLfJuap66S8gUzlUH4t 0e5g== X-Received: by 10.194.193.3 with SMTP id hk3mr631127wjc.23.1413231611238; Mon, 13 Oct 2014 13:20:11 -0700 (PDT) Received: from localhost.localdomain (ax113-6-78-236-204-66.fbx.proxad.net. [78.236.204.66]) by mx.google.com with ESMTPSA id fa7sm17792819wjd.27.2014.10.13.13.20.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 13 Oct 2014 13:20:10 -0700 (PDT) From: Christophe Ricard X-Google-Original-From: Christophe Ricard To: peterhuewe@gmx.de, ashley@ashleylai.com, tpmdd@selhorst.net Cc: tpmdd-devel@lists.sourceforge.net, christophe.ricard@gmail.com, christophe-h.ricard@st.com, jean-luc.blanc@st.com, devicetree@vger.kernel.org, jgunthorpe@obsidianresearch.com Subject: [PATCH v2 09/15] tpm: dts: st33zp24_i2c: Add DTS Documentation Date: Mon, 13 Oct 2014 22:19:33 +0200 Message-Id: <1413231580-4970-10-git-send-email-christophe-h.ricard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1413231580-4970-1-git-send-email-christophe-h.ricard@st.com> References: <1413231580-4970-1-git-send-email-christophe-h.ricard@st.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm. However several other properties needs to be documented such as lpcpd. Signed-off-by: Christophe Ricard --- .../devicetree/bindings/security/tpm/st33zp24.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/security/tpm/st33zp24.txt diff --git a/Documentation/devicetree/bindings/security/tpm/st33zp24.txt b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt new file mode 100644 index 0000000..eb48222 --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt @@ -0,0 +1,36 @@ +* STMicroelectronics SAS. ST33ZP24 TPM SoC + +Required properties: +- compatible: Should be "st,st33zp24_i2c". +- clock-frequency: I²C work frequency. +- reg: address on the bus + +Optional ST33ZP24 Properties: +- interrupt-parent: phandle for the interrupt gpio controller +- interrupts: GPIO interrupt to which the chip is connected +- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. +If set vps must present when the platform is going into sleep/hibernate mode. + +Optional SoC Specific Properties: +- pinctrl-names: Contains only one value - "default". +- pintctrl-0: Specifies the pin control groups used for this controller. + +Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2): + +&i2c2 { + + status = "okay"; + + st33zp24: st33zp24@13 { + + compatible = "st,st33zp24_i2c"; + + reg = <0x013>; + clock-frequency = <400000>; + + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + + lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; + }; +};