From patchwork Tue Oct 7 20:03:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Ricard X-Patchwork-Id: 397431 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D13C014009E for ; Wed, 8 Oct 2014 07:03:35 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752654AbaJGUDf (ORCPT ); Tue, 7 Oct 2014 16:03:35 -0400 Received: from mail-wi0-f176.google.com ([209.85.212.176]:45271 "EHLO mail-wi0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752281AbaJGUDe (ORCPT ); Tue, 7 Oct 2014 16:03:34 -0400 Received: by mail-wi0-f176.google.com with SMTP id hi2so9036665wib.3 for ; Tue, 07 Oct 2014 13:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=WorNP8MchPKUkggdN3gyO5ZBZTLvDpzRshbFRhyTVOE=; b=0LfVASsd58ujgNvdnJB/WgFxgZhJUKCL3++qvF21BqmMzXNcBb8x0MHls0FRJH8RFj wsYxtSaMe+1qK027aL0q4sQPSk+LTquDnxp7qkB48SbWdgBu0GZsdztBlKTMCxB3vhGC 7KkeJHIZEO8rUqPO6GwpP5Bx8syBOYsBxQnKS9lDrXHzvsOihy++o4q8yryJ/ZkuwSs+ UCaDN8bzFarEVn5aAWk9o0eKjjB0ad5yhX+scj4FxOc80epsP4xL8Qtue3HbqOROgEJ0 pqxX0DavvTFPoM/NidVijwjx0ptMGYPbW/UHCmOKAO3LVRP3/wvYqWBc7Cp3XcZm6Mp5 G9vg== X-Received: by 10.180.104.199 with SMTP id gg7mr29681486wib.46.1412712213665; Tue, 07 Oct 2014 13:03:33 -0700 (PDT) Received: from localhost.localdomain (ax113-6-78-236-204-66.fbx.proxad.net. [78.236.204.66]) by mx.google.com with ESMTPSA id lk6sm22017609wjb.26.2014.10.07.13.03.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Oct 2014 13:03:32 -0700 (PDT) From: Christophe Ricard X-Google-Original-From: Christophe Ricard To: peterhuewe@gmx.de, ashley@ashleylai.com, tpmdd@selhorst.net Cc: tpmdd-devel@lists.sourceforge.net, christophe.ricard@gmail.com, christophe-h.ricard@st.com, jean-luc.blanc@st.com, devicetree@vger.kernel.org Subject: [PATCH 08/16] tpm: dts: st33zp24_i2c: Add DTS Documentation Date: Tue, 7 Oct 2014 22:03:01 +0200 Message-Id: <1412712189-1234-9-git-send-email-christophe-h.ricard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412712189-1234-1-git-send-email-christophe-h.ricard@st.com> References: <1412712189-1234-1-git-send-email-christophe-h.ricard@st.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm. However several other properties needs to be documented such as lpcpd. Signed-off-by: Christophe Ricard --- .../devicetree/bindings/security/tpm/st33zp24.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/security/tpm/st33zp24.txt diff --git a/Documentation/devicetree/bindings/security/tpm/st33zp24.txt b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt new file mode 100644 index 0000000..75302c7 --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt @@ -0,0 +1,35 @@ +* STMicroelectronics SAS. ST33ZP24 TPM SoC + +Required properties: +- compatible: Should be "st,st33zp24_i2c". +- clock-frequency: I²C work frequency. +- reg: address on the bus + +Option ST33ZP24 Properties: +- interrupt-parent: phandle for the interrupt gpio controller +- interrupts: GPIO interrupt to which the chip is connected +- lpcpd-gpios: Output GPIO pin used for enabling/disabling the ST33ZP24 + +Optional SoC Specific Properties: +- pinctrl-names: Contains only one value - "default". +- pintctrl-0: Specifies the pin control groups used for this controller. + +Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2): + +&i2c2 { + + status = "okay"; + + st33zp24: st33zp24@1 { + + compatible = "st,st33zp24_i2c"; + + reg = <0x01>; + clock-frequency = <400000>; + + interrupt-parent = <&gpio5>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + + lpcpd-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; + }; +};