From patchwork Mon Nov 11 08:32:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuvaraj Kumar C D X-Patchwork-Id: 290215 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 29B182C00B8 for ; Mon, 11 Nov 2013 19:34:24 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753075Ab3KKIeW (ORCPT ); Mon, 11 Nov 2013 03:34:22 -0500 Received: from mail-pb0-f44.google.com ([209.85.160.44]:60808 "EHLO mail-pb0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752892Ab3KKIdd (ORCPT ); Mon, 11 Nov 2013 03:33:33 -0500 Received: by mail-pb0-f44.google.com with SMTP id rp16so4899885pbb.3 for ; Mon, 11 Nov 2013 00:33:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jbScGNhefToINsxJgOxFESZ73LJzEOWaVcLCPy9IRR4=; b=jV/yIlr9AYalIAKVW48Edd2fr+w27gJizspOOusXaDlpatekDnPqMGESHwpl1pBxbh ab9boAcNrfPOepZG/QhreCXXLMbgVnx5D6ntlRJK5ePoPWJcADdDotSPNOHWZqayviBy zyk5xT0lbEgs4P1C4Do0ZfPb93NImZiHqLZKvv+QMuWYrJgqXVDJjlLX7HF73ilR0OkE xEYZj+oSYK1pkvU8ReTNbS2DC4qhn6wiefLMTXBPRtlN6Owzv1+xb0nLV2bxC8P1wl4D BsrBKgLX1lFmzweCMZ3ImhD71nUX3IejrsqtYvTXnWjXOlJQuWVkvyQw0iE4h3/4/wjf GP6A== X-Received: by 10.68.180.162 with SMTP id dp2mr29137160pbc.5.1384158812545; Mon, 11 Nov 2013 00:33:32 -0800 (PST) Received: from yuvaraj-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id gg10sm29214401pbc.46.2013.11.11.00.33.27 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Nov 2013 00:33:31 -0800 (PST) From: Yuvaraj Kumar C D To: kishon@ti.com, kgene.kim@samsung.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Cc: grant.likely@linaro.org, rob.herring@calxeda.com, swarren@wwwdotorg.org, mark.rutland@arm.com, sachin.kamat@linaro.org, b.zolnierkie@samsung.com, jg1.han@samsung.com, t.figa@samsung.com, christoffer.dall@linaro.org, aditya.ps@samsung.com, Yuvaraj Kumar C D Subject: [PATCH V2 2/2] ARM: dts: Enable ahci sata and sata phy Date: Mon, 11 Nov 2013 14:02:58 +0530 Message-Id: <1384158778-27555-3-git-send-email-yuvaraj.cd@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1384158778-27555-1-git-send-email-yuvaraj.cd@samsung.com> References: <1384158778-27555-1-git-send-email-yuvaraj.cd@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds dt entry for ahci sata controller and its corresponding phy controller.phy node has been added w.r.t new generic phy framework. Changes since V1: 1.Minor changes to node name convention 2.Updated binding document. Signed-off-by: Yuvaraj Kumar C D --- .../devicetree/bindings/ata/exynos-sata-phy.txt | 19 +++++++++++++----- .../devicetree/bindings/ata/exynos-sata.txt | 17 +++++++++++----- arch/arm/boot/dts/exynos5250-arndale.dts | 9 ++++++++- arch/arm/boot/dts/exynos5250-smdk5250.dts | 8 ++------ arch/arm/boot/dts/exynos5250.dtsi | 21 ++++++++++++++++---- 5 files changed, 53 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt index 37824fa..a679e17 100644 --- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt +++ b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt @@ -4,11 +4,20 @@ SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. Each SATA PHY controller should have its own node. Required properties: -- compatible : compatible list, contains "samsung,exynos5-sata-phy" +- compatible : compatible list, contains "samsung,exynos5250-sata-phy" - reg : Example: - sata@ffe07000 { - compatible = "samsung,exynos5-sata-phy"; - reg = <0xffe07000 0x1000>; - }; + sata_phy: sata-phy@12170000 { + compatible = "samsung,exynos5250-sata-phy"; + reg = <0x12170000 0x1ff>; + clocks = <&clock 287>; + clock-names = "sata_phyctrl"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + sataphy-pmu { + reg = <0x10040724 0x4>; + }; + }; diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt index 0849f10..8ec7327 100644 --- a/Documentation/devicetree/bindings/ata/exynos-sata.txt +++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt @@ -8,10 +8,17 @@ Required properties: - interrupts : - reg : - samsung,sata-freq : +- phys : as mentioned in phy-bindings.txt +- phy-names : as mentioned in phy-bindings.txt Example: - sata@ffe08000 { - compatible = "samsung,exynos5-sata"; - reg = <0xffe08000 0x1000>; - interrupts = <115>; - }; + sata@122F0000 { + compatible = "snps,dwc-ahci"; + samsung,sata-freq = <66>; + reg = <0x122F0000 0x1ff>; + interrupts = <0 115 0>; + clocks = <&clock 277>, <&clock 143>; + clock-names = "sata", "sclk_sata"; + phys = <&sata_phy>; + phy-names = "sata-phy"; + }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b77a37e..434e4f3 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -381,7 +381,14 @@ }; i2c@121D0000 { - status = "disabled"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40000>; + samsung,i2c-slave-addr = <0x38>; + + sata-phy { + compatible = "sata-phy-i2c"; + reg = <0x38>; + }; }; mmc_0: mmc@12200000 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 13746df..eeeeef9 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -90,16 +90,12 @@ samsung,i2c-max-bus-freq = <40000>; samsung,i2c-slave-addr = <0x38>; - sata-phy { - compatible = "samsung,sata-phy"; + sata-phy@38 { + compatible = "sata-phy-i2c"; reg = <0x38>; }; }; - sata@122F0000 { - samsung,sata-freq = <66>; - }; - i2c@12C80000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 80b5df5..d24db31 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -46,6 +46,7 @@ i2c6 = &i2c_6; i2c7 = &i2c_7; i2c8 = &i2c_8; + i2c9 = &i2c_9; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; @@ -216,16 +217,28 @@ }; sata@122F0000 { - compatible = "samsung,exynos5-sata-ahci"; + compatible = "snps,dwc-ahci"; + samsung,sata-freq = <66>; reg = <0x122F0000 0x1ff>; interrupts = <0 115 0>; clocks = <&clock 277>, <&clock 143>; clock-names = "sata", "sclk_sata"; + phys = <&sata_phy>; + phy-names = "sata-phy"; }; - sata-phy@12170000 { - compatible = "samsung,exynos5-sata-phy"; + sata_phy: sata-phy@12170000 { + compatible = "samsung,exynos5250-sata-phy"; reg = <0x12170000 0x1ff>; + clocks = <&clock 287>; + clock-names = "sata_phyctrl"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + sataphy-pmu { + reg = <0x10040724 0x4>; + }; }; i2c_0: i2c@12C60000 { @@ -334,7 +347,7 @@ clock-names = "i2c"; }; - i2c@121D0000 { + i2c_9: i2c@121D0000 { compatible = "samsung,exynos5-sata-phy-i2c"; reg = <0x121D0000 0x100>; #address-cells = <1>;