| Message ID | 03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v2,1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 21/01/2023 12:06, Johan Jonker wrote: > Currently all Rockchip gpio nodes have the same compatible. > Compatible strings should be SoC related. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > .../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++--- > 1 file changed, 22 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > index affd823c8..a604c3638 100644 > --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > @@ -11,9 +11,27 @@ maintainers: > > properties: > compatible: > - enum: > - - rockchip,gpio-bank > - - rockchip,rk3188-gpio-bank0 > + oneOf: > + - const: rockchip,gpio-bank > + - const: rockchip,rk3188-gpio-bank0 That's an enum so keep them like that > + - items: Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: > Currently all Rockchip gpio nodes have the same compatible. > Compatible strings should be SoC related. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Sat, Jan 21, 2023 at 12:08 PM Johan Jonker <jbx6244@gmail.com> wrote: > Parse the gpio-ranges property in Rockchip gpio nodes to be > independent from aliases and probe order for our bank id. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> I guess there is no pretty way to do this. Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: > Currently all Rockchip gpio nodes have the same compatible. > Compatible strings should be SoC related. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Bartosz can you merge this one patch and keep the rest back so we get a more defined DT binding baseline? Yours, Linus Walleij
On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: > > > Currently all Rockchip gpio nodes have the same compatible. > > Compatible strings should be SoC related. > > > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > > Bartosz can you merge this one patch and keep the rest back > so we get a more defined DT binding baseline? > > Yours, > Linus Walleij Krzysztof, you left your ack but seem to also have pointed out an issue - do you want me to fix it up somehow before applying? Drop the oneOf and turn it back into an enum? Bart
On 10/02/2023 21:03, Bartosz Golaszewski wrote: > On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote: >> >> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: >> >>> Currently all Rockchip gpio nodes have the same compatible. >>> Compatible strings should be SoC related. >>> >>> Signed-off-by: Johan Jonker <jbx6244@gmail.com> >> >> Bartosz can you merge this one patch and keep the rest back >> so we get a more defined DT binding baseline? >> >> Yours, >> Linus Walleij > > Krzysztof, you left your ack but seem to also have pointed out an > issue - do you want me to fix it up somehow before applying? Drop the > oneOf and turn it back into an enum? Sure, you can apply with my comment fixed but then just please check with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that indentation is not mixed up. Best regards, Krzysztof
On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 10/02/2023 21:03, Bartosz Golaszewski wrote: > > On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote: > >> > >> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: > >> > >>> Currently all Rockchip gpio nodes have the same compatible. > >>> Compatible strings should be SoC related. > >>> > >>> Signed-off-by: Johan Jonker <jbx6244@gmail.com> > >> > >> Bartosz can you merge this one patch and keep the rest back > >> so we get a more defined DT binding baseline? > >> > >> Yours, > >> Linus Walleij > > > > Krzysztof, you left your ack but seem to also have pointed out an > > issue - do you want me to fix it up somehow before applying? Drop the > > oneOf and turn it back into an enum? > > > Sure, you can apply with my comment fixed but then just please check > with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that > indentation is not mixed up. > > Best regards, > Krzysztof > I prefer to get your ack on the final version really. Johan, please address the enum issue and resend just this patch. Bart
On 2/15/23 16:02, Bartosz Golaszewski wrote: > On Sun, Feb 12, 2023 at 5:14 PM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 10/02/2023 21:03, Bartosz Golaszewski wrote: >>> On Wed, Feb 8, 2023 at 12:08 PM Linus Walleij <linus.walleij@linaro.org> wrote: >>>> >>>> On Sat, Jan 21, 2023 at 12:06 PM Johan Jonker <jbx6244@gmail.com> wrote: >>>> >>>>> Currently all Rockchip gpio nodes have the same compatible. >>>>> Compatible strings should be SoC related. >>>>> >>>>> Signed-off-by: Johan Jonker <jbx6244@gmail.com> >>>> >>>> Bartosz can you merge this one patch and keep the rest back >>>> so we get a more defined DT binding baseline? >>>> >>>> Yours, >>>> Linus Walleij >>> >>> Krzysztof, you left your ack but seem to also have pointed out an >>> issue - do you want me to fix it up somehow before applying? Drop the >>> oneOf and turn it back into an enum? >> >> >> Sure, you can apply with my comment fixed but then just please check >> with `make dt_binding_check DT_SCHEMA_FILES="xxx.yaml"`, that >> indentation is not mixed up. >> >> Best regards, >> Krzysztof >> > > I prefer to get your ack on the final version really. > > Johan, please address the enum issue and resend just this patch. I changed to oneOf, because with enum I didn't get it working. With 2 enum's it complains about: is not of type 'string'. I'm out of ideas... Maybe it's something simple that I overlook. Could Krzysztof give an example? Johan > > Bart
On 15/02/2023 17:14, Johan Jonker wrote: > >> Johan, please address the enum issue and resend just this patch. > > I changed to oneOf, because with enum I didn't get it working. > With 2 enum's it complains about: is not of type 'string'. > I'm out of ideas... > Maybe it's something simple that I overlook. > Could Krzysztof give an example? Documentation/devicetree/bindings/arm/l2c2x0.yaml It should look like this, if my email did not mess up indents: + oneOf: + - enum: + - rockchip,gpio-bank + - rockchip,rk3188-gpio-bank0 + - items: + - enum: Best regards, Krzysztof
Hi Johan, On 2023/1/21 19:08, Johan Jonker wrote: > Parse the gpio-ranges property in Rockchip gpio nodes to be > independent from aliases and probe order for our bank id. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Looks good to me. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/gpio/gpio-rockchip.c | 24 ++++++++++++++++++------ > 1 file changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c > index e5de15a2a..df74b71aa 100644 > --- a/drivers/gpio/gpio-rockchip.c > +++ b/drivers/gpio/gpio-rockchip.c > @@ -702,24 +702,36 @@ static int rockchip_gpio_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct device_node *np = dev->of_node; > - struct device_node *pctlnp = of_get_parent(np); > + struct device_node *pctlnp; > struct pinctrl_dev *pctldev = NULL; > struct rockchip_pin_bank *bank = NULL; > struct rockchip_pin_deferred *cfg; > + struct of_phandle_args args; > static int gpio; > int id, ret; > > - if (!np || !pctlnp) > + if (!np) > + return -ENODEV; > + > + ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); > + if (ret == 0) { > + pctlnp = args.np; > + id = args.args[1] / 32; > + } else { > + pctlnp = of_get_parent(np); > + id = of_alias_get_id(np, "gpio"); > + if (id < 0) > + id = gpio++; > + } > + > + if (!pctlnp) > return -ENODEV; > > pctldev = of_pinctrl_get(pctlnp); > + of_node_put(pctlnp); > if (!pctldev) > return -EPROBE_DEFER; > > - id = of_alias_get_id(np, "gpio"); > - if (id < 0) > - id = gpio++; > - > bank = rockchip_gpio_find_bank(pctldev, id); > if (!bank) > return -EINVAL; > -- > 2.20.1 > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip
On 2023/1/21 19:08, Johan Jonker wrote: > Add a gpio-ranges property to Rockchip gpio nodes to be > independent from aliases and probe order for our bank id. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Looks good to me, GPIO controller has 32 pin each bank, even if there may have some empty bits. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > > Number of pins per bank not checked with datasheet. > Use default 32 for now. > --- > arch/arm/boot/dts/rk3036.dtsi | 3 +++ > arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++ > arch/arm/boot/dts/rk3128.dtsi | 4 ++++ > arch/arm/boot/dts/rk3188.dtsi | 4 ++++ > arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ > arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++ > arch/arm/boot/dts/rv1108.dtsi | 4 ++++ > arch/arm/boot/dts/rv1126.dtsi | 5 +++++ > 8 files changed, 43 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi > index 78686fc72..d99e4ea31 100644 > --- a/arch/arm/boot/dts/rk3036.dtsi > +++ b/arch/arm/boot/dts/rk3036.dtsi > @@ -582,6 +582,7 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -595,6 +596,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -608,6 +610,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi > index de9915d94..6ff392735 100644 > --- a/arch/arm/boot/dts/rk3066a.dtsi > +++ b/arch/arm/boot/dts/rk3066a.dtsi > @@ -280,6 +280,7 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -293,6 +294,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -306,6 +308,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -319,6 +322,7 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -332,6 +336,7 @@ > clocks = <&cru PCLK_GPIO4>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -345,6 +350,7 @@ > clocks = <&cru PCLK_GPIO6>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 192 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi > index b63bd4ad3..0ea277eb7 100644 > --- a/arch/arm/boot/dts/rk3128.dtsi > +++ b/arch/arm/boot/dts/rk3128.dtsi > @@ -476,6 +476,7 @@ > interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO0>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -487,6 +488,7 @@ > interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO1>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -498,6 +500,7 @@ > interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO2>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -509,6 +512,7 @@ > interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO3>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi > index 44b54af0b..6677e4a10 100644 > --- a/arch/arm/boot/dts/rk3188.dtsi > +++ b/arch/arm/boot/dts/rk3188.dtsi > @@ -231,6 +231,7 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -244,6 +245,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -257,6 +259,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -270,6 +273,7 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > index ffc16d6b9..a87db48c5 100644 > --- a/arch/arm/boot/dts/rk322x.dtsi > +++ b/arch/arm/boot/dts/rk322x.dtsi > @@ -955,10 +955,12 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > #interrupt-cells = <2>; > + rockchip,gpio-controller = <0>; > }; > > gpio1: gpio@11120000 { > @@ -968,10 +970,12 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > #interrupt-cells = <2>; > + rockchip,gpio-controller = <1>; > }; > > gpio2: gpio@11130000 { > @@ -981,10 +985,12 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > #interrupt-cells = <2>; > + rockchip,gpio-controller = <2>; > }; > > gpio3: gpio@11140000 { > @@ -994,10 +1000,12 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > #interrupt-cells = <2>; > + rockchip,gpio-controller = <3>; > }; > > pcfg_pull_up: pcfg-pull-up { > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index 2ca76b69a..20567ca98 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi > @@ -1431,6 +1431,7 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1444,6 +1445,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1457,6 +1459,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1470,6 +1473,7 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1483,6 +1487,7 @@ > clocks = <&cru PCLK_GPIO4>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1496,6 +1501,7 @@ > clocks = <&cru PCLK_GPIO5>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 160 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1509,6 +1515,7 @@ > clocks = <&cru PCLK_GPIO6>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 192 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1522,6 +1529,7 @@ > clocks = <&cru PCLK_GPIO7>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 224 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1535,6 +1543,7 @@ > clocks = <&cru PCLK_GPIO8>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 256 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi > index abf3006f0..d12b97ee7 100644 > --- a/arch/arm/boot/dts/rv1108.dtsi > +++ b/arch/arm/boot/dts/rv1108.dtsi > @@ -602,6 +602,7 @@ > clocks = <&cru PCLK_GPIO0_PMU>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -615,6 +616,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -628,6 +630,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -641,6 +644,7 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi > index 1f07d0a4f..68e820221 100644 > --- a/arch/arm/boot/dts/rv1126.dtsi > +++ b/arch/arm/boot/dts/rv1126.dtsi > @@ -433,6 +433,7 @@ > interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -444,6 +445,7 @@ > interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -455,6 +457,7 @@ > interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -466,6 +469,7 @@ > interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -477,6 +481,7 @@ > interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > -- > 2.20.1 >
On 2023/1/21 19:09, Johan Jonker wrote: > Add a gpio-ranges property to Rockchip gpio nodes to be > independent from aliases and probe order for our bank id. > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Looks good to me, GPIO controller has 32 pin each bank, even if there may have some empty bits. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > > Number of pins per bank not checked with datasheet. > Use default 32 for now. > --- > arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++ > arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++ > 6 files changed, 27 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi > index 4f6959eb5..9fcc0d0f3 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -1387,6 +1387,7 @@ > interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&pmucru PCLK_GPIO0_PMU>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1399,6 +1400,7 @@ > interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO1>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1411,6 +1413,7 @@ > interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO2>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1423,6 +1426,7 @@ > interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO3>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi > index dd228a256..38976f413 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi > @@ -798,6 +798,7 @@ > interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO0>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -809,6 +810,7 @@ > interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO1>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -820,6 +822,7 @@ > interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO2>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -831,6 +834,7 @@ > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO3>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -842,6 +846,7 @@ > interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO4>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > index 6d7a7bf72..7ba695728 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -1051,6 +1051,7 @@ > clocks = <&cru PCLK_GPIO0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1064,6 +1065,7 @@ > clocks = <&cru PCLK_GPIO1>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1077,6 +1079,7 @@ > clocks = <&cru PCLK_GPIO2>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > > interrupt-controller; > @@ -1090,6 +1093,7 @@ > clocks = <&cru PCLK_GPIO3>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > > interrupt-controller; > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > index a4c5aaf1f..5a008ed18 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -984,6 +984,7 @@ > interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -997,6 +998,7 @@ > interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -1010,6 +1012,7 @@ > interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -1023,6 +1026,7 @@ > interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 1881b4b71..7eb96fcc6 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -2091,6 +2091,7 @@ > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -2104,6 +2105,7 @@ > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -2117,6 +2119,7 @@ > interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -2130,6 +2133,7 @@ > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > @@ -2143,6 +2147,7 @@ > interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>; > > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <0x2>; > > interrupt-controller; > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index eed0059a6..870b4d9c6 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -1808,6 +1808,7 @@ > interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 0 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1819,6 +1820,7 @@ > interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 32 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1830,6 +1832,7 @@ > interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 64 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1841,6 +1844,7 @@ > interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 96 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1852,6 +1856,7 @@ > interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; > gpio-controller; > + gpio-ranges = <&pinctrl 0 128 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > -- > 2.20.1 >
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index affd823c8..a604c3638 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -11,9 +11,27 @@ maintainers: properties: compatible: - enum: - - rockchip,gpio-bank - - rockchip,rk3188-gpio-bank0 + oneOf: + - const: rockchip,gpio-bank + - const: rockchip,rk3188-gpio-bank0 + - items: + - enum: + - rockchip,px30-gpio-bank + - rockchip,rk3036-gpio-bank + - rockchip,rk3066a-gpio-bank + - rockchip,rk3128-gpio-bank + - rockchip,rk3188-gpio-bank + - rockchip,rk3228-gpio-bank + - rockchip,rk3288-gpio-bank + - rockchip,rk3328-gpio-bank + - rockchip,rk3308-gpio-bank + - rockchip,rk3368-gpio-bank + - rockchip,rk3399-gpio-bank + - rockchip,rk3568-gpio-bank + - rockchip,rk3588-gpio-bank + - rockchip,rv1108-gpio-bank + - rockchip,rv1126-gpio-bank + - const: rockchip,gpio-bank reg: maxItems: 1 @@ -75,7 +93,7 @@ examples: }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_gates8 10>;
Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- .../bindings/gpio/rockchip,gpio-bank.yaml | 26 ++++++++++++++++--- 1 file changed, 22 insertions(+), 4 deletions(-) -- 2.20.1