| Message ID | 20240424-ayn-odin2-initial-v1-0-e0aa05c991fd@gmail.com |
|---|---|
| Headers | show |
| Series | AYN Odin 2 support | expand |
On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: > From: Junhao Xie <bigfoot@classfun.cn> > > Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. > > Signed-off-by: Junhao Xie <bigfoot@classfun.cn> > --- > drivers/pwm/Kconfig | 10 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-sn3112.c | 336 +++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 347 insertions(+) > > diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig > index 1dd7921194f5..e21c37c7991e 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -553,6 +553,16 @@ config PWM_SL28CPLD > To compile this driver as a module, choose M here: the module > will be called pwm-sl28cpld. > > +config PWM_SN3112 > + tristate "SI-EN SN3112 PWM driver" > + depends on I2C > + select REGMAP_I2C > + help > + Generic PWM framework driver for SI-EN SN3112 LED controller. > + > + To compile this driver as a module, choose M here: the module > + will be called pwm-sn3112. > + > config PWM_SPEAR > tristate "STMicroelectronics SPEAr PWM support" > depends on PLAT_SPEAR || COMPILE_TEST > diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile > index 90913519f11a..6aab2d113159 100644 > --- a/drivers/pwm/Makefile > +++ b/drivers/pwm/Makefile > @@ -50,6 +50,7 @@ obj-$(CONFIG_PWM_RZ_MTU3) += pwm-rz-mtu3.o > obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o > obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o > obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o > +obj-$(CONFIG_PWM_SN3112) += pwm-sn3112.o > obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o > obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o > obj-$(CONFIG_PWM_STI) += pwm-sti.o > diff --git a/drivers/pwm/pwm-sn3112.c b/drivers/pwm/pwm-sn3112.c > new file mode 100644 > index 000000000000..38ef948602a3 > --- /dev/null > +++ b/drivers/pwm/pwm-sn3112.c > @@ -0,0 +1,336 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Driver for SN3112 12-channel 8-bit PWM LED controller > + * > + * Copyright (c) 2024 Junhao Xie <bigfoot@classfun.cn> > + * > + */ > + > +#include <linux/i2c.h> > +#include <linux/module.h> > +#include <linux/mutex.h> > +#include <linux/platform_device.h> > +#include <linux/pwm.h> > +#include <linux/regmap.h> > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/regulator/consumer.h> Includes should be alphabetised > + > +#define SN3112_CHANNELS 12 > +#define SN3112_REG_ENABLE 0x00 > +#define SN3112_REG_PWM_VAL 0x04 > +#define SN3112_REG_PWM_EN 0x13 > +#define SN3112_REG_APPLY 0x16 > +#define SN3112_REG_RESET 0x17 > + > +struct sn3112 { > + struct device *pdev; > + struct regmap *regmap; > + struct mutex lock; > + struct regulator *vdd; > + uint8_t pwm_val[SN3112_CHANNELS]; > + uint8_t pwm_en_reg[3]; > + bool pwm_en[SN3112_CHANNELS]; > +#if IS_ENABLED(CONFIG_GPIOLIB) > + struct gpio_desc *sdb; > +#endif > +}; > + > +static int sn3112_write_reg(struct sn3112 *priv, unsigned int reg, > + unsigned int val) > +{ > + int err; > + > + dev_dbg(priv->pdev, "request regmap_write 0x%x 0x%x\n", reg, val); > + err = regmap_write(priv->regmap, reg, val); > + if (err) > + dev_warn_ratelimited( > + priv->pdev, > + "regmap_write to register 0x%x failed: %pe\n", reg, > + ERR_PTR(err)); Multi-line should be encapsulated in {} if (err) { stuff goes here } > + return err; > +} > + > +static int sn3112_set_en_reg(struct sn3112 *priv, unsigned int channel, > + bool enabled, bool write) > +{ > + unsigned int reg, bit; > + > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; > + > + /* LED_EN1: BIT5:BIT3 = OUT3:OUT1 */ > + if (channel >= 0 && channel <= 2) > + reg = 0, bit = channel + 3; > + /* LED_EN2: BIT5:BIT0 = OUT9:OUT4 */ > + else if (channel >= 3 && channel <= 8) > + reg = 1, bit = channel - 3; > + /* LED_EN3: BIT2:BIT0 = OUT12:OUT10 */ > + else if (channel >= 9 && channel <= 11) > + reg = 2, bit = channel - 9; > + else > + return -EINVAL; > + > + dev_dbg(priv->pdev, "channel %u enabled %u\n", channel, enabled); > + dev_dbg(priv->pdev, "reg %u bit %u\n", reg, bit); > + if (enabled) > + set_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + else > + clear_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + dev_dbg(priv->pdev, "set enable reg %u to %u\n", reg, > + priv->pwm_en_reg[reg]); > + > + if (!write) > + return 0; newline > + return sn3112_write_reg(priv, SN3112_REG_PWM_EN + reg, > + priv->pwm_en_reg[reg]); > +} > + > +static int sn3112_set_val_reg(struct sn3112 *priv, unsigned int channel, > + uint8_t val, bool write) > +{ > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; newline > + priv->pwm_val[channel] = val; > + dev_dbg(priv->pdev, "set value reg %u to %u\n", channel, > + priv->pwm_val[channel]); > + > + if (!write) > + return 0; newline > + return sn3112_write_reg(priv, SN3112_REG_PWM_VAL + channel, > + priv->pwm_val[channel]); > +} > + > +static int sn3112_write_all(struct sn3112 *priv) > +{ > + int i, ret; > + > + /* regenerate enable register values */ > + for (i = 0; i < SN3112_CHANNELS; i++) { > + ret = sn3112_set_en_reg(priv, i, priv->pwm_en[i], false); > + if (ret != 0) > + return ret; > + } > + > + /* use random value to clear all registers */ > + ret = sn3112_write_reg(priv, SN3112_REG_RESET, 0x66); > + if (ret != 0) > + return ret; > + > + /* set software enable register */ > + ret = sn3112_write_reg(priv, SN3112_REG_ENABLE, 1); > + if (ret != 0) > + return ret; > + > + /* rewrite pwm value register */ > + for (i = 0; i < SN3112_CHANNELS; i++) { > + ret = sn3112_write_reg(priv, SN3112_REG_PWM_VAL + i, > + priv->pwm_val[i]); > + if (ret != 0) > + return ret; > + } > + > + /* rewrite pwm enable register */ > + for (i = 0; i < 3; i++) { > + ret = sn3112_write_reg(priv, SN3112_REG_PWM_EN + i, > + priv->pwm_en_reg[i]); > + if (ret != 0) > + return ret; > + } > + > + /* use random value to apply changes */ > + ret = sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + if (ret != 0) > + return ret; > + > + dev_dbg(priv->pdev, "reinitialized\n"); > + return 0; > +} > + > +static int sn3112_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) > +{ > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + if (pwm->hwpwm >= SN3112_CHANNELS) > + return -EINVAL; > + > + dev_dbg(priv->pdev, "sn3112 request channel %u\n", pwm->hwpwm); > + pwm->args.period = 1000000; newline > + return 0; > +} > + > +static int sn3112_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > + const struct pwm_state *state) > +{ > + u64 val = 0; > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + if (pwm->hwpwm >= SN3112_CHANNELS) > + return -EINVAL; > + > + if (state->polarity != PWM_POLARITY_NORMAL) > + return -EINVAL; > + > + if (state->period <= 0) > + return -EINVAL; > + > + val = mul_u64_u64_div_u64(state->duty_cycle, 0xff, state->period); > + dev_dbg(priv->pdev, "duty_cycle %llu period %llu\n", state->duty_cycle, > + state->period); > + dev_dbg(priv->pdev, "set channel %u value to %llu\n", pwm->hwpwm, val); > + dev_dbg(priv->pdev, "set channel %u enabled to %u\n", pwm->hwpwm, > + state->enabled); > + > + mutex_lock(&priv->lock); > + sn3112_set_en_reg(priv, pwm->hwpwm, state->enabled, true); > + sn3112_set_val_reg(priv, pwm->hwpwm, val, true); > + sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + mutex_unlock(&priv->lock); > + > + return 0; > +} > + > +static const struct pwm_ops sn3112_pwm_ops = { > + .apply = sn3112_pwm_apply, > + .request = sn3112_pwm_request, > +}; > + > +static const struct regmap_config sn3112_regmap_i2c_config = { > + .reg_bits = 8, > + .val_bits = 8, > + .max_register = 24, > + .cache_type = REGCACHE_NONE, > +}; > + > +static int sn3112_pwm_probe(struct i2c_client *client) > +{ > + struct pwm_chip *chip; > + struct sn3112 *priv; > + int ret, i; > + > + dev_dbg(&client->dev, "probing\n"); You can probably live without that in an upstream driver.. > + chip = devm_pwmchip_alloc(&client->dev, SN3112_CHANNELS, sizeof(*priv)); > + if (IS_ERR(chip)) > + return PTR_ERR(chip); > + priv = pwmchip_get_drvdata(chip); > + priv->pdev = &client->dev; > + > + /* initialize sn3112 (chip does not support read command) */ > + for (i = 0; i < SN3112_CHANNELS; i++) > + priv->pwm_en[i] = false; > + for (i = 0; i < SN3112_CHANNELS; i++) > + priv->pwm_val[i] = 0; > + for (i = 0; i < 3; i++) > + priv->pwm_en_reg[i] = 0; Why does pwm_val have a define to constrain the array but pwm_en_reg have hard-coded 3 ? Suggest using a #define for the 3 value for consistency / extensibility. > + > + /* enable sn5112 power vdd */ > + priv->vdd = devm_regulator_get(priv->pdev, "vdd"); > + if (IS_ERR(priv->vdd)) { > + ret = PTR_ERR(priv->vdd); > + dev_err(priv->pdev, "Unable to get vdd regulator: %d\n", ret); > + return ret; > + } > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* sn5112 hardware shutdown pin */ > + priv->sdb = devm_gpiod_get_optional(priv->pdev, "sdb", GPIOD_OUT_LOW); > + if (PTR_ERR(priv->sdb) == -EPROBE_DEFER) > + return -EPROBE_DEFER; > +#endif > + > + /* enable sn5112 power vdd */ > + ret = regulator_enable(priv->vdd); > + if (ret < 0) { > + dev_err(priv->pdev, "Unable to enable regulator: %d\n", ret); > + return ret; > + } > + > + priv->regmap = devm_regmap_init_i2c(client, &sn3112_regmap_i2c_config); > + if (IS_ERR(priv->regmap)) { > + ret = PTR_ERR(priv->regmap); > + dev_err(priv->pdev, "Failed to initialize register map: %d\n", > + ret); > + return ret; > + } > + > + i2c_set_clientdata(client, chip); > + mutex_init(&priv->lock); > + > + chip->ops = &sn3112_pwm_ops; > + ret = pwmchip_add(chip); > + if (ret < 0) > + return ret; > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* disable hardware shutdown pin */ > + if (priv->sdb) > + gpiod_set_value(priv->sdb, 0); > +#endif > + > + /* initialize registers */ > + ret = sn3112_write_all(priv); > + if (ret != 0) { > + dev_err(priv->pdev, "Failed to initialize sn3112: %d\n", ret); > + return ret; > + } > + > + dev_info(&client->dev, > + "Found SI-EN SN3112 12-channel 8-bit PWM LED controller\n"); newline > + return 0; > +} > + > +static void sn3112_pwm_remove(struct i2c_client *client) > +{ > + struct pwm_chip *chip = i2c_get_clientdata(client); > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + dev_dbg(priv->pdev, "remove\n"); suggest dropping from both probe() and remove() > + > + /* set software enable register */ > + sn3112_write_reg(priv, SN3112_REG_ENABLE, 0); > + > + /* use random value to apply changes */ > + sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* enable hardware shutdown pin */ > + if (priv->sdb) > + gpiod_set_value(priv->sdb, 1); > +#endif > + > + /* power-off sn5112 power vdd */ > + regulator_disable(priv->vdd); > + > + pwmchip_remove(chip); > +} > + > +static const struct i2c_device_id sn3112_id[] = { > + { "sn3112", 0 }, > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(i2c, sn3112_id); > + > +#ifdef CONFIG_OF > +static const struct of_device_id sn3112_dt_ids[] = { > + { .compatible = "si-en,sn3112-pwm", }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, sn3112_dt_ids); > +#endif > + > +static struct i2c_driver sn3112_i2c_driver = { > + .driver = { > + .name = "sn3112-pwm", > + .of_match_table = of_match_ptr(sn3112_dt_ids), > + }, > + .probe = sn3112_pwm_probe, > + .remove = sn3112_pwm_remove, > + .id_table = sn3112_id, > +}; > + > +module_i2c_driver(sn3112_i2c_driver); > + > +MODULE_AUTHOR("BigfootACA <bigfoot@classfun.cn>"); BigFootACA not Xilin Wu ? > +MODULE_DESCRIPTION("PWM driver for SI-EN SN3112"); > +MODULE_LICENSE("GPL"); > Also please consider the following checkpatch errors WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #50: new file mode 100644 CHECK: struct mutex definition without comment #83: FILE: drivers/pwm/pwm-sn3112.c:29: + struct mutex lock; CHECK: Prefer kernel type 'u8' over 'uint8_t' #85: FILE: drivers/pwm/pwm-sn3112.c:31: + uint8_t pwm_val[SN3112_CHANNELS]; CHECK: Prefer kernel type 'u8' over 'uint8_t' #86: FILE: drivers/pwm/pwm-sn3112.c:32: + uint8_t pwm_en_reg[3]; CHECK: Lines should not end with a '(' #101: FILE: drivers/pwm/pwm-sn3112.c:47: + dev_warn_ratelimited( CHECK: Prefer kernel type 'u8' over 'uint8_t' #145: FILE: drivers/pwm/pwm-sn3112.c:91: + uint8_t val, bool write)
On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: > From: Xilin Wu <wuxilin123@gmail.com> > > Add support for the 1920x1080 LCD panel driven by the Synaptics > TD4328 IC, as found on AYN Odin 2. > > Co-developed-by: Junhao Xie <bigfoot@classfun.cn> > Signed-off-by: Junhao Xie <bigfoot@classfun.cn> > Signed-off-by: Xilin Wu <wuxilin123@gmail.com> checkpatch.pl --strict somepatch CHECK: Alignment should match open parenthesis #207: FILE: drivers/gpu/drm/panel/panel-synaptics-td4328.c:150: +static int td4328_get_modes(struct drm_panel *panel, + struct drm_connector *connector) total: 0 errors, 2 warnings, 1 checks, 269 lines checked --- bod
On 24/4/2024 23:55, Bryan O'Donoghue wrote: > On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: >> From: Junhao Xie <bigfoot@classfun.cn> >> >> Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. >> >> Signed-off-by: Junhao Xie <bigfoot@classfun.cn> >> --- >> drivers/pwm/Kconfig | 10 ++ >> drivers/pwm/Makefile | 1 + >> drivers/pwm/pwm-sn3112.c | 336 +++++++++++++++++++++++++++++++++++++++++++++++ >> 3 files changed, 347 insertions(+) [...] > > CHECK: Prefer kernel type 'u8' over 'uint8_t' > #145: FILE: drivers/pwm/pwm-sn3112.c:91: > + uint8_t val, bool write) > I'll fix the commit and resend v2 later, thanks for your reply!
On 4/24/24 17:29, Xilin Wu via B4 Relay wrote: > From: Junhao Xie <bigfoot@classfun.cn> > > Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. > > Signed-off-by: Junhao Xie <bigfoot@classfun.cn> > --- [...] > +static int sn3112_set_en_reg(struct sn3112 *priv, unsigned int channel, > + bool enabled, bool write) > +{ > + unsigned int reg, bit; > + > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; > + > + /* LED_EN1: BIT5:BIT3 = OUT3:OUT1 */ > + if (channel >= 0 && channel <= 2) > + reg = 0, bit = channel + 3; > + /* LED_EN2: BIT5:BIT0 = OUT9:OUT4 */ > + else if (channel >= 3 && channel <= 8) > + reg = 1, bit = channel - 3; > + /* LED_EN3: BIT2:BIT0 = OUT12:OUT10 */ > + else if (channel >= 9 && channel <= 11) > + reg = 2, bit = channel - 9; > + else > + return -EINVAL; > + > + dev_dbg(priv->pdev, "channel %u enabled %u\n", channel, enabled); > + dev_dbg(priv->pdev, "reg %u bit %u\n", reg, bit); > + if (enabled) > + set_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + else > + clear_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + dev_dbg(priv->pdev, "set enable reg %u to %u\n", reg, > + priv->pwm_en_reg[reg]); > + > + if (!write) > + return 0; > + return sn3112_write_reg(priv, SN3112_REG_PWM_EN + reg, > + priv->pwm_en_reg[reg]); This looks like a weird reimplementation of regmap_update_bits > +} > + > +static int sn3112_set_val_reg(struct sn3112 *priv, unsigned int channel, > + uint8_t val, bool write) > +{ > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; > + priv->pwm_val[channel] = val; > + dev_dbg(priv->pdev, "set value reg %u to %u\n", channel, > + priv->pwm_val[channel]); > + > + if (!write) > + return 0; There's only a single call, with write == true > + return sn3112_write_reg(priv, SN3112_REG_PWM_VAL + channel, > + priv->pwm_val[channel]); > +} > + > +static int sn3112_write_all(struct sn3112 *priv) > +{ > + int i, ret; > + > + /* regenerate enable register values */ > + for (i = 0; i < SN3112_CHANNELS; i++) { > + ret = sn3112_set_en_reg(priv, i, priv->pwm_en[i], false); > + if (ret != 0) > + return ret; > + } > + > + /* use random value to clear all registers */ > + ret = sn3112_write_reg(priv, SN3112_REG_RESET, 0x66); > + if (ret != 0) if (ret) is the same as if (ret != 0) [...] > + > + /* use random value to apply changes */ > + ret = sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); "a random value"? sounds suspicious.. > + if (ret != 0) > + return ret; > + > + dev_dbg(priv->pdev, "reinitialized\n"); Please remove such "got here" messages once you're done with testing the driver locally [...] > + > +#if IS_ENABLED(CONFIG_GPIOLIB) I'm not sure this would be ever disabled on any embedded system nowadays. Especially with I2C. [...] > + > + dev_info(&client->dev, > + "Found SI-EN SN3112 12-channel 8-bit PWM LED controller\n"); This sort of message only makes sense if there's a CHIP_ID register that you can actually validate. If you bind this driver to a device at the same expected address, it will say it's there even if it's not. > + return 0; > +} > + > +static void sn3112_pwm_remove(struct i2c_client *client) > +{ > + struct pwm_chip *chip = i2c_get_clientdata(client); > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + dev_dbg(priv->pdev, "remove\n"); > + > + /* set software enable register */ > + sn3112_write_reg(priv, SN3112_REG_ENABLE, 0); > + > + /* use random value to apply changes */ > + sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* enable hardware shutdown pin */ > + if (priv->sdb) > + gpiod_set_value(priv->sdb, 1); > +#endif > + > + /* power-off sn5112 power vdd */ > + regulator_disable(priv->vdd); > + > + pwmchip_remove(chip); devm_pwmchip_add? Konrad
On 4/24/24 17:29, Xilin Wu via B4 Relay wrote: > From: Xilin Wu <wuxilin123@gmail.com> > > Add the PWM function to the pmk8550 dtsi, which is usually used > to control PWM backlight on platforms using this PMIC. > > Signed-off-by: Xilin Wu <wuxilin123@gmail.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: > From: Xilin Wu <wuxilin123@gmail.com> > > The original values provided by Qualcomm appear to be quite > inaccurate. Specifically, some heavy gaming tasks could be > improperly assigned to the A510 cores by the scheduler, resulting > in a CPU bottleneck. This update to the EAS properties aims to > enhance the user experience across various scenarios. > > The power numbers were obtained using a Type-C power meter, which > was directly connected to the battery connector on the AYN Odin 2 > motherboard, acting as a fake battery. > > It should be noted that the A715 cores seem less efficient than the > A710 cores. Therefore, an average value has been assigned to them, > considering that the A715 and A710 cores share a single cpufreq > domain. > > Cortex-A510 cores: > 441 kHz, 564 mV, 43 mW, 350 Cx > 556 kHz, 580 mV, 59 mW, 346 Cx > 672 kHz, 592 mV, 71 mW, 312 Cx > 787 kHz, 604 mV, 83 mW, 290 Cx > 902 kHz, 608 mV, 96 mW, 288 Cx > 1017 kHz, 624 mV, 107 mW, 264 Cx > 1113 kHz, 636 mV, 117 mW, 252 Cx > 1228 kHz, 652 mV, 130 mW, 240 Cx > 1344 kHz, 668 mV, 146 mW, 235 Cx > 1459 kHz, 688 mV, 155 mW, 214 Cx > 1555 kHz, 704 mV, 166 mW, 205 Cx > 1670 kHz, 724 mV, 178 mW, 192 Cx > 1785 kHz, 744 mV, 197 mW, 189 Cx > 1900 kHz, 764 mV, 221 mW, 190 Cx > 2016 kHz, 784 mV, 243 mW, 188 Cx > Your dynamic-power-coefficient for cpu 1: 251 This looks pretty convincing and like good work. A few questions and suggestions for your commit log. I'd really love to know more about how you ran this test. What values exactly does your power meter give you? How did you lock the core to a specific CPU frequency ? Maybe also give the equation to calculate Pdyn in the commit log. https://patchwork.kernel.org/project/linux-arm-kernel/patch/1500974575-2244-1-git-send-email-wxt@rock-chips.com/#20763985 --- bod
On Wed, 24 Apr 2024 at 18:30, Xilin Wu via B4 Relay <devnull+wuxilin123.gmail.com@kernel.org> wrote: > > From: Xilin Wu <wuxilin123@gmail.com> > > Add uart15 node for UART bus present on sm8550 SoC. > > Signed-off-by: Molly Sophia <mollysophia379@gmail.com> > Signed-off-by: Xilin Wu <wuxilin123@gmail.com> > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 2024/4/25 03:37, Konrad Dybcio wrote: > On 4/24/24 17:29, Xilin Wu via B4 Relay wrote: >> From: Junhao Xie <bigfoot@classfun.cn> >> >> Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. >> >> Signed-off-by: Junhao Xie <bigfoot@classfun.cn> >> --- >[...] >> + return sn3112_write_reg(priv, SN3112_REG_PWM_EN + reg, >> + priv->pwm_en_reg[reg]); > > This looks like a weird reimplementation of regmap_update_bits > We cannot use regmap_update_bits because this chip does not support read command. It will discard all read command. >> +} >> + [...] > > devm_pwmchip_add? > > Konrad Thank you for your reply, I will fix them.
Hello, On Wed, Apr 24, 2024 at 11:29:07PM +0800, Xilin Wu via B4 Relay wrote: > From: Junhao Xie <bigfoot@classfun.cn> > > Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. > > Signed-off-by: Junhao Xie <bigfoot@classfun.cn> Missing S-o-b for patch sender. > --- > drivers/pwm/Kconfig | 10 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-sn3112.c | 336 +++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 347 insertions(+) > > diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig > index 1dd7921194f5..e21c37c7991e 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -553,6 +553,16 @@ config PWM_SL28CPLD > To compile this driver as a module, choose M here: the module > will be called pwm-sl28cpld. > > +config PWM_SN3112 > + tristate "SI-EN SN3112 PWM driver" > + depends on I2C > + select REGMAP_I2C > + help > + Generic PWM framework driver for SI-EN SN3112 LED controller. > + > + To compile this driver as a module, choose M here: the module > + will be called pwm-sn3112. > + > config PWM_SPEAR > tristate "STMicroelectronics SPEAr PWM support" > depends on PLAT_SPEAR || COMPILE_TEST > diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile > index 90913519f11a..6aab2d113159 100644 > --- a/drivers/pwm/Makefile > +++ b/drivers/pwm/Makefile > @@ -50,6 +50,7 @@ obj-$(CONFIG_PWM_RZ_MTU3) += pwm-rz-mtu3.o > obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o > obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o > obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o > +obj-$(CONFIG_PWM_SN3112) += pwm-sn3112.o > obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o > obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o > obj-$(CONFIG_PWM_STI) += pwm-sti.o > diff --git a/drivers/pwm/pwm-sn3112.c b/drivers/pwm/pwm-sn3112.c > new file mode 100644 > index 000000000000..38ef948602a3 > --- /dev/null > +++ b/drivers/pwm/pwm-sn3112.c > @@ -0,0 +1,336 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Driver for SN3112 12-channel 8-bit PWM LED controller > + * > + * Copyright (c) 2024 Junhao Xie <bigfoot@classfun.cn> > + * Please document here some hardware features in the same format as e.g. pwm-sl28cpld.c such that sed -rn '/Limitations:/,/\*\/?$/p' drivers/pwm/*.c can easily extract it. Interesting facts that I want to have documented are: - How does the HW behave on reconfiguration, i.e. does it complete the active period or is it aborted and can it happen that the signal gliches (e.g. because it emits for a moment a signal using the old period but the new duty cycle). - How does the HW behave on disable? Does it complete the active period? Does it emit low? Or the inactive level? Or does it freeze? - "Doesn't support read-back of configured output" belongs here. - Only supports a single fixed period and normal polarity. > + */ > + > +#include <linux/i2c.h> > +#include <linux/module.h> > +#include <linux/mutex.h> > +#include <linux/platform_device.h> > +#include <linux/pwm.h> > +#include <linux/regmap.h> > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/regulator/consumer.h> > + > +#define SN3112_CHANNELS 12 > +#define SN3112_REG_ENABLE 0x00 > +#define SN3112_REG_PWM_VAL 0x04 > +#define SN3112_REG_PWM_EN 0x13 > +#define SN3112_REG_APPLY 0x16 > +#define SN3112_REG_RESET 0x17 > + > +struct sn3112 { > + struct device *pdev; pdev is a usual name for pointers to struct platform_device or struct pci_device. For struct device please use "dev". > + struct regmap *regmap; > + struct mutex lock; > + struct regulator *vdd; > + uint8_t pwm_val[SN3112_CHANNELS]; > + uint8_t pwm_en_reg[3]; > + bool pwm_en[SN3112_CHANNELS]; > +#if IS_ENABLED(CONFIG_GPIOLIB) > + struct gpio_desc *sdb; > +#endif > +}; > + > +static int sn3112_write_reg(struct sn3112 *priv, unsigned int reg, > + unsigned int val) > +{ > + int err; > + > + dev_dbg(priv->pdev, "request regmap_write 0x%x 0x%x\n", reg, val); > + err = regmap_write(priv->regmap, reg, val); > + if (err) > + dev_warn_ratelimited( > + priv->pdev, > + "regmap_write to register 0x%x failed: %pe\n", reg, > + ERR_PTR(err)); > + > + return err; > +} > + > +static int sn3112_set_en_reg(struct sn3112 *priv, unsigned int channel, > + bool enabled, bool write) > +{ > + unsigned int reg, bit; > + > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; > + > + /* LED_EN1: BIT5:BIT3 = OUT3:OUT1 */ > + if (channel >= 0 && channel <= 2) > + reg = 0, bit = channel + 3; > + /* LED_EN2: BIT5:BIT0 = OUT9:OUT4 */ > + else if (channel >= 3 && channel <= 8) > + reg = 1, bit = channel - 3; > + /* LED_EN3: BIT2:BIT0 = OUT12:OUT10 */ > + else if (channel >= 9 && channel <= 11) > + reg = 2, bit = channel - 9; Please use ; instead of , and proper { }. And huh, this is inconsitent. Is it possible to renumber somehow such that this simplifies to reg = channel / 3; bit = channel % 3; ? > + else > + return -EINVAL; > + > + dev_dbg(priv->pdev, "channel %u enabled %u\n", channel, enabled); > + dev_dbg(priv->pdev, "reg %u bit %u\n", reg, bit); > + if (enabled) > + set_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + else > + clear_bit(bit, (ulong *)&priv->pwm_en_reg[reg]); > + dev_dbg(priv->pdev, "set enable reg %u to %u\n", reg, > + priv->pwm_en_reg[reg]); Even for dev_dbg this seems excessive. I guess now that the driver works at least for you, you can drop several of them. > + if (!write) > + return 0; > + return sn3112_write_reg(priv, SN3112_REG_PWM_EN + reg, > + priv->pwm_en_reg[reg]); > +} > + > +static int sn3112_set_val_reg(struct sn3112 *priv, unsigned int channel, > + uint8_t val, bool write) > +{ > + if (channel >= SN3112_CHANNELS) > + return -EINVAL; > + priv->pwm_val[channel] = val; > + dev_dbg(priv->pdev, "set value reg %u to %u\n", channel, > + priv->pwm_val[channel]); > + > + if (!write) > + return 0; > + return sn3112_write_reg(priv, SN3112_REG_PWM_VAL + channel, > + priv->pwm_val[channel]); > +} > + > +static int sn3112_write_all(struct sn3112 *priv) > +{ > + int i, ret; > + > + /* regenerate enable register values */ > + for (i = 0; i < SN3112_CHANNELS; i++) { > + ret = sn3112_set_en_reg(priv, i, priv->pwm_en[i], false); > + if (ret != 0) > + return ret; > + } > + > + /* use random value to clear all registers */ > + ret = sn3112_write_reg(priv, SN3112_REG_RESET, 0x66); > + if (ret != 0) > + return ret; > + > + /* set software enable register */ > + ret = sn3112_write_reg(priv, SN3112_REG_ENABLE, 1); > + if (ret != 0) > + return ret; > + > + /* rewrite pwm value register */ > + for (i = 0; i < SN3112_CHANNELS; i++) { > + ret = sn3112_write_reg(priv, SN3112_REG_PWM_VAL + i, > + priv->pwm_val[i]); > + if (ret != 0) > + return ret; > + } > + > + /* rewrite pwm enable register */ > + for (i = 0; i < 3; i++) { > + ret = sn3112_write_reg(priv, SN3112_REG_PWM_EN + i, > + priv->pwm_en_reg[i]); > + if (ret != 0) > + return ret; > + } > + > + /* use random value to apply changes */ > + ret = sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + if (ret != 0) > + return ret; > + > + dev_dbg(priv->pdev, "reinitialized\n"); > + return 0; > +} > + > +static int sn3112_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) > +{ > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + if (pwm->hwpwm >= SN3112_CHANNELS) > + return -EINVAL; You don't need to handle that, the pwm core cares for only passing sane values. > + > + dev_dbg(priv->pdev, "sn3112 request channel %u\n", pwm->hwpwm); > + pwm->args.period = 1000000; No, that yields too much surprises. Just handle that in .apply() > + return 0; > +} > + > +static int sn3112_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > + const struct pwm_state *state) > +{ > + u64 val = 0; > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + if (pwm->hwpwm >= SN3112_CHANNELS) > + return -EINVAL; > + > + if (state->polarity != PWM_POLARITY_NORMAL) > + return -EINVAL; > + > + if (state->period <= 0) > + return -EINVAL; Drop sanity checking. Only do: if (state->period < MY_FIXED_PERIOD) return -EINVAL; duty_cycle = min(state->duty_cycle, MY_FIXED_PERIOD); > + > + val = mul_u64_u64_div_u64(state->duty_cycle, 0xff, state->period); > + dev_dbg(priv->pdev, "duty_cycle %llu period %llu\n", state->duty_cycle, > + state->period); > + dev_dbg(priv->pdev, "set channel %u value to %llu\n", pwm->hwpwm, val); > + dev_dbg(priv->pdev, "set channel %u enabled to %u\n", pwm->hwpwm, > + state->enabled); > + > + mutex_lock(&priv->lock); > + sn3112_set_en_reg(priv, pwm->hwpwm, state->enabled, true); > + sn3112_set_val_reg(priv, pwm->hwpwm, val, true); > + sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + mutex_unlock(&priv->lock); > + > + return 0; > +} > + > +static const struct pwm_ops sn3112_pwm_ops = { > + .apply = sn3112_pwm_apply, > + .request = sn3112_pwm_request, > +}; > + > +static const struct regmap_config sn3112_regmap_i2c_config = { > + .reg_bits = 8, > + .val_bits = 8, > + .max_register = 24, > + .cache_type = REGCACHE_NONE, > +}; > + > +static int sn3112_pwm_probe(struct i2c_client *client) > +{ > + struct pwm_chip *chip; > + struct sn3112 *priv; > + int ret, i; > + > + dev_dbg(&client->dev, "probing\n"); > + chip = devm_pwmchip_alloc(&client->dev, SN3112_CHANNELS, sizeof(*priv)); > + if (IS_ERR(chip)) > + return PTR_ERR(chip); > + priv = pwmchip_get_drvdata(chip); > + priv->pdev = &client->dev; > + > + /* initialize sn3112 (chip does not support read command) */ > + for (i = 0; i < SN3112_CHANNELS; i++) > + priv->pwm_en[i] = false; > + for (i = 0; i < SN3112_CHANNELS; i++) > + priv->pwm_val[i] = 0; > + for (i = 0; i < 3; i++) > + priv->pwm_en_reg[i] = 0; *priv is already zerod. > + /* enable sn5112 power vdd */ > + priv->vdd = devm_regulator_get(priv->pdev, "vdd"); > + if (IS_ERR(priv->vdd)) { > + ret = PTR_ERR(priv->vdd); > + dev_err(priv->pdev, "Unable to get vdd regulator: %d\n", ret); Please use dev_err_probe() > + return ret; > + } > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* sn5112 hardware shutdown pin */ > + priv->sdb = devm_gpiod_get_optional(priv->pdev, "sdb", GPIOD_OUT_LOW); > + if (PTR_ERR(priv->sdb) == -EPROBE_DEFER) > + return -EPROBE_DEFER; devm_gpiod_get_optional has a dummy implementation, so please drop the #ifdef. Also handle all errors, not only EPROBE_DEFER. > +#endif > + > + /* enable sn5112 power vdd */ > + ret = regulator_enable(priv->vdd); > + if (ret < 0) { > + dev_err(priv->pdev, "Unable to enable regulator: %d\n", ret); > + return ret; > + } > + > + priv->regmap = devm_regmap_init_i2c(client, &sn3112_regmap_i2c_config); > + if (IS_ERR(priv->regmap)) { > + ret = PTR_ERR(priv->regmap); > + dev_err(priv->pdev, "Failed to initialize register map: %d\n", > + ret); > + return ret; > + } > + > + i2c_set_clientdata(client, chip); > + mutex_init(&priv->lock); > + > + chip->ops = &sn3112_pwm_ops; > + ret = pwmchip_add(chip); > + if (ret < 0) > + return ret; > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* disable hardware shutdown pin */ > + if (priv->sdb) > + gpiod_set_value(priv->sdb, 0); > +#endif > + > + /* initialize registers */ > + ret = sn3112_write_all(priv); > + if (ret != 0) { > + dev_err(priv->pdev, "Failed to initialize sn3112: %d\n", ret); > + return ret; > + } This happens too late? Once pwmchip_add() returns the hardware must be ready. > + > + dev_info(&client->dev, > + "Found SI-EN SN3112 12-channel 8-bit PWM LED controller\n"); Please degrade that to dev_dbg (or drop completely). > + return 0; > +} > + > +static void sn3112_pwm_remove(struct i2c_client *client) > +{ > + struct pwm_chip *chip = i2c_get_clientdata(client); > + struct sn3112 *priv = pwmchip_get_drvdata(chip); > + > + dev_dbg(priv->pdev, "remove\n"); > + > + /* set software enable register */ > + sn3112_write_reg(priv, SN3112_REG_ENABLE, 0); hardware silencing has to happen only after pwmchip_remove(). > + > + /* use random value to apply changes */ > + sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > + > +#if IS_ENABLED(CONFIG_GPIOLIB) > + /* enable hardware shutdown pin */ > + if (priv->sdb) > + gpiod_set_value(priv->sdb, 1); > +#endif > + > + /* power-off sn5112 power vdd */ > + regulator_disable(priv->vdd); > + > + pwmchip_remove(chip); > +} > + > +static const struct i2c_device_id sn3112_id[] = { > + { "sn3112", 0 }, Drop the 0, and please use named initializers. > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(i2c, sn3112_id); > + > +#ifdef CONFIG_OF > +static const struct of_device_id sn3112_dt_ids[] = { > + { .compatible = "si-en,sn3112-pwm", }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, sn3112_dt_ids); > +#endif > + > +static struct i2c_driver sn3112_i2c_driver = { > + .driver = { > + .name = "sn3112-pwm", > + .of_match_table = of_match_ptr(sn3112_dt_ids), > + }, > + .probe = sn3112_pwm_probe, > + .remove = sn3112_pwm_remove, Please use .remove_new > + .id_table = sn3112_id, > +}; > + > +module_i2c_driver(sn3112_i2c_driver); > + > +MODULE_AUTHOR("BigfootACA <bigfoot@classfun.cn>"); I'd prefer the realname here matching the patch author. > +MODULE_DESCRIPTION("PWM driver for SI-EN SN3112"); > +MODULE_LICENSE("GPL"); Best regards Uwe
Hello, On Wed, Apr 24, 2024 at 04:55:26PM +0100, Bryan O'Donoghue wrote: > On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: > > +#include <linux/i2c.h> > > +#include <linux/module.h> > > +#include <linux/mutex.h> > > +#include <linux/platform_device.h> > > +#include <linux/pwm.h> > > +#include <linux/regmap.h> > > +#include <linux/delay.h> > > +#include <linux/gpio/consumer.h> > > +#include <linux/regulator/consumer.h> > > Includes should be alphabetised Also check if you need them all. (E.g. I wonder about delay.h) > > + dev_dbg(priv->pdev, "request regmap_write 0x%x 0x%x\n", reg, val); > > + err = regmap_write(priv->regmap, reg, val); > > + if (err) > > + dev_warn_ratelimited( > > + priv->pdev, > > + "regmap_write to register 0x%x failed: %pe\n", reg, > > + ERR_PTR(err)); > > Multi-line should be encapsulated in {} > > if (err) { > stuff > goes here > } In my eyes a single state doesn't need {} even when spanning multiple lines. > > + return err; > > +} Best regards Uwe
Hello, On Wed, Apr 24, 2024 at 09:37:25PM +0200, Konrad Dybcio wrote: > On 4/24/24 17:29, Xilin Wu via B4 Relay wrote: > > + > > + /* use random value to apply changes */ > > + ret = sn3112_write_reg(priv, SN3112_REG_APPLY, 0x66); > > "a random value"? sounds suspicious.. I smiled about that one, too, remembering https://xkcd.com/221/ > [...] > > +#if IS_ENABLED(CONFIG_GPIOLIB) > > + /* enable hardware shutdown pin */ > > + if (priv->sdb) > > + gpiod_set_value(priv->sdb, 1); > > +#endif > > + > > + /* power-off sn5112 power vdd */ > > + regulator_disable(priv->vdd); > > + > > + pwmchip_remove(chip); > > devm_pwmchip_add? Note using devm_xyz only works if all requests before are also using devm. (There are a few exceptions, but these need proper thinking and extensive commenting.) Best regards Uwe
On 24/04/2024 17:29, Xilin Wu via B4 Relay wrote: > From: Xilin Wu <wuxilin123@gmail.com> > > AYN Odin 2 is a gaming handheld based on QCS8550, which is derived > from SM8550 but without modem RF system. > > + > +/ { > + model = "AYN Odin 2"; > + compatible = "ayn,odin2", "qcom,qcs8550", "qcom,sm8550"; > + chassis-type = "handset"; > + > + qcom,msm-id = <QCOM_ID_QCS8550 0x20000>; > + qcom,board-id = <0x1001f 0>; No, these are not allowed. You did not test your dts. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). > + > + aliases { > + serial0 = &uart7; > + serial1 = &uart14; > + serial2 = &uart15; > + }; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + pwms = <&pmk8550_pwm 0 860000>; > + brightness-levels = <1023 0>; > + num-interpolated-steps = <1023>; > + default-brightness-level = <600>; > + power-supply = <&vph_pwr>; > + enable-gpios = <&pmk8550_gpios 5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pwm_backlight_default>; > + status = "okay"; Drop, why do you need it? Do you see it anywhere else in the backlight nodes in DTS? > + }; > + > + fan_pwr: fan-pwr-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "fan_pwr"; > + > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + > + gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&fan_pwr_en>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + pinctrl-0 = <&volume_up_n>, <&m1_m2_keys_default>; > + pinctrl-names = "default"; > + > + key-volume-up { > + label = "Volume Up"; > + linux,code = <KEY_VOLUMEUP>; > + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; > + debounce-interval = <15>; > + linux,can-disable; > + wakeup-source; > + }; > + > + m1-button { > + label = "M1"; > + linux,code = <BTN_TRIGGER_HAPPY1>; > + gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; > + }; > + > + m2-button { > + label = "M2"; > + linux,code = <BTN_TRIGGER_HAPPY2>; > + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + hdmi-out { > + compatible = "hdmi-connector"; > + type = "d"; > + hpd-gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>; > + > + port { > + hdmi_con: endpoint { > + remote-endpoint = <<8912_out>; > + }; > + }; > + }; > + > + hdmi_pwr: hdmi-pwr-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "hdmi_pwr"; > + > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + gpio = <&tlmm 10 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + vdd_lcm_2p8: vdd-lcm-2p8-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vdd_lcm_2p8"; > + > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + > + gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + led_left_side: led-controller-1 { > + compatible = "pwm-leds-multicolor"; > + > + multi-led { > + label = "left-side"; > + color = <LED_COLOR_ID_RGB>; > + max-brightness = <255>; > + > + led-red { > + color = <LED_COLOR_ID_RED>; > + pwms = <&pwm_rgb_left 0>; > + }; > + > + led-green { > + color = <LED_COLOR_ID_GREEN>; > + pwms = <&pwm_rgb_left 1>; > + }; > + > + led-blue { > + color = <LED_COLOR_ID_BLUE>; > + pwms = <&pwm_rgb_left 2>; > + }; > + }; > + }; > + > + led_left_joystick: led-controller-2 { > + compatible = "pwm-leds-multicolor"; > + > + multi-led { > + label = "left-joystick"; > + color = <LED_COLOR_ID_RGB>; > + max-brightness = <255>; > + > + led-red { > + color = <LED_COLOR_ID_RED>; > + pwms = <&pwm_rgb_left 6>; > + }; > + > + led-green { > + color = <LED_COLOR_ID_GREEN>; > + pwms = <&pwm_rgb_left 7>; > + }; > + > + led-blue { > + color = <LED_COLOR_ID_BLUE>; > + pwms = <&pwm_rgb_left 8>; > + }; > + }; > + }; > + > + led_right_side: led-controller-3 { > + compatible = "pwm-leds-multicolor"; > + > + multi-led { > + label = "right-side"; > + color = <LED_COLOR_ID_RGB>; > + max-brightness = <255>; > + > + led-red { > + color = <LED_COLOR_ID_RED>; > + pwms = <&pwm_rgb_right 0>; > + }; > + > + led-green { > + color = <LED_COLOR_ID_GREEN>; > + pwms = <&pwm_rgb_right 1>; > + }; > + > + led-blue { > + color = <LED_COLOR_ID_BLUE>; > + pwms = <&pwm_rgb_right 2>; > + }; > + }; > + }; > + > + led_right_joystick: led-controller-4 { > + compatible = "pwm-leds-multicolor"; > + > + multi-led { > + label = "right-joystick"; > + color = <LED_COLOR_ID_RGB>; > + max-brightness = <255>; > + > + led-red { > + color = <LED_COLOR_ID_RED>; > + pwms = <&pwm_rgb_right 6>; > + }; > + > + led-green { > + color = <LED_COLOR_ID_GREEN>; > + pwms = <&pwm_rgb_right 7>; > + }; > + > + led-blue { > + color = <LED_COLOR_ID_BLUE>; > + pwms = <&pwm_rgb_right 8>; > + }; > + }; > + }; > + > + mcu_3v3: mcu-3v3-regulator { Name all regulators regulator-n, where n is decimal number. Then order the nodes by name. ... > + > +&i2c4 { > + clock-frequency = <400000>; > + status = "okay"; > + > + touchscreen@20 { > + compatible = "syna,rmi4-i2c"; > + reg = <0x20>; > + #address-cells = <1>; > + #size-cells = <0>; > + interrupts-extended = <&tlmm 25 0x2008>; > + > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&ts_int_default>; > + pinctrl-1 = <&ts_int_sleep>; > + > + vio-supply = <&vreg_l12b_1p8>; > + > + syna,startup-delay-ms = <200>; > + syna,reset-delay-ms = <200>; > + > + rmi4-f01@1 { > + syna,nosleep-mode = <0x1>; > + reg = <0x1>; > + }; > + > + rmi4-f12@12 { > + reg = <0x12>; > + syna,rezero-wait-ms = <20>; > + syna,clip-x-low = <0>; > + syna,clip-y-low = <0>; > + syna,clip-x-high = <1080>; > + syna,clip-y-high = <1920>; > + syna,sensor-type = <1>; > + touchscreen-inverted-x; > + }; > + }; Please confirm the status of dtbs_check for your board. I am pretty sure it fails. Best regards, Krzysztof
On 2024/4/25 14:02, Uwe Kleine-König wrote: > Hello, > > On Wed, Apr 24, 2024 at 11:29:07PM +0800, Xilin Wu via B4 Relay wrote: >> From: Junhao Xie <bigfoot@classfun.cn> >> >> Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. >> [...] >> +MODULE_LICENSE("GPL"); > > Best regards > Uwe > Thank you for your reply! I will fix them and resend this commit. This is the link of datasheet for SI-EN SN3112, but it is written in Chinese: https://datasheetspdf.com/pdf-down/S/N/3/SN3112-12-SI-EN.pdf
On 25/04/2024 02:57, Junhao Xie wrote: > On 2024/4/25 03:37, Konrad Dybcio wrote: >> On 4/24/24 17:29, Xilin Wu via B4 Relay wrote: >>> From: Junhao Xie <bigfoot@classfun.cn> >>> >>> Add a new driver for the SI-EN SN3112 12-channel 8-bit PWM LED controller. >>> >>> Signed-off-by: Junhao Xie <bigfoot@classfun.cn> >>> --- >> [...] >>> + return sn3112_write_reg(priv, SN3112_REG_PWM_EN + reg, >>> + priv->pwm_en_reg[reg]); >> >> This looks like a weird reimplementation of regmap_update_bits >> > > We cannot use regmap_update_bits because this chip does not support read command. > It will discard all read command. You could use regmap cache with all registers marked as cacheable, but not sure it's worth doing this. Neil > >>> +} >>> + > [...] >> >> devm_pwmchip_add? >> >> Konrad > > Thank you for your reply, I will fix them. >
On 2024/4/24 23:58, Bryan O'Donoghue wrote: > On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: >> From: Xilin Wu <wuxilin123@gmail.com> >> >> Add support for the 1920x1080 LCD panel driven by the Synaptics >> TD4328 IC, as found on AYN Odin 2. >> >> Co-developed-by: Junhao Xie <bigfoot@classfun.cn> >> Signed-off-by: Junhao Xie <bigfoot@classfun.cn> >> Signed-off-by: Xilin Wu <wuxilin123@gmail.com> > > checkpatch.pl --strict somepatch > > CHECK: Alignment should match open parenthesis > #207: FILE: drivers/gpu/drm/panel/panel-synaptics-td4328.c:150: > +static int td4328_get_modes(struct drm_panel *panel, > + struct drm_connector *connector) > > total: 0 errors, 2 warnings, 1 checks, 269 lines checked > > --- > bod Ack. Will fix in v2.
On 2024/4/25 6:45, Bryan O'Donoghue wrote: > On 24/04/2024 16:29, Xilin Wu via B4 Relay wrote: >> From: Xilin Wu <wuxilin123@gmail.com> >> >> The original values provided by Qualcomm appear to be quite >> inaccurate. Specifically, some heavy gaming tasks could be >> improperly assigned to the A510 cores by the scheduler, resulting >> in a CPU bottleneck. This update to the EAS properties aims to >> enhance the user experience across various scenarios. >> >> The power numbers were obtained using a Type-C power meter, which >> was directly connected to the battery connector on the AYN Odin 2 >> motherboard, acting as a fake battery. >> >> It should be noted that the A715 cores seem less efficient than the >> A710 cores. Therefore, an average value has been assigned to them, >> considering that the A715 and A710 cores share a single cpufreq >> domain. >> >> Cortex-A510 cores: >> 441 kHz, 564 mV, 43 mW, 350 Cx >> 556 kHz, 580 mV, 59 mW, 346 Cx >> 672 kHz, 592 mV, 71 mW, 312 Cx >> 787 kHz, 604 mV, 83 mW, 290 Cx >> 902 kHz, 608 mV, 96 mW, 288 Cx >> 1017 kHz, 624 mV, 107 mW, 264 Cx >> 1113 kHz, 636 mV, 117 mW, 252 Cx >> 1228 kHz, 652 mV, 130 mW, 240 Cx >> 1344 kHz, 668 mV, 146 mW, 235 Cx >> 1459 kHz, 688 mV, 155 mW, 214 Cx >> 1555 kHz, 704 mV, 166 mW, 205 Cx >> 1670 kHz, 724 mV, 178 mW, 192 Cx >> 1785 kHz, 744 mV, 197 mW, 189 Cx >> 1900 kHz, 764 mV, 221 mW, 190 Cx >> 2016 kHz, 784 mV, 243 mW, 188 Cx >> Your dynamic-power-coefficient for cpu 1: 251 > > This looks pretty convincing and like good work. > > A few questions and suggestions for your commit log. > > I'd really love to know more about how you ran this test. What values > exactly does your power meter give you? > > How did you lock the core to a specific CPU frequency ? > > Maybe also give the equation to calculate Pdyn in the commit log. > > https://patchwork.kernel.org/project/linux-arm-kernel/patch/1500974575-2244-1-git-send-email-wxt@rock-chips.com/#20763985 > > --- > bod The power meter accepts a fixed 4 volts input, and outputs to the battery connector on the board. It is also connected to a computer for data recording, including voltage and current. The CPU frequency pinning and Pdyn calculation is done by a script on the list: [1]. I just removed the power measuring part since it was done on the computer with the meter. I will improve the commit log in v2. [1] https://lore.kernel.org/all/CAD=FV=U1FP0e3_AVHpauUUZtD-5X3XCwh5aT9fH_8S_FFML2Uw@mail.gmail.com/
On 2024/4/25 14:28, Krzysztof Kozlowski wrote: > On 24/04/2024 17:29, Xilin Wu via B4 Relay wrote: >> From: Xilin Wu <wuxilin123@gmail.com> >> >> AYN Odin 2 is a gaming handheld based on QCS8550, which is derived >> from SM8550 but without modem RF system. >> > > > >> + >> +/ { >> + model = "AYN Odin 2"; >> + compatible = "ayn,odin2", "qcom,qcs8550", "qcom,sm8550"; >> + chassis-type = "handset"; >> + >> + qcom,msm-id = <QCOM_ID_QCS8550 0x20000>; >> + qcom,board-id = <0x1001f 0>; > > No, these are not allowed. You did not test your dts. > > It does not look like you tested the DTS against bindings. Please run > `make dtbs_check W=1` (see > Documentation/devicetree/bindings/writing-schema.rst or > https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ > for instructions). > >> + >> + aliases { >> + serial0 = &uart7; >> + serial1 = &uart14; >> + serial2 = &uart15; >> + }; >> + >> + backlight: backlight { >> + compatible = "pwm-backlight"; >> + pwms = <&pmk8550_pwm 0 860000>; >> + brightness-levels = <1023 0>; >> + num-interpolated-steps = <1023>; >> + default-brightness-level = <600>; >> + power-supply = <&vph_pwr>; >> + enable-gpios = <&pmk8550_gpios 5 GPIO_ACTIVE_HIGH>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pwm_backlight_default>; >> + status = "okay"; > > Drop, why do you need it? Do you see it anywhere else in the backlight > nodes in DTS? > > >> + }; >> + >> + fan_pwr: fan-pwr-regulator { >> + compatible = "regulator-fixed"; >> + regulator-name = "fan_pwr"; >> + >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + >> + gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>; >> + enable-active-high; >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&fan_pwr_en>; >> + >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + gpio-keys { >> + compatible = "gpio-keys"; >> + >> + pinctrl-0 = <&volume_up_n>, <&m1_m2_keys_default>; >> + pinctrl-names = "default"; >> + >> + key-volume-up { >> + label = "Volume Up"; >> + linux,code = <KEY_VOLUMEUP>; >> + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; >> + debounce-interval = <15>; >> + linux,can-disable; >> + wakeup-source; >> + }; >> + >> + m1-button { >> + label = "M1"; >> + linux,code = <BTN_TRIGGER_HAPPY1>; >> + gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; >> + }; >> + >> + m2-button { >> + label = "M2"; >> + linux,code = <BTN_TRIGGER_HAPPY2>; >> + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; >> + }; >> + }; >> + >> + hdmi-out { >> + compatible = "hdmi-connector"; >> + type = "d"; >> + hpd-gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>; >> + >> + port { >> + hdmi_con: endpoint { >> + remote-endpoint = <<8912_out>; >> + }; >> + }; >> + }; >> + >> + hdmi_pwr: hdmi-pwr-regulator { >> + compatible = "regulator-fixed"; >> + regulator-name = "hdmi_pwr"; >> + >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + >> + gpio = <&tlmm 10 GPIO_ACTIVE_HIGH>; >> + enable-active-high; >> + }; >> + >> + vdd_lcm_2p8: vdd-lcm-2p8-regulator { >> + compatible = "regulator-fixed"; >> + regulator-name = "vdd_lcm_2p8"; >> + >> + regulator-min-microvolt = <2800000>; >> + regulator-max-microvolt = <2800000>; >> + >> + gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>; >> + enable-active-high; >> + }; >> + >> + led_left_side: led-controller-1 { >> + compatible = "pwm-leds-multicolor"; >> + >> + multi-led { >> + label = "left-side"; >> + color = <LED_COLOR_ID_RGB>; >> + max-brightness = <255>; >> + >> + led-red { >> + color = <LED_COLOR_ID_RED>; >> + pwms = <&pwm_rgb_left 0>; >> + }; >> + >> + led-green { >> + color = <LED_COLOR_ID_GREEN>; >> + pwms = <&pwm_rgb_left 1>; >> + }; >> + >> + led-blue { >> + color = <LED_COLOR_ID_BLUE>; >> + pwms = <&pwm_rgb_left 2>; >> + }; >> + }; >> + }; >> + >> + led_left_joystick: led-controller-2 { >> + compatible = "pwm-leds-multicolor"; >> + >> + multi-led { >> + label = "left-joystick"; >> + color = <LED_COLOR_ID_RGB>; >> + max-brightness = <255>; >> + >> + led-red { >> + color = <LED_COLOR_ID_RED>; >> + pwms = <&pwm_rgb_left 6>; >> + }; >> + >> + led-green { >> + color = <LED_COLOR_ID_GREEN>; >> + pwms = <&pwm_rgb_left 7>; >> + }; >> + >> + led-blue { >> + color = <LED_COLOR_ID_BLUE>; >> + pwms = <&pwm_rgb_left 8>; >> + }; >> + }; >> + }; >> + >> + led_right_side: led-controller-3 { >> + compatible = "pwm-leds-multicolor"; >> + >> + multi-led { >> + label = "right-side"; >> + color = <LED_COLOR_ID_RGB>; >> + max-brightness = <255>; >> + >> + led-red { >> + color = <LED_COLOR_ID_RED>; >> + pwms = <&pwm_rgb_right 0>; >> + }; >> + >> + led-green { >> + color = <LED_COLOR_ID_GREEN>; >> + pwms = <&pwm_rgb_right 1>; >> + }; >> + >> + led-blue { >> + color = <LED_COLOR_ID_BLUE>; >> + pwms = <&pwm_rgb_right 2>; >> + }; >> + }; >> + }; >> + >> + led_right_joystick: led-controller-4 { >> + compatible = "pwm-leds-multicolor"; >> + >> + multi-led { >> + label = "right-joystick"; >> + color = <LED_COLOR_ID_RGB>; >> + max-brightness = <255>; >> + >> + led-red { >> + color = <LED_COLOR_ID_RED>; >> + pwms = <&pwm_rgb_right 6>; >> + }; >> + >> + led-green { >> + color = <LED_COLOR_ID_GREEN>; >> + pwms = <&pwm_rgb_right 7>; >> + }; >> + >> + led-blue { >> + color = <LED_COLOR_ID_BLUE>; >> + pwms = <&pwm_rgb_right 8>; >> + }; >> + }; >> + }; >> + >> + mcu_3v3: mcu-3v3-regulator { > > Name all regulators regulator-n, where n is decimal number. Then order > the nodes by name. > > > ... > >> + >> +&i2c4 { >> + clock-frequency = <400000>; >> + status = "okay"; >> + >> + touchscreen@20 { >> + compatible = "syna,rmi4-i2c"; >> + reg = <0x20>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + interrupts-extended = <&tlmm 25 0x2008>; >> + >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <&ts_int_default>; >> + pinctrl-1 = <&ts_int_sleep>; >> + >> + vio-supply = <&vreg_l12b_1p8>; >> + >> + syna,startup-delay-ms = <200>; >> + syna,reset-delay-ms = <200>; >> + >> + rmi4-f01@1 { >> + syna,nosleep-mode = <0x1>; >> + reg = <0x1>; >> + }; >> + >> + rmi4-f12@12 { >> + reg = <0x12>; >> + syna,rezero-wait-ms = <20>; >> + syna,clip-x-low = <0>; >> + syna,clip-y-low = <0>; >> + syna,clip-x-high = <1080>; >> + syna,clip-y-high = <1920>; >> + syna,sensor-type = <1>; >> + touchscreen-inverted-x; >> + }; >> + }; > > Please confirm the status of dtbs_check for your board. I am pretty sure > it fails. > > Best regards, > Krzysztof > I will correct all the mistakes in v2. Thanks for catching them!
On 24.04.2024 5:29 PM, Xilin Wu via B4 Relay wrote: > From: Xilin Wu <wuxilin123@gmail.com> > > AYN Odin 2 is a gaming handheld based on QCS8550, which is derived > from SM8550 but without modem RF system. > > This commit brings support for: > * Remoteprocs > * UFS storage > * SD Card > * Type-C with USB3 10Gbps and DisplayPort (4-lane requires a pending > patch) > * PCIe0 (Wi-Fi requires the pending pwrseq series) > * Bluetooth > * Regulators > * Integrated fan with automatic speed control based on CPU temperature > * Power and volume keys > * M1, M2 buttons > * HDMI output up to 1080p 60hz > * four groups of RGB lights > * GPU > * Internal DSI display with touchscreen > > Signed-off-by: Xilin Wu <wuxilin123@gmail.com> > --- [...] > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + pwms = <&pmk8550_pwm 0 860000>; > + brightness-levels = <1023 0>; Huh? Is min/max swapped? > + num-interpolated-steps = <1023>; > + default-brightness-level = <600>; > + power-supply = <&vph_pwr>; > + enable-gpios = <&pmk8550_gpios 5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pwm_backlight_default>; property-n property-names [...] > + cooling-maps { > + map0 { > + trip = <&cpuss0_active0>; > + cooling-device = <&fan 0 1>; > + }; Please adda a newline between each subnode [...] > + /* Setting regulator-allow-set-load here will crash the device */ ?? > + vreg_l17b_2p5: ldo17 { > + regulator-name = "vreg_l17b_2p5"; > + regulator-min-microvolt = <2504000>; > + regulator-max-microvolt = <2504000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + [...] > + > + backlight = <&backlight>; > + /* touchscreen and display panel share the same reset gpio! */ > + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; Perhaps you would be interested in drm_panel_follower [...] > + > +&sdhc_2 { > + cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&sdc2_default &sdc2_card_det_n>; > + pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>; > + vmmc-supply = <&vreg_l9b_2p9>; > + vqmmc-supply = <&vreg_l8b_1p8>; > + bus-width = <4>; > + no-sdio; > + no-mmc; > + > + /* SDR104 does seem to be working on this device*/ > + /delete-property/ sdhci-caps-mask; Eeeh.. I'm not sure about this. Maybe it still has some issues that don't manifest immediately. [...] > +&uart15 { > + status = "okay"; > + > + /* Gamepad controlled by onboard MCU */ As in, that MCU is connected to 8550 through this UART port? Konrad
AYN Odin 2 is a gaming handheld based on QCS8550, which is derived from SM8550 but without modem RF system. This series bring support for: * Remoteprocs * UFS storage * SD Card * Type-C with USB3 10Gbps and DisplayPort (4-lane requires a pending patch) * PCIe0 (Wi-Fi requires the pending pwrseq series) * Bluetooth * Regulators * Integrated fan with automatic speed control based on CPU temperature * Power and volume keys * M1, M2 buttons * HDMI output up to 1080p 60hz * four groups of RGB lights * GPU * Internal DSI display with touchscreen Depends: [1] [1] https://lore.kernel.org/all/20240424024508.3857602-1-quic_tengfan@quicinc.com/ Signed-off-by: Xilin Wu <wuxilin123@gmail.com> --- Junhao Xie (2): dt-bindings: pwm: Add SI-EN SN3112 PWM support pwm: Add SI-EN SN3112 PWM support Xilin Wu (8): dt-bindings: display: panel: Add Synaptics TD4328 drm/panel: Add driver for Synaptics TD4328 LCD panel arm64: dts: qcom: pmk8550: Add PWM controller arm64: dts: qcom: sm8550: Add UART15 arm64: dts: qcom: sm8550: Update EAS properties dt-bindings: vendor-prefixes: Add AYN Technologies dt-bindings: arm: qcom: Add AYN Odin 2 arm64: dts: qcom: Add AYN Odin 2 Documentation/devicetree/bindings/arm/qcom.yaml | 1 + .../bindings/display/panel/synaptics,td4328.yaml | 69 + .../devicetree/bindings/pwm/si-en,sn3112-pwm.yaml | 55 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/pmk8550.dtsi | 10 + arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts | 1410 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 54 +- drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-synaptics-td4328.c | 246 ++++ drivers/pwm/Kconfig | 10 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sn3112.c | 336 +++++ 14 files changed, 2190 insertions(+), 16 deletions(-) --- base-commit: 90388b2f9fa5f332289335f99996e252697c0242 change-id: 20240424-ayn-odin2-initial-95b7c060cd03 Best regards,