Message ID | 20230829171647.187787-1-knaerzche@gmail.com |
---|---|
Headers | show |
Series | Fix and improve Rockchip RK3128 support | expand |
On 29/08/2023 19:16, Alex Bee wrote: > Currently there is only a SoC devicetree for RK3128 although RK312x > SoC family consits of (at least) RK3126(C) and RK3128. > > This splits up the currently existing rk3128.dtsi in rk312x.dtsi which > contains the common definitions for both SoCs and rk3128.dtsi, rk3126.dtsi > respectivly. typos here and before > > The differentiation between rk3126/rk3128 is already taken into account > in the clock driver and they have their own compatibles. > uart0 and i2c3 exist only in rk3128 SoC, thus they are moved to the new > rk3128.dtsi. > > Signed-off-by: Alex Bee <knaerzche@gmail.com> > --- > arch/arm/boot/dts/rockchip/rk3126.dtsi | 9 + > arch/arm/boot/dts/rockchip/rk3128.dtsi | 894 +------------------------ > arch/arm/boot/dts/rockchip/rk312x.dtsi | 893 ++++++++++++++++++++++++ Please generate your patches with proper -M/-B/-C arguments to detect the rename/copy. > 3 files changed, 909 insertions(+), 887 deletions(-) > create mode 100644 arch/arm/boot/dts/rockchip/rk3126.dtsi > create mode 100644 arch/arm/boot/dts/rockchip/rk312x.dtsi > > diff --git a/arch/arm/boot/dts/rockchip/rk3126.dtsi b/arch/arm/boot/dts/rockchip/rk3126.dtsi > new file mode 100644 > index 000000000000..7345bd95d29d > --- /dev/null > +++ b/arch/arm/boot/dts/rockchip/rk3126.dtsi > @@ -0,0 +1,9 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > + > +/dts-v1/; > + > +#include "rk312x.dtsi" > + > +/ { > + compatible = "rockchip,rk3126"; > +}; > diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi > index f3f0788195d2..4c5c9728179e 100644 > --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi > +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi > @@ -1,360 +1,11 @@ > -// SPDX-License-Identifier: GPL-2.0+ > -/* > - * (C) Copyright 2017 Rockchip Electronics Co., Ltd > - */ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) This looks like relicensing, so without proper diff (see comment before) it is a no-go. > > -#include <dt-bindings/clock/rk3128-cru.h> > -#include <dt-bindings/gpio/gpio.h> > -#include <dt-bindings/interrupt-controller/arm-gic.h> > -#include <dt-bindings/interrupt-controller/irq.h> > -#include <dt-bindings/pinctrl/rockchip.h> > +/dts-v1/; > + > +#include "rk312x.dtsi" > > / { > compatible = "rockchip,rk3128"; > - interrupt-parent = <&gic>; > - #address-cells = <1>; > - #size-cells = <1>; > - > - arm-pmu { > - compatible = "arm,cortex-a7-pmu"; > - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; > - }; > - > - cpus { > - #address-cells = <1>; > - #size-cells = <0>; > - > - cpu0: cpu@f00 { > - device_type = "cpu"; > - compatible = "arm,cortex-a7"; > - reg = <0xf00>; > - clock-latency = <40000>; > - clocks = <&cru ARMCLK>; > - operating-points = < > - /* KHz uV */ > - 816000 1000000 > - >; > - #cooling-cells = <2>; /* min followed by max */ > - }; All this patch is absolutely unreadable and unreviewable. Sorry, use the tools to make review possible. Best regards, Krzysztof
On 29/08/2023 19:16, Alex Bee wrote: > RK312x SoCs have 8KB of SRAM. > Add the respective device tree node for it. > > Signed-off-by: Alex Bee <knaerzche@gmail.com> > --- This really does not depend on your MFD, GPU nor ASoC changes. Keep independent work for different subsystems separate. Best regards, Krzysztof
On 29/08/2023 19:16, Alex Bee wrote:
> Add the reset controls for all 4 cpu cores.
This we see from the diff. Commit should say why.
Best regards,
Krzysztof
On 29/08/2023 19:16, Alex Bee wrote: > From: Finley Xiao <finley.xiao@rock-chips.com> > > According to the TRM there are no specific cpll_peri, gpll_div2_peri or > gpll_div3_peri gates, but a single clk_peri_src gate and the peri mux > directly connects to the plls respectivly the pll divider clocks. > Fix this by creating a single gated composite. > > Also rename all occurrences of "aclk_peri_src*" to clk_peri_src, since it > is the parent for both peri aclks and hclks and that also matches the > naming in the TRM. > > Fixes: f6022e88faca ("clk: rockchip: add clock controller for rk3128") > Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> > [renamed aclk_peri_src -> clk_peri_src and added commit message] > Signed-off-by: Alex Bee <knaerzche@gmail.com> Please send fixes as separate patchset. Don't mix it with other work and definitely it should not be in the middle of the patchset. Best regards, Krzysztof
Hi Krzysztof, thanks for your quick feedback. You're right: This series mixes up too many things. I'll split up and re-send. (And fix my typos, indeed) Best Regards, Alex Am 29.08.23 um 19:40 schrieb Krzysztof Kozlowski: > On 29/08/2023 19:16, Alex Bee wrote: >> From: Finley Xiao <finley.xiao@rock-chips.com> >> >> According to the TRM there are no specific cpll_peri, gpll_div2_peri or >> gpll_div3_peri gates, but a single clk_peri_src gate and the peri mux >> directly connects to the plls respectivly the pll divider clocks. >> Fix this by creating a single gated composite. >> >> Also rename all occurrences of "aclk_peri_src*" to clk_peri_src, since it >> is the parent for both peri aclks and hclks and that also matches the >> naming in the TRM. >> >> Fixes: f6022e88faca ("clk: rockchip: add clock controller for rk3128") >> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> >> [renamed aclk_peri_src -> clk_peri_src and added commit message] >> Signed-off-by: Alex Bee <knaerzche@gmail.com> > Please send fixes as separate patchset. Don't mix it with other work and > definitely it should not be in the middle of the patchset. > > Best regards, > Krzysztof >
On 29-08-23, 19:16, Alex Bee wrote: > Commit 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ") added ID > detection interrupt registers. However the current implementation assumes > that falling and rising edge interrupt are always enabled in registers > spaning over subsequent bits. > That is not the case for RK312x's version of the phy and this > implementation can't be used as-is, since there are bits with different > purpose in between. > > This splits up the register definitions for id_det_en, id_det_en and > id_det_clr registers in rising and falling edge variants. > It's required as preparation to support RK312x's Innosilicon usb2 phy as > well in this driver and matches pretty much to what the vendor does, so I'm > not expecting issues for other SoCs with that change. This fails to apply for phy/next
On Tue, 29 Aug 2023 19:16:16 +0200, Alex Bee wrote: > this series fixes some issues I found when testing my "new" RK3128 board > with the mainline kernel and adds some core functionality like SMP bringup, > usb and networking. > > The propably most distinctive change is the split up of the DTs for the > different SoCs of this platform: RK3126 and RK3128. Even if I'm not adding > a RK3126 board in this series: I think this change should be done as early > as possible in order to avoid issues in future. > Actually it should have been done like that in the first place. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [03/31] dt-bindings: ASoC: rockchip: Add compatible for RK3128 spdif commit: 5c8a033f5674ae62d5aa2ebbdb9980b89380c34f All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
On Tue, 29 Aug 2023 19:16:16 +0200, Alex Bee wrote: > this series fixes some issues I found when testing my "new" RK3128 board > with the mainline kernel and adds some core functionality like SMP bringup, > usb and networking. > > The propably most distinctive change is the split up of the DTs for the > different SoCs of this platform: RK3126 and RK3128. Even if I'm not adding > a RK3126 board in this series: I think this change should be done as early > as possible in order to avoid issues in future. > Actually it should have been done like that in the first place. > > [...] Applied, thanks! [08/31] phy: rockchip-inno-usb2: Split ID interrupt phy registers commit: 2fda59099462ee700e424ba3ac928d13ad6389a8 [09/31] phy: phy-rockchip-inno-usb2: Add RK3128 support commit: 62ff41017e147472b07de6125c3be82ce02a8dd7 Best regards,
Hi Alex, Am Dienstag, 29. August 2023, 19:16:16 CET schrieb Alex Bee: > this series fixes some issues I found when testing my "new" RK3128 board > with the mainline kernel and adds some core functionality like SMP bringup, > usb and networking. before I discard this thread, is everything from here migrated to separate serieses or are there patches in this big pile that are still relevant on their own, that haven't been applied? [I lost track of what did go where ;-) ] Thanks Heiko
Hi Heiko Am 12.12.23 um 21:03 schrieb Heiko Stuebner: > Hi Alex, > > Am Dienstag, 29. August 2023, 19:16:16 CET schrieb Alex Bee: >> this series fixes some issues I found when testing my "new" RK3128 board >> with the mainline kernel and adds some core functionality like SMP bringup, >> usb and networking. > before I discard this thread, is everything from here migrated to > separate serieses or are there patches in this big pile that are still > relevant on their own, that haven't been applied? > [I lost track of what did go where ;-) ] No worries - I kept track :) Not everything is re-sent yet (sound nodes, RK3126/RK3128 split-up) but you can discard this and will re-send everything left in separate series (as I said [0]) [0] https://lore.kernel.org/linux-arm-kernel/170109134007.42627.12929766893521974712.b4-ty@kernel.org/T/#m63efa1c1379353b5cf764d2f9a260cf0329c864c Regards, Alex > > > Thanks > Heiko > >