mbox series

[v2,0/4] Move Loongson1 MAC arch-code to the driver dir

Message ID 20230816111310.1656224-1-keguang.zhang@gmail.com
Headers show
Series Move Loongson1 MAC arch-code to the driver dir | expand

Message

Keguang Zhang Aug. 16, 2023, 11:13 a.m. UTC 
In order to convert Loongson1 MAC platform devices to the devicetree
nodes, Loongson1 MAC arch-code should be moved to the driver dir.
Add dt-binding document and update MAINTAINERS file accordingly. 
    
In other words, this patchset is a preparation for converting
Loongson1 platform devices to devicetree.

Changelog
V1 -> V2: Leave the Ethernet platform data for now
          Make the syscon compatibles more specific
          Fix "clock-names" and "interrupt-names" property
          Rename the syscon property to "loongson,dwmac-syscon"
          Drop "phy-handle" and "phy-mode" requirement
          Revert adding loongson,ls1b-dwmac/loongson,ls1c-dwmac
          to snps,dwmac.yaml
          Fix the build errors due to CONFIG_OF being unset
          Change struct reg_field definitions to const
          Rename the syscon property to "loongson,dwmac-syscon"
          Add MII PHY mode for LS1C
          Improve the commit message

Keguang Zhang (4):
  dt-bindings: mfd: syscon: Add compatibles for Loongson-1 syscon
  dt-bindings: net: Add Loongson-1 DWMAC glue layer
  net: stmmac: Add glue layer for Loongson-1 SoC
  MAINTAINERS: Update MIPS/LOONGSON1 entry

 .../devicetree/bindings/mfd/syscon.yaml       |   2 +
 .../bindings/net/loongson,ls1x-dwmac.yaml     |  98 +++++++
 MAINTAINERS                                   |   2 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  11 +
 drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
 .../ethernet/stmicro/stmmac/dwmac-loongson1.c | 273 ++++++++++++++++++
 6 files changed, 387 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/loongson,ls1x-dwmac.yaml
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c


base-commit: ef66bf8aeb91fd331cf8f5dca8f9d7bca9ab2849

Comments

Simon Horman Aug. 19, 2023, 7:05 p.m. UTC | #1 
On Wed, Aug 16, 2023 at 07:13:09PM +0800, Keguang Zhang wrote:
> This glue driver is created based on the arch-code
> implemented earlier with the platform-specific settings.
> 
> Use syscon for SYSCON register access.
> 
> Partialy based on the previous work by Serge Semin.

Hi Keguang Zhang,

as it looks like there will be a v3 for other reasons,
a minor nit from my side: Partialy -> Partially

...
Andrew Lunn Aug. 20, 2023, 7:04 p.m. UTC | #2 
> +static int ls1b_dwmac_syscon_init(struct plat_stmmacenet_data *plat)
> +{
> +	struct ls1x_dwmac *dwmac = plat->bsp_priv;
> +	struct regmap_field **regmap_fields = dwmac->regmap_fields;
> +
> +	if (plat->bus_id) {
> +		regmap_field_write(regmap_fields[GMAC1_USE_UART1], 1);
> +		regmap_field_write(regmap_fields[GMAC1_USE_UART0], 1);
> +
> +		switch (plat->phy_interface) {
> +		case PHY_INTERFACE_MODE_RGMII:
> +			regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 0);
> +			regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 0);
> +			break;

What about the other three RGMII modes? Plain rgmii is pretty unusual,
rgmii-id is the most used.

> +		case PHY_INTERFACE_MODE_MII:
> +			regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 1);
> +			regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 1);
> +			break;
> +		default:
> +			dev_err(dwmac->dev, "Unsupported PHY mode %u\n",
> +				plat->phy_interface);
> +			return -EOPNOTSUPP;
> +		}
> +
> +		regmap_field_write(regmap_fields[GMAC1_SHUT], 0);
> +	} else {
> +		switch (plat->phy_interface) {
> +		case PHY_INTERFACE_MODE_RGMII:
> +			regmap_field_write(regmap_fields[GMAC0_USE_TXCLK], 0);
> +			regmap_field_write(regmap_fields[GMAC0_USE_PWM01], 0);
> +			break;

same here.

     Andrew
Keguang Zhang Aug. 21, 2023, 1:27 p.m. UTC | #3 
On Sun, Aug 20, 2023 at 3:05 AM Simon Horman <horms@kernel.org> wrote:
>
> On Wed, Aug 16, 2023 at 07:13:09PM +0800, Keguang Zhang wrote:
> > This glue driver is created based on the arch-code
> > implemented earlier with the platform-specific settings.
> >
> > Use syscon for SYSCON register access.
> >
> > Partialy based on the previous work by Serge Semin.
>
> Hi Keguang Zhang,
>
> as it looks like there will be a v3 for other reasons,
> a minor nit from my side: Partialy -> Partially
>
Will do.
Thanks!
> ...
Keguang Zhang Aug. 22, 2023, 9:47 a.m. UTC | #4 
On Mon, Aug 21, 2023 at 3:04 AM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > +static int ls1b_dwmac_syscon_init(struct plat_stmmacenet_data *plat)
> > +{
> > +     struct ls1x_dwmac *dwmac = plat->bsp_priv;
> > +     struct regmap_field **regmap_fields = dwmac->regmap_fields;
> > +
> > +     if (plat->bus_id) {
> > +             regmap_field_write(regmap_fields[GMAC1_USE_UART1], 1);
> > +             regmap_field_write(regmap_fields[GMAC1_USE_UART0], 1);
> > +
> > +             switch (plat->phy_interface) {
> > +             case PHY_INTERFACE_MODE_RGMII:
> > +                     regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 0);
> > +                     regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 0);
> > +                     break;
>
> What about the other three RGMII modes? Plain rgmii is pretty unusual,
> rgmii-id is the most used.
>
According to the LS1B datasheet, only RGMII and MII are supported.
And I can confirm that MII mode does work for LS1B.

> > +             case PHY_INTERFACE_MODE_MII:
> > +                     regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 1);
> > +                     regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 1);
> > +                     break;
> > +             default:
> > +                     dev_err(dwmac->dev, "Unsupported PHY mode %u\n",
> > +                             plat->phy_interface);
> > +                     return -EOPNOTSUPP;
> > +             }
> > +
> > +             regmap_field_write(regmap_fields[GMAC1_SHUT], 0);
> > +     } else {
> > +             switch (plat->phy_interface) {
> > +             case PHY_INTERFACE_MODE_RGMII:
> > +                     regmap_field_write(regmap_fields[GMAC0_USE_TXCLK], 0);
> > +                     regmap_field_write(regmap_fields[GMAC0_USE_PWM01], 0);
> > +                     break;
>
> same here.
>
>      Andrew
Keguang Zhang Aug. 22, 2023, 9:49 a.m. UTC | #5 
On Tue, Aug 22, 2023 at 5:47 PM Keguang Zhang <keguang.zhang@gmail.com> wrote:
>
> On Mon, Aug 21, 2023 at 3:04 AM Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > > +static int ls1b_dwmac_syscon_init(struct plat_stmmacenet_data *plat)
> > > +{
> > > +     struct ls1x_dwmac *dwmac = plat->bsp_priv;
> > > +     struct regmap_field **regmap_fields = dwmac->regmap_fields;
> > > +
> > > +     if (plat->bus_id) {
> > > +             regmap_field_write(regmap_fields[GMAC1_USE_UART1], 1);
> > > +             regmap_field_write(regmap_fields[GMAC1_USE_UART0], 1);
> > > +
> > > +             switch (plat->phy_interface) {
> > > +             case PHY_INTERFACE_MODE_RGMII:
> > > +                     regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 0);
> > > +                     regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 0);
> > > +                     break;
> >
> > What about the other three RGMII modes? Plain rgmii is pretty unusual,
> > rgmii-id is the most used.
> >
> According to the LS1B datasheet, only RGMII and MII are supported.
> And I can confirm that MII mode does work for LS1B.
>
Sorry! The RGMII mode does work for LS1B.

> > > +             case PHY_INTERFACE_MODE_MII:
> > > +                     regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 1);
> > > +                     regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 1);
> > > +                     break;
> > > +             default:
> > > +                     dev_err(dwmac->dev, "Unsupported PHY mode %u\n",
> > > +                             plat->phy_interface);
> > > +                     return -EOPNOTSUPP;
> > > +             }
> > > +
> > > +             regmap_field_write(regmap_fields[GMAC1_SHUT], 0);
> > > +     } else {
> > > +             switch (plat->phy_interface) {
> > > +             case PHY_INTERFACE_MODE_RGMII:
> > > +                     regmap_field_write(regmap_fields[GMAC0_USE_TXCLK], 0);
> > > +                     regmap_field_write(regmap_fields[GMAC0_USE_PWM01], 0);
> > > +                     break;
> >
> > same here.
> >
> >      Andrew
>
>
>
> --
> Best regards,
>
> Keguang Zhang
Andrew Lunn Aug. 22, 2023, 3:20 p.m. UTC | #6 
> > What about the other three RGMII modes? Plain rgmii is pretty unusual,
> > rgmii-id is the most used.
> >
> According to the LS1B datasheet, only RGMII and MII are supported.
> And I can confirm that MII mode does work for LS1B.

What does your device tree look like? What are you setting phy-mode to
in the rgmii case? As i said, "rgmii" is pretty unusual, you normally
need "rgmii-id".

Something in the system needs to add 2ns delays to the RGMII clock
lines. Generally in device tree you pass phy-mode = "rgmii-id"; The
MAC configures itself for RGMII, and passes
PHY_INTERFACE_MODE_RGMII_ID to the PHY when it is attached. The PHY
then inserts the delays.

What is inserting the delays in your system?

     Andrew
Andrew Lunn Aug. 22, 2023, 3:21 p.m. UTC | #7 
> Sorry! The RGMII mode does work for LS1B.

and the question then is: How does it work?

    Andrew
Keguang Zhang Aug. 23, 2023, 2:47 a.m. UTC | #8 
On Tue, Aug 22, 2023 at 11:20 PM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > > What about the other three RGMII modes? Plain rgmii is pretty unusual,
> > > rgmii-id is the most used.
> > >
> > According to the LS1B datasheet, only RGMII and MII are supported.
> > And I can confirm that MII mode does work for LS1B.
>
> What does your device tree look like? What are you setting phy-mode to
> in the rgmii case? As i said, "rgmii" is pretty unusual, you normally
> need "rgmii-id".
>
> Something in the system needs to add 2ns delays to the RGMII clock
> lines. Generally in device tree you pass phy-mode = "rgmii-id"; The
> MAC configures itself for RGMII, and passes
> PHY_INTERFACE_MODE_RGMII_ID to the PHY when it is attached. The PHY
> then inserts the delays.
>
> What is inserting the delays in your system?
>
I understand the delay issue of RGMII.
Just tried phy-mode = "rgmii-id", it still works.
I will use PHY_INTERFACE_MODE_RGMII_ID instead.
Thanks!

>      Andrew
>
Andrew Lunn Aug. 23, 2023, 3:46 a.m. UTC | #9 
> I understand the delay issue of RGMII.
> Just tried phy-mode = "rgmii-id", it still works.

That indicates something is broken. Both "rgmii-id" and "rgmii" should
not work, just one of them. What PHY driver are you using?

    Andrew
Keguang Zhang Aug. 23, 2023, 4:40 a.m. UTC | #10 
On Wed, Aug 23, 2023 at 11:46 AM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > I understand the delay issue of RGMII.
> > Just tried phy-mode = "rgmii-id", it still works.
>
> That indicates something is broken. Both "rgmii-id" and "rgmii" should
> not work, just one of them. What PHY driver are you using?
>
I used generic PHY driver.
Both "rgmii" and "rgmii-id" work with this driver.
The PHY is RTL8211E.
So I switch the PHY driver to Realtek driver.
Now only "rgmii-id" works.
Thanks!

>     Andrew
>


--
Best regards,

Keguang Zhang