Message ID | 20230511173211.9127-1-sumitg@nvidia.com |
---|---|
Headers | show |
Series | Tegra234 Memory interconnect support | expand |
On 11/05/2023 19:32, Sumit Gupta wrote: > Hi All, > > Have incorporated the suggestions in v7. Only changed 'patch 1' in v7 > to fix possible race when setting 'mc->bpmp' as pointed by Krzysztof. > Requesting to merge the patch series. > Can I apply it since you request it? I asked you long time ago to clearly state dependencies or merging limitations. It's v8 and cover letter still does not state it. Neither the patches do. Best regards, Krzysztof
On 14/05/23 16:11, Krzysztof Kozlowski wrote: > External email: Use caution opening links or attachments > > > On 11/05/2023 19:32, Sumit Gupta wrote: >> Hi All, >> >> Have incorporated the suggestions in v7. Only changed 'patch 1' in v7 >> to fix possible race when setting 'mc->bpmp' as pointed by Krzysztof. >> Requesting to merge the patch series. >> > > Can I apply it since you request it? Yes, the patch series can be applied in current sequence except that the 'patch 4' comes before 'patch 3' (just realized). Would you please swap 'patch 4' with 'patch 3' while applying (or) you want me to re-send? I asked you long time ago to > clearly state dependencies or merging limitations. It's v8 and cover > letter still does not state it. Neither the patches do. > I added the dependency list in previous versions [7] but removed thinking the patch series will now be applied altogether. [7] https://lore.kernel.org/lkml/20230424131337.20151-1-sumitg@nvidia.com/ Thank you, Sumit Gupta
On Sun, May 14, 2023 at 12:41:45PM +0200, Krzysztof Kozlowski wrote: > On 11/05/2023 19:32, Sumit Gupta wrote: > > Hi All, > > > > Have incorporated the suggestions in v7. Only changed 'patch 1' in v7 > > to fix possible race when setting 'mc->bpmp' as pointed by Krzysztof. > > Requesting to merge the patch series. > > > > Can I apply it since you request it? I asked you long time ago to > clearly state dependencies or merging limitations. It's v8 and cover > letter still does not state it. Neither the patches do. I thought we had discussed and agreed to merge this through the Tegra tree, which is why you had provided Acked-bys on all the patches. I was waiting for a final Acked-by on patch 1, since that was the only one still being revised. If you prefer to merge this, that works for me too. In that case, the series: Acked-by: Thierry Reding <treding@nvidia.com> Although it might be good if I pick up at least patch 8, just as a precautionary measure to avoid potential conflicts going forward. As I understand, it should be safe to apply that separately. Thierry
On 15/05/2023 18:18, Thierry Reding wrote: > On Sun, May 14, 2023 at 12:41:45PM +0200, Krzysztof Kozlowski wrote: >> On 11/05/2023 19:32, Sumit Gupta wrote: >>> Hi All, >>> >>> Have incorporated the suggestions in v7. Only changed 'patch 1' in v7 >>> to fix possible race when setting 'mc->bpmp' as pointed by Krzysztof. >>> Requesting to merge the patch series. >>> >> >> Can I apply it since you request it? I asked you long time ago to >> clearly state dependencies or merging limitations. It's v8 and cover >> letter still does not state it. Neither the patches do. > > I thought we had discussed and agreed to merge this through the Tegra > tree, which is why you had provided Acked-bys on all the patches. I was > waiting for a final Acked-by on patch 1, since that was the only one > still being revised. > > If you prefer to merge this, that works for me too. In that case, the > series: > > Acked-by: Thierry Reding <treding@nvidia.com> I have short memory and that's why we have cover letter. Solves all the problems. Let me ack it now. Best regards, Krzysztof
On 11/05/2023 19:32, Sumit Gupta wrote: > Add Interconnect framework support to dynamically set the DRAM > bandwidth from different clients. Both the MC and EMC drivers are > added as ICC providers. The path for any request is: > MC-Client[1-n] -> MC -> EMC -> EMEM/DRAM > > MC client's request for bandwidth will go to the MC driver which > passes the client request info like BPMP Client ID, Client type > and the Bandwidth to the BPMP-FW. The final DRAM freq to achieve > the requested bandwidth is set by the BPMP-FW based on the passed > parameters. > > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> > --- > drivers/memory/tegra/mc.c | 5 + > drivers/memory/tegra/tegra186-emc.c | 133 +++++++++++++++++++++++++++ > drivers/memory/tegra/tegra234.c | 138 +++++++++++++++++++++++++++- > include/linux/tegra-icc.h | 65 +++++++++++++ > include/soc/tegra/mc.h | 7 ++ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof