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[0/5] phy: qcom-qmp-usb: split away legacy USB+DP code

Message ID 20230324215550.1966809-1-dmitry.baryshkov@linaro.org
Headers show
Series phy: qcom-qmp-usb: split away legacy USB+DP code | expand

Message

Dmitry Baryshkov March 24, 2023, 9:55 p.m. UTC 
While working on the QMP binding cleanup, I noticed that USB QMP driver
supports both simple USB PHYs (which should be updated) and USB-only
part of USB+DP PHYs (which are largely legacy and don't need to be
updated). To ease further cleanup perform a quick cleanup of the last
remaining USB+DP PHY (on sm8150 platform) and split the legacy codepath
from the USB QMP PHY driver.

Dmitry Baryshkov (5):
  dt-bindings: phy: qcom,sc7180-qmp-usb3-dp-phy: add sm8150 USB+DP PHY
  phy: qcom-qmp-combo: add support for the USB+DP PHY on SM8150 platform
  arm64: dts: qcom: sm8150: turn first USB PHY into USB+DP PHY
  dt-bindings: phy: qcom,msm8996-qmp-usb3-phy: drop legacy bindings
  phy: qcom-qmp-usb: split off the legacy USB+dp_com support

 .../phy/qcom,msm8996-qmp-usb3-phy.yaml        |   80 -
 .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml      |    2 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi          |   17 +-
 drivers/phy/qualcomm/Kconfig                  |   10 +
 drivers/phy/qualcomm/Makefile                 |    1 +
 drivers/phy/qualcomm/phy-qcom-qmp-combo.c     |    4 +
 .../phy/qualcomm/phy-qcom-qmp-usb-legacy.c    | 1407 +++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  556 -------
 8 files changed, 1437 insertions(+), 640 deletions(-)
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c

Comments

Neil Armstrong March 27, 2023, 7:59 a.m. UTC | #1 
On 24/03/2023 22:55, Dmitry Baryshkov wrote:
> The first USB PHY on the sm8150 platform is really the USB+DP combo
> PHY. Add the DP part of the PHY.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++----
>   1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 9491be4a6bf0..a618218f7b68 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -3392,20 +3392,19 @@ usb_2_hsphy: phy@88e3000 {
>   		};
>   
>   		usb_1_qmpphy: phy@88e9000 {
> -			compatible = "qcom,sm8150-qmp-usb3-phy";
> +			compatible = "qcom,sm8150-qmp-usb3-dp-phy";
>   			reg = <0 0x088e9000 0 0x18c>,
> -			      <0 0x088e8000 0 0x10>;
> +			      <0 0x088e8000 0 0x38>,
> +			      <0 0x088ea000 0 0x40>;
>   			status = "disabled";
>   			#address-cells = <2>;
>   			#size-cells = <2>;
>   			ranges;
> -
>   			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>   				 <&rpmhcc RPMH_CXO_CLK>,
>   				 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>   				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>   			clock-names = "aux", "ref_clk_src", "ref", "com_aux";
> -
>   			resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>   				 <&gcc GCC_USB3_PHY_PRIM_BCR>;
>   			reset-names = "phy", "common";
> @@ -3423,6 +3422,16 @@ usb_1_ssphy: phy@88e9200 {
>   				clock-names = "pipe0";
>   				clock-output-names = "usb3_phy_pipe_clk_src";
>   			};
> +
> +			usb_1_dpphy: phy@88ea200 {
> +				reg = <0 0x088ea200 0 0x200>,
> +				      <0 0x088ea400 0 0x200>,
> +				      <0 0x088eaa00 0 0x200>,
> +				      <0 0x088ea600 0 0x200>,
> +				      <0 0x088ea800 0 0x200>;
> +				#clock-cells = <1>;
> +				#phy-cells = <0>;
> +			};

Is there a reason why the new flat bindings from qcom,sc8280xp-qmp-usb43dp-phy.yaml are not used instead ?

Neil

>   		};
>   
>   		usb_2_qmpphy: phy@88eb000 {
Neil Armstrong March 27, 2023, 8:05 a.m. UTC | #2 
On 27/03/2023 09:59, Neil Armstrong wrote:
> On 24/03/2023 22:55, Dmitry Baryshkov wrote:
>> The first USB PHY on the sm8150 platform is really the USB+DP combo
>> PHY. Add the DP part of the PHY.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++----
>>   1 file changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index 9491be4a6bf0..a618218f7b68 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -3392,20 +3392,19 @@ usb_2_hsphy: phy@88e3000 {
>>           };
>>           usb_1_qmpphy: phy@88e9000 {
>> -            compatible = "qcom,sm8150-qmp-usb3-phy";
>> +            compatible = "qcom,sm8150-qmp-usb3-dp-phy";
>>               reg = <0 0x088e9000 0 0x18c>,
>> -                  <0 0x088e8000 0 0x10>;
>> +                  <0 0x088e8000 0 0x38>,
>> +                  <0 0x088ea000 0 0x40>;
>>               status = "disabled";
>>               #address-cells = <2>;
>>               #size-cells = <2>;
>>               ranges;
>> -
>>               clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>>                    <&rpmhcc RPMH_CXO_CLK>,
>>                    <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>>                    <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>>               clock-names = "aux", "ref_clk_src", "ref", "com_aux";
>> -
>>               resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>>                    <&gcc GCC_USB3_PHY_PRIM_BCR>;
>>               reset-names = "phy", "common";
>> @@ -3423,6 +3422,16 @@ usb_1_ssphy: phy@88e9200 {
>>                   clock-names = "pipe0";
>>                   clock-output-names = "usb3_phy_pipe_clk_src";
>>               };
>> +
>> +            usb_1_dpphy: phy@88ea200 {
>> +                reg = <0 0x088ea200 0 0x200>,
>> +                      <0 0x088ea400 0 0x200>,
>> +                      <0 0x088eaa00 0 0x200>,
>> +                      <0 0x088ea600 0 0x200>,
>> +                      <0 0x088ea800 0 0x200>;
>> +                #clock-cells = <1>;
>> +                #phy-cells = <0>;
>> +            };
> 
> Is there a reason why the new flat bindings from qcom,sc8280xp-qmp-usb43dp-phy.yaml are not used instead ?
> 

Oh ok I see "phy: qcom-qmp-combo: convert to newer style of bindings" is the followup of this serie,
please specify it because it wasn't obvious...

Neil

> Neil
> 
>>           };
>>           usb_2_qmpphy: phy@88eb000 {
>
Dmitry Baryshkov March 27, 2023, 10:14 a.m. UTC | #3 
On 27/03/2023 11:05, Neil Armstrong wrote:
> On 27/03/2023 09:59, Neil Armstrong wrote:
>> On 24/03/2023 22:55, Dmitry Baryshkov wrote:
>>> The first USB PHY on the sm8150 platform is really the USB+DP combo
>>> PHY. Add the DP part of the PHY.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++----
>>>   1 file changed, 13 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi 
>>> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>> index 9491be4a6bf0..a618218f7b68 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>> @@ -3392,20 +3392,19 @@ usb_2_hsphy: phy@88e3000 {
>>>           };
>>>           usb_1_qmpphy: phy@88e9000 {
>>> -            compatible = "qcom,sm8150-qmp-usb3-phy";
>>> +            compatible = "qcom,sm8150-qmp-usb3-dp-phy";
>>>               reg = <0 0x088e9000 0 0x18c>,
>>> -                  <0 0x088e8000 0 0x10>;
>>> +                  <0 0x088e8000 0 0x38>,
>>> +                  <0 0x088ea000 0 0x40>;
>>>               status = "disabled";
>>>               #address-cells = <2>;
>>>               #size-cells = <2>;
>>>               ranges;
>>> -
>>>               clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>>>                    <&rpmhcc RPMH_CXO_CLK>,
>>>                    <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>>>                    <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>>>               clock-names = "aux", "ref_clk_src", "ref", "com_aux";
>>> -
>>>               resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>>>                    <&gcc GCC_USB3_PHY_PRIM_BCR>;
>>>               reset-names = "phy", "common";
>>> @@ -3423,6 +3422,16 @@ usb_1_ssphy: phy@88e9200 {
>>>                   clock-names = "pipe0";
>>>                   clock-output-names = "usb3_phy_pipe_clk_src";
>>>               };
>>> +
>>> +            usb_1_dpphy: phy@88ea200 {
>>> +                reg = <0 0x088ea200 0 0x200>,
>>> +                      <0 0x088ea400 0 0x200>,
>>> +                      <0 0x088eaa00 0 0x200>,
>>> +                      <0 0x088ea600 0 0x200>,
>>> +                      <0 0x088ea800 0 0x200>;
>>> +                #clock-cells = <1>;
>>> +                #phy-cells = <0>;
>>> +            };
>>
>> Is there a reason why the new flat bindings from 
>> qcom,sc8280xp-qmp-usb43dp-phy.yaml are not used instead ?
>>
> 
> Oh ok I see "phy: qcom-qmp-combo: convert to newer style of bindings" is 
> the followup of this serie,
> please specify it because it wasn't obvious...

I thought that a note in the cover letter was good enough, but yeah, 
maybe it should be more explicit. Do you think it warrants v2? I can 
send one.
Konrad Dybcio March 27, 2023, 10:52 a.m. UTC | #4 
On 27.03.2023 12:14, Dmitry Baryshkov wrote:
> On 27/03/2023 11:05, Neil Armstrong wrote:
>> On 27/03/2023 09:59, Neil Armstrong wrote:
>>> On 24/03/2023 22:55, Dmitry Baryshkov wrote:
>>>> The first USB PHY on the sm8150 platform is really the USB+DP combo
>>>> PHY. Add the DP part of the PHY.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>> ---
>>>>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++----
>>>>   1 file changed, 13 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> index 9491be4a6bf0..a618218f7b68 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> @@ -3392,20 +3392,19 @@ usb_2_hsphy: phy@88e3000 {
>>>>           };
>>>>           usb_1_qmpphy: phy@88e9000 {
>>>> -            compatible = "qcom,sm8150-qmp-usb3-phy";
>>>> +            compatible = "qcom,sm8150-qmp-usb3-dp-phy";
>>>>               reg = <0 0x088e9000 0 0x18c>,
>>>> -                  <0 0x088e8000 0 0x10>;
>>>> +                  <0 0x088e8000 0 0x38>,
>>>> +                  <0 0x088ea000 0 0x40>;
>>>>               status = "disabled";
>>>>               #address-cells = <2>;
>>>>               #size-cells = <2>;
>>>>               ranges;
>>>> -
>>>>               clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>>>>                    <&rpmhcc RPMH_CXO_CLK>,
>>>>                    <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>>>>                    <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>>>>               clock-names = "aux", "ref_clk_src", "ref", "com_aux";
>>>> -
>>>>               resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>>>>                    <&gcc GCC_USB3_PHY_PRIM_BCR>;
>>>>               reset-names = "phy", "common";
>>>> @@ -3423,6 +3422,16 @@ usb_1_ssphy: phy@88e9200 {
>>>>                   clock-names = "pipe0";
>>>>                   clock-output-names = "usb3_phy_pipe_clk_src";
>>>>               };
>>>> +
>>>> +            usb_1_dpphy: phy@88ea200 {
>>>> +                reg = <0 0x088ea200 0 0x200>,
>>>> +                      <0 0x088ea400 0 0x200>,
>>>> +                      <0 0x088eaa00 0 0x200>,
>>>> +                      <0 0x088ea600 0 0x200>,
>>>> +                      <0 0x088ea800 0 0x200>;
>>>> +                #clock-cells = <1>;
>>>> +                #phy-cells = <0>;
>>>> +            };
>>>
>>> Is there a reason why the new flat bindings from qcom,sc8280xp-qmp-usb43dp-phy.yaml are not used instead ?
>>>
>>
>> Oh ok I see "phy: qcom-qmp-combo: convert to newer style of bindings" is the followup of this serie,
>> please specify it because it wasn't obvious...
> 
> I thought that a note in the cover letter was good enough, but yeah, maybe it should be more explicit. Do you think it warrants v2? I can send one.
IMO it's unnecessary so long as both get in.

Konrad
>
Dmitry Baryshkov April 12, 2023, 8:26 p.m. UTC | #5 
On 27/03/2023 13:52, Konrad Dybcio wrote:
> 
> 
> On 27.03.2023 12:14, Dmitry Baryshkov wrote:
>> On 27/03/2023 11:05, Neil Armstrong wrote:
>>> On 27/03/2023 09:59, Neil Armstrong wrote:
>>>> On 24/03/2023 22:55, Dmitry Baryshkov wrote:
>>>>> The first USB PHY on the sm8150 platform is really the USB+DP combo
>>>>> PHY. Add the DP part of the PHY.
>>>>>
>>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/sm8150.dtsi | 17 +++++++++++++----
>>>>>    1 file changed, 13 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>> index 9491be4a6bf0..a618218f7b68 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>> @@ -3392,20 +3392,19 @@ usb_2_hsphy: phy@88e3000 {
>>>>>            };
>>>>>            usb_1_qmpphy: phy@88e9000 {
>>>>> -            compatible = "qcom,sm8150-qmp-usb3-phy";
>>>>> +            compatible = "qcom,sm8150-qmp-usb3-dp-phy";
>>>>>                reg = <0 0x088e9000 0 0x18c>,
>>>>> -                  <0 0x088e8000 0 0x10>;
>>>>> +                  <0 0x088e8000 0 0x38>,
>>>>> +                  <0 0x088ea000 0 0x40>;
>>>>>                status = "disabled";
>>>>>                #address-cells = <2>;
>>>>>                #size-cells = <2>;
>>>>>                ranges;
>>>>> -
>>>>>                clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
>>>>>                     <&rpmhcc RPMH_CXO_CLK>,
>>>>>                     <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
>>>>>                     <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
>>>>>                clock-names = "aux", "ref_clk_src", "ref", "com_aux";
>>>>> -
>>>>>                resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
>>>>>                     <&gcc GCC_USB3_PHY_PRIM_BCR>;
>>>>>                reset-names = "phy", "common";
>>>>> @@ -3423,6 +3422,16 @@ usb_1_ssphy: phy@88e9200 {
>>>>>                    clock-names = "pipe0";
>>>>>                    clock-output-names = "usb3_phy_pipe_clk_src";
>>>>>                };
>>>>> +
>>>>> +            usb_1_dpphy: phy@88ea200 {
>>>>> +                reg = <0 0x088ea200 0 0x200>,
>>>>> +                      <0 0x088ea400 0 0x200>,
>>>>> +                      <0 0x088eaa00 0 0x200>,
>>>>> +                      <0 0x088ea600 0 0x200>,
>>>>> +                      <0 0x088ea800 0 0x200>;
>>>>> +                #clock-cells = <1>;
>>>>> +                #phy-cells = <0>;
>>>>> +            };
>>>>
>>>> Is there a reason why the new flat bindings from qcom,sc8280xp-qmp-usb43dp-phy.yaml are not used instead ?
>>>>
>>>
>>> Oh ok I see "phy: qcom-qmp-combo: convert to newer style of bindings" is the followup of this serie,
>>> please specify it because it wasn't obvious...
>>
>> I thought that a note in the cover letter was good enough, but yeah, maybe it should be more explicit. Do you think it warrants v2? I can send one.
> IMO it's unnecessary so long as both get in.

And so nobody responded with R-B :-)