| Message ID | 20230116091637.272923-1-jbrunet@baylibre.com |
|---|---|
| Headers | show |
| Series | net: mdio: add amlogic gxl mdio mux support | expand |
On Mon, Jan 16, 2023 at 10:16:36AM +0100, Jerome Brunet wrote: > Add support for the mdio mux and internal phy glue of the GXL SoC > family > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > drivers/net/mdio/Kconfig | 11 ++ > drivers/net/mdio/Makefile | 1 + > drivers/net/mdio/mdio-mux-meson-gxl.c | 160 ++++++++++++++++++++++++++ > 3 files changed, 172 insertions(+) > create mode 100644 drivers/net/mdio/mdio-mux-meson-gxl.c Hi Jerome, please run this patch through checkpatch. ... > diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c > new file mode 100644 > index 000000000000..205095d845ea > --- /dev/null > +++ b/drivers/net/mdio/mdio-mux-meson-gxl.c ... > +static int gxl_enable_internal_mdio(struct gxl_mdio_mux *priv) > +{ nit: I think void would be a more appropriate return type for this function. Likewise gxl_enable_external_mdio() ... > +static int gxl_mdio_mux_probe(struct platform_device *pdev){ nit: '{' should be at the beginning of a new line > + struct device *dev = &pdev->dev; > + struct clk *rclk; > + struct gxl_mdio_mux *priv; nit: reverse xmas tree for local variable declarations. > + int ret; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; nit: may be it is nicer to use dev_err_probe() here for consistency. > + platform_set_drvdata(pdev, priv); > + > + priv->regs = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(priv->regs)) > + return PTR_ERR(priv->regs); And here. ...
On Mon 16 Jan 2023 at 13:11, Simon Horman <simon.horman@corigine.com> wrote: > On Mon, Jan 16, 2023 at 10:16:36AM +0100, Jerome Brunet wrote: >> Add support for the mdio mux and internal phy glue of the GXL SoC >> family >> >> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> >> --- >> drivers/net/mdio/Kconfig | 11 ++ >> drivers/net/mdio/Makefile | 1 + >> drivers/net/mdio/mdio-mux-meson-gxl.c | 160 ++++++++++++++++++++++++++ >> 3 files changed, 172 insertions(+) >> create mode 100644 drivers/net/mdio/mdio-mux-meson-gxl.c > > Hi Jerome, > > please run this patch through checkpatch. Shame ... I really thought I did, but I forgot indeed. I am really sorry for this. I'll fix everything. > > ... > >> diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c >> new file mode 100644 >> index 000000000000..205095d845ea >> --- /dev/null >> +++ b/drivers/net/mdio/mdio-mux-meson-gxl.c > > ... > >> +static int gxl_enable_internal_mdio(struct gxl_mdio_mux *priv) >> +{ > > nit: I think void would be a more appropriate return type for this > function. Likewise gxl_enable_external_mdio() > > ... > >> +static int gxl_mdio_mux_probe(struct platform_device *pdev){ > > nit: '{' should be at the beginning of a new line > >> + struct device *dev = &pdev->dev; >> + struct clk *rclk; >> + struct gxl_mdio_mux *priv; > > nit: reverse xmas tree for local variable declarations. > >> + int ret; >> + >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) >> + return -ENOMEM; > > nit: may be it is nicer to use dev_err_probe() here for consistency. That was on purpose. I only use the `dev_err_probe()` when the probe may defer, which I don't expect here. I don't mind changing if you prefer it this way. > >> + platform_set_drvdata(pdev, priv); >> + >> + priv->regs = devm_platform_ioremap_resource(pdev, 0); >> + if (IS_ERR(priv->regs)) >> + return PTR_ERR(priv->regs); > > And here. > > ...
On Mon, Jan 16, 2023 at 02:27:57PM +0100, Jerome Brunet wrote: > > On Mon 16 Jan 2023 at 13:11, Simon Horman <simon.horman@corigine.com> wrote: > > > On Mon, Jan 16, 2023 at 10:16:36AM +0100, Jerome Brunet wrote: > >> Add support for the mdio mux and internal phy glue of the GXL SoC > >> family > >> > >> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > >> --- > >> drivers/net/mdio/Kconfig | 11 ++ > >> drivers/net/mdio/Makefile | 1 + > >> drivers/net/mdio/mdio-mux-meson-gxl.c | 160 ++++++++++++++++++++++++++ > >> 3 files changed, 172 insertions(+) > >> create mode 100644 drivers/net/mdio/mdio-mux-meson-gxl.c > > > > Hi Jerome, > > > > please run this patch through checkpatch. > > Shame ... I really thought I did, but I forgot indeed. > I am really sorry for this. I'll fix everything. No problem, it happens. > > ... > > > >> diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c > >> new file mode 100644 > >> index 000000000000..205095d845ea > >> --- /dev/null > >> +++ b/drivers/net/mdio/mdio-mux-meson-gxl.c > > > > ... > > > >> +static int gxl_enable_internal_mdio(struct gxl_mdio_mux *priv) > >> +{ > > > > nit: I think void would be a more appropriate return type for this > > function. Likewise gxl_enable_external_mdio() > > > > ... > > > >> +static int gxl_mdio_mux_probe(struct platform_device *pdev){ > > > > nit: '{' should be at the beginning of a new line > > > >> + struct device *dev = &pdev->dev; > >> + struct clk *rclk; > >> + struct gxl_mdio_mux *priv; > > > > nit: reverse xmas tree for local variable declarations. > > > >> + int ret; > >> + > >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > >> + if (!priv) > >> + return -ENOMEM; > > > > nit: may be it is nicer to use dev_err_probe() here for consistency. > > That was on purpose. I only use the `dev_err_probe()` when the probe may > defer, which I don't expect here. > > I don't mind changing if you prefer it this way. I have no strong opinion on this :) > >> + platform_set_drvdata(pdev, priv); > >> + > >> + priv->regs = devm_platform_ioremap_resource(pdev, 0); > >> + if (IS_ERR(priv->regs)) > >> + return PTR_ERR(priv->regs); > > > > And here. > > > > ... >
> > >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > > >> + if (!priv) > > >> + return -ENOMEM; > > > > > > nit: may be it is nicer to use dev_err_probe() here for consistency. > > > > That was on purpose. I only use the `dev_err_probe()` when the probe may > > defer, which I don't expect here. > > > > I don't mind changing if you prefer it this way. > > I have no strong opinion on this :) dev_err_probe() does not apply here, because devm_kzalloc does not return an error code. Hence it cannot be EPROBE_DEFFER, which is what dev_err_probe() is looking for. Andrew
> +static int gxl_enable_internal_mdio(struct gxl_mdio_mux *priv) > +{ > + u32 val; > + > + /* Setup the internal phy */ > + val = (REG3_ENH | > + FIELD_PREP(REG3_CFGMODE, 0x7) | > + REG3_AUTOMDIX | > + FIELD_PREP(REG3_PHYADDR, 8) | > + REG3_LEDPOL | > + REG3_PHYMDI | > + REG3_CLKINEN | > + REG3_PHYIP); > + > + writel_relaxed(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4); > + writel_relaxed(val, priv->regs + ETH_REG3); > + mdelay(10); Probably the second _relaxed() should not be. You want it guaranteed to be written out before you do the mdelay(). > + > + /* Set the internal phy id */ > + writel_relaxed(FIELD_PREP(REG2_PHYID, 0x110181), > + priv->regs + ETH_REG2); So how does this play with what Heiner has been reporting recently? What is the reset default? Who determined this value? > + /* Enable the internal phy */ > + val |= REG3_PHYEN; > + writel_relaxed(val, priv->regs + ETH_REG3); > + writel_relaxed(0, priv->regs + ETH_REG4); > + > + /* The phy needs a bit of time to come up */ > + mdelay(10); What do you mean by 'come up'? Not link up i assume. But maybe it will not respond to MDIO requests? Andrew
On Mon, Jan 16, 2023 at 10:16:34AM +0100, Jerome Brunet wrote: > Add support for the MDIO multiplexer found in the Amlogic GXL SoC family. > This multiplexer allows to choose between the external (SoC pins) MDIO bus, > or the internal one leading to the integrated 10/100M PHY. > > This multiplexer has been handled with the mdio-mux-mmioreg generic driver > so far. When it was added, it was thought the logic was handled by a > single register. > > It turns out more than a single register need to be properly set. > As long as the device is using the Amlogic vendor bootloader, or upstream > u-boot with net support, it is working fine since the kernel is inheriting > the bootloader settings. Without net support in the bootloader, this glue > comes unset in the kernel and only the external path may operate properly. > > With this driver (and the associated DT update), the kernel no longer relies > on the bootloader to set things up, fixing the problem. Ideally, you should also post an actual user of this driver, i.e. the DT updates. > This has been tested on the aml-s905x-cc (LePotato) for the internal path > and the aml-s912-pc (Tartiflette) for the external path. So these exist in mainline, which is enough for me. Andrew
On Wed, Jan 18, 2023 at 03:56:32AM +0100, Andrew Lunn wrote: > > > >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > > > >> + if (!priv) > > > >> + return -ENOMEM; > > > > > > > > nit: may be it is nicer to use dev_err_probe() here for consistency. > > > > > > That was on purpose. I only use the `dev_err_probe()` when the probe may > > > defer, which I don't expect here. > > > > > > I don't mind changing if you prefer it this way. > > > > I have no strong opinion on this :) > > dev_err_probe() does not apply here, because devm_kzalloc does not > return an error code. Hence it cannot be EPROBE_DEFFER, which is what > dev_err_probe() is looking for. Sure, there is no EPROBE_DEFFER. But, FWIIW, my reading of the documentation for dev_err_probe() is that it's use in such cases is acceptable. Anyway, let's pass on my suggestion.
On Wed 18 Jan 2023 at 04:08, Andrew Lunn <andrew@lunn.ch> wrote: > On Mon, Jan 16, 2023 at 10:16:34AM +0100, Jerome Brunet wrote: >> Add support for the MDIO multiplexer found in the Amlogic GXL SoC family. >> This multiplexer allows to choose between the external (SoC pins) MDIO bus, >> or the internal one leading to the integrated 10/100M PHY. >> >> This multiplexer has been handled with the mdio-mux-mmioreg generic driver >> so far. When it was added, it was thought the logic was handled by a >> single register. >> >> It turns out more than a single register need to be properly set. >> As long as the device is using the Amlogic vendor bootloader, or upstream >> u-boot with net support, it is working fine since the kernel is inheriting >> the bootloader settings. Without net support in the bootloader, this glue >> comes unset in the kernel and only the external path may operate properly. >> >> With this driver (and the associated DT update), the kernel no longer relies >> on the bootloader to set things up, fixing the problem. > > Ideally, you should also post an actual user of this driver, i.e. the > DT updates. I usually avoid doing this since the DT part is intended for another maintainer. The idea is make life easy for them and let them pick the entire series (or not). I don't mind sending the DT update along if it is the perferred way with netdev. FYI, the DT update would look like this : https://gitlab.com/jbrunet/linux/-/commit/1d38ccf1b9f264111b1c56f18cfb4804227d3894.patch > >> This has been tested on the aml-s905x-cc (LePotato) for the internal path >> and the aml-s912-pc (Tartiflette) for the external path. > > So these exist in mainline, which is enough for me. Yes the boards exists in mainline, there are still using the mdio-mux-mmioreg driver ATM > > Andrew
On Wed 18 Jan 2023 at 04:02, Andrew Lunn <andrew@lunn.ch> wrote: >> +static int gxl_enable_internal_mdio(struct gxl_mdio_mux *priv) >> +{ >> + u32 val; >> + >> + /* Setup the internal phy */ >> + val = (REG3_ENH | >> + FIELD_PREP(REG3_CFGMODE, 0x7) | >> + REG3_AUTOMDIX | >> + FIELD_PREP(REG3_PHYADDR, 8) | >> + REG3_LEDPOL | >> + REG3_PHYMDI | >> + REG3_CLKINEN | >> + REG3_PHYIP); >> + >> + writel_relaxed(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4); >> + writel_relaxed(val, priv->regs + ETH_REG3); >> + mdelay(10); > > Probably the second _relaxed() should not be. You want it guaranteed > to be written out before you do the mdelay(). Good point, I'll have a look > >> + >> + /* Set the internal phy id */ >> + writel_relaxed(FIELD_PREP(REG2_PHYID, 0x110181), >> + priv->regs + ETH_REG2); > > So how does this play with what Heiner has been reporting recently? What Heiner reported recently is related to the g12 family, not the gxl which this driver address. That being said, the g12 does things in a similar way - the glue is just a bit different: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/mdio/mdio-mux-meson-g12a.c?h=v6.2-rc4#n165 > What is the reset default? Who determined this value? It's the problem, the reset value is 0. That is why GXL does work with the internal PHY if the bootloader has not initialized it before the kernel comes up ... and there is no guarantee that it will. The phy id value is arbitrary, same as the address. They match what AML is using internally. They have been kept to avoid making a mess if a vendor bootloader is used with the mainline kernel, I guess. I suppose any value could be used here, as long as it matches the value in the PHY driver: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/meson-gxl.c?h=v6.2-rc4#n253 > >> + /* Enable the internal phy */ >> + val |= REG3_PHYEN; >> + writel_relaxed(val, priv->regs + ETH_REG3); >> + writel_relaxed(0, priv->regs + ETH_REG4); >> + >> + /* The phy needs a bit of time to come up */ >> + mdelay(10); > > What do you mean by 'come up'? Not link up i assume. But maybe it will > not respond to MDIO requests? Yes this MDIO multiplexer is also the glue that provides power and clocks to the internal PHY. Once the internal PHY is selected, it needs a bit a of time before it is usuable. > > Andrew
> >> + > >> + /* Set the internal phy id */ > >> + writel_relaxed(FIELD_PREP(REG2_PHYID, 0x110181), > >> + priv->regs + ETH_REG2); > > > > So how does this play with what Heiner has been reporting recently? > > What Heiner reported recently is related to the g12 family, not the gxl > which this driver address. > > That being said, the g12 does things in a similar way - the glue > is just a bit different: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/mdio/mdio-mux-meson-g12a.c?h=v6.2-rc4#n165 > > > What is the reset default? Who determined this value? > > It's the problem, the reset value is 0. That is why GXL does work with the > internal PHY if the bootloader has not initialized it before the kernel > comes up ... and there is no guarantee that it will. > > The phy id value is arbitrary, same as the address. They match what AML > is using internally. Please document where these values have come from. In the future we might need to point a finger when it all goes horribly wrong. > They have been kept to avoid making a mess if a vendor bootloader is > used with the mainline kernel, I guess. > > I suppose any value could be used here, as long as it matches the value > in the PHY driver: > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/meson-gxl.c?h=v6.2-rc4#n253 Some Marvell Ethernet switches with integrated PHYs have IDs with the vendor part set to Marvell, but the lower part is 0. The date sheet even says this is deliberate, you need to look at some other register in the switches address space to determine what the part is. That works O.K in the vendor crap monolithic driver, but not for Linux which separates the drivers up. So we have to intercept the reads and fill in the lower part. And we have no real knowledge if the PHYs are all the same, or there are differences. So we put in the switch ID, and the PHY driver then has an entry per switch. That gives us some future wiggle room if we find the PHYs are actually different. Is there any indication in the datasheets that the PHY is the exact same one as in the g12? Are we really safe to reuse this value between different SoCs? I actually find it an odd feature. Does the datasheet say anything about Why you can set the ID in software? The ID describes the hardware, and software configuration should not be able to change the hardware in any meaningful way. > >> + /* Enable the internal phy */ > >> + val |= REG3_PHYEN; > >> + writel_relaxed(val, priv->regs + ETH_REG3); > >> + writel_relaxed(0, priv->regs + ETH_REG4); > >> + > >> + /* The phy needs a bit of time to come up */ > >> + mdelay(10); > > > > What do you mean by 'come up'? Not link up i assume. But maybe it will > > not respond to MDIO requests? > > Yes this MDIO multiplexer is also the glue that provides power and > clocks to the internal PHY. Once the internal PHY is selected, it needs > a bit a of time before it is usuable. O.K, please reword it to indicate power up, not link up. Andrew
> I usually avoid doing this since the DT part is intended for another > maintainer. The idea is make life easy for them and let them pick the > entire series (or not). I don't mind sending the DT update along if it > is the perferred way with netdev. > > FYI, the DT update would look like this : > https://gitlab.com/jbrunet/linux/-/commit/1d38ccf1b9f264111b1c56f18cfb4804227d3894.patch > > > > >> This has been tested on the aml-s905x-cc (LePotato) for the internal path > >> and the aml-s912-pc (Tartiflette) for the external path. > > > > So these exist in mainline, which is enough for me. > > Yes the boards exists in mainline, there are still using the mdio-mux-mmioreg driver > ATM The point of posting the actual users is sometimes we get vendor crap with no actual in tree users. We want to avoid that. It can be enough to mention in the cover letter than a future patchset will change the DT files X, Y and Z, making it clear there are in tree users. Andrew
On Thu 19 Jan 2023 at 18:17, Andrew Lunn <andrew@lunn.ch> wrote: >> >> + >> >> + /* Set the internal phy id */ >> >> + writel_relaxed(FIELD_PREP(REG2_PHYID, 0x110181), >> >> + priv->regs + ETH_REG2); >> > >> > So how does this play with what Heiner has been reporting recently? >> >> What Heiner reported recently is related to the g12 family, not the gxl >> which this driver address. >> >> That being said, the g12 does things in a similar way - the glue >> is just a bit different: >> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/mdio/mdio-mux-meson-g12a.c?h=v6.2-rc4#n165 >> >> > What is the reset default? Who determined this value? >> >> It's the problem, the reset value is 0. That is why GXL does work with the >> internal PHY if the bootloader has not initialized it before the kernel >> comes up ... and there is no guarantee that it will. >> >> The phy id value is arbitrary, same as the address. They match what AML >> is using internally. > > Please document where these values have come from. In the future we > might need to point a finger when it all goes horribly wrong. > OK >> They have been kept to avoid making a mess if a vendor bootloader is >> used with the mainline kernel, I guess. >> >> I suppose any value could be used here, as long as it matches the value >> in the PHY driver: >> >> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/meson-gxl.c?h=v6.2-rc4#n253 > > Some Marvell Ethernet switches with integrated PHYs have IDs with the > vendor part set to Marvell, but the lower part is 0. The date sheet > even says this is deliberate, you need to look at some other register > in the switches address space to determine what the part is. That > works O.K in the vendor crap monolithic driver, but not for Linux > which separates the drivers up. So we have to intercept the reads and > fill in the lower part. And we have no real knowledge if the PHYs are > all the same, or there are differences. So we put in the switch ID, > and the PHY driver then has an entry per switch. That gives us some > future wiggle room if we find the PHYs are actually different. > > Is there any indication in the datasheets that the PHY is the exact > same one as in the g12? Are we really safe to reuse this value between > different SoCs? There is zero information about the PHY in the datasheet. The gxl and g12 don't use the same ID values. The PHY ip is very similar but slightly different between the 2. (see https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/meson-gxl.c) My guess is the g12 as another version of the IP, with some bug fixed. The integration (clocking scheme mostly) is also different, which is why the mux/glue is different. > > I actually find it an odd feature. Does the datasheet say anything > about Why you can set the ID in software? The ID describes the > hardware, and software configuration should not be able to change the > hardware in any meaningful way. Again, zero information. It is a bought IP (similar to the Rockchip judging by the PHY driver). I'm not surprised the provider of the IP would make the ID easy to configure. AML chose to keep that configurable through the glue, instead of fixing it. This is how it is. > >> >> + /* Enable the internal phy */ >> >> + val |= REG3_PHYEN; >> >> + writel_relaxed(val, priv->regs + ETH_REG3); >> >> + writel_relaxed(0, priv->regs + ETH_REG4); >> >> + >> >> + /* The phy needs a bit of time to come up */ >> >> + mdelay(10); >> > >> > What do you mean by 'come up'? Not link up i assume. But maybe it will >> > not respond to MDIO requests? >> >> Yes this MDIO multiplexer is also the glue that provides power and >> clocks to the internal PHY. Once the internal PHY is selected, it needs >> a bit a of time before it is usuable. > > O.K, please reword it to indicate power up, not link up. > Sure > Andrew