| Message ID | 20230102221815.273719-1-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| Headers | show |
| Series | Add IRQC support to RZ/G2UL SoC | expand |
On Mon, Jan 2, 2023 at 11:18 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > This patch series does the following: > * Adds IRQC support to the RZ/G2UL SoC. > * Drops mapping NMI interrupt as part of IRQ domain > * Parses interrupts based in interrupt-names > * Includes a fix for pinctrl driver when using GPIO pins as interrupts > * Adds PHY interrupt support for ETH{0/1} The pinctrl portions look OK to me FWIW Acked-by: Linus Walleij <linus.walleij@linaro.org> If any of this is to be merged into the pinctrl tree I expect to get it as pull request from Geert who maintains the Renesas pinctrl tree, else tell me what to do! Yours, Linus Walleij
Hi Geert, On Mon, Jan 2, 2023 at 10:18 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Hi All, > > This patch series does the following: > * Adds IRQC support to the RZ/G2UL SoC. > * Drops mapping NMI interrupt as part of IRQ domain > * Parses interrupts based in interrupt-names > * Includes a fix for pinctrl driver when using GPIO pins as interrupts > * Adds PHY interrupt support for ETH{0/1} > > v2->v3 > * Dropped skipping of NMI interrupt, as it can be used as an external > interrupt. > * Dropped parsing interrupts based on names > * Dropped "renesas,rzg2ul-irqc" compatible string > > v1->v2 > * Updated binding doc > * Dropped mapping NMI interrupt as part of IRQ domain > * Fixed review comments pointed by Geert > * Added support to parse interrupts by name > * Added compile time checks for gpio config arrays > > RFC v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221107175305.63975-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ > > Cheers, > Prabhakar > > Lad Prabhakar (6): > dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document > RZ/G2UL SoC > pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts > pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks > arm64: dts: renesas: r9a07g043u: Add IRQC node > arm64: dts: renesas: r9a07g043[u]: Update pinctrl node to handle GPIO > interrupts > arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for > ETH{0/1} > Gentle ping. Cheers, Prabhakar > .../renesas,rzg2l-irqc.yaml | 225 +++++++++++++----- > arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 2 + > arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 72 ++++++ > .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 11 +- > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 25 +- > 5 files changed, 270 insertions(+), 65 deletions(-) > > -- > 2.25.1 >
On Mon, Jan 2, 2023 at 11:18 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L and also > the pin configs are completely different. This patch makes sure we use the > appropriate pin configs for each SoC (which is passed as part of the OF > data) while configuring the GPIO pin as interrupts instead of using > rzg2l_gpio_configs[] for all the SoCs. > > Fixes: bfc69bdbaad1 ("pinctrl: renesas: rzg2l: Add RZ/G2UL support") > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > v2 -> v3 > * No change Thanks, will queue in renesas-pinctrl-for-v6.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jan 2, 2023 at 11:19 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add BUILD_BUG_ON() checks to avoid overflows for GPIO configs for each > supported SoC. > > While at it, for readability set n_port_pins based on the GPIO pin configs > and not on GPIO names for r9a07g044_data as done for r9a07g043_data. > > Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v2 -> v3 > * No change Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-pinctrl-for-v6.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jan 2, 2023 at 11:18 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add IRQC node to R9A07G043 (RZ/G2UL) SoC DTSI. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v2 -> v3 > * Used "renesas,rzg2l-irqc" instead of "renesas,rzg2ul-irqc" Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jan 2, 2023 at 11:19 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add required properties in pinctrl node to handle GPIO interrupts. > > Note as IRQC is not enabled in RZ/Five the phandle for interrupt-parent > is added in RZ/G2UL specific dtsi so that RZ/Five pinctrl driver > continues without waiting for IRQC to probe. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v2 -> v3 > * No change Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Jan 2, 2023 at 11:19 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ7 for ETH0 and > ETH1 respectively. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v2 -> v3 > * No change Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.3. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi All, This patch series does the following: * Adds IRQC support to the RZ/G2UL SoC. * Drops mapping NMI interrupt as part of IRQ domain * Parses interrupts based in interrupt-names * Includes a fix for pinctrl driver when using GPIO pins as interrupts * Adds PHY interrupt support for ETH{0/1} v2->v3 * Dropped skipping of NMI interrupt, as it can be used as an external interrupt. * Dropped parsing interrupts based on names * Dropped "renesas,rzg2ul-irqc" compatible string v1->v2 * Updated binding doc * Dropped mapping NMI interrupt as part of IRQ domain * Fixed review comments pointed by Geert * Added support to parse interrupts by name * Added compile time checks for gpio config arrays RFC v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221107175305.63975-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ Cheers, Prabhakar Lad Prabhakar (6): dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G2UL SoC pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks arm64: dts: renesas: r9a07g043u: Add IRQC node arm64: dts: renesas: r9a07g043[u]: Update pinctrl node to handle GPIO interrupts arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1} .../renesas,rzg2l-irqc.yaml | 225 +++++++++++++----- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 2 + arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 72 ++++++ .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 11 +- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 25 +- 5 files changed, 270 insertions(+), 65 deletions(-)