| Message ID | 20220919104816.4075019-1-piyush.mehta@amd.com |
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From: Piyush Mehta <piyush.mehta@amd.com>
To: <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <balbi@kernel.org>,
<linux-usb@vger.kernel.org>
CC: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<git@amd.com>, <michal.simek@amd.com>,
<siva.durga.prasad.paladugu@amd.com>,
Piyush Mehta <piyush.mehta@amd.com>
Subject: [PATCH V2 0/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc
error after resume
Date: Mon, 19 Sep 2022 16:18:14 +0530
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|
| Series |
usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume
|
expand
|
This patch of the series does the following: - Add a new DT "snps,resume-hs-terminations" quirk - Enable GUCTL1 bit 10 for fixing crc error after resume bug - When this bit is set to '1', the ULPI opmode will be changed to 'normal' along with HS terminations, and term/xcvr select signals after EOR. This option is to support certain legacy ULPI PHYs. --- Changes in V2: - Addressed Krzysztof Kozlowski review comments - Update the quirk name and No underscores in properties. - Modified the quirk description. Link: https://lore.kernel.org/all/e15168ac-b5a1-0c15-cfb3-34fb518e737f@linaro.org/ --- Piyush Mehta (2): dt-bindings: usb: snps,dwc3: Add 'snps,resume-hs-terminations' quirk usb: dwc3: core: Enable GUCTL1 bit 10 for fixing termination error after resume bug .../devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++ drivers/usb/dwc3/core.c | 17 +++++++++++++++++ drivers/usb/dwc3/core.h | 4 ++++ 3 files changed, 28 insertions(+)