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[0/4] drm/sun4i: dsi: Support the A100/D1 controller variant

Message ID 20220812074257.58254-1-samuel@sholland.org
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Series drm/sun4i: dsi: Support the A100/D1 controller variant | expand

Message

Samuel Holland Aug. 12, 2022, 7:42 a.m. UTC
This series adds support for the digital part of the DSI controller
found in the A100 and D1 SoCs (plus T7, which is not supported by
mainline Linux). There are two changes to the hardware integration:
  1) the module clock routes through the TCON TOP, and
  2) the separate I/O domain is removed.

The actual register interface appears to be the same as before. The
register definitions in the D1 BSP exactly match the A64 BSP.

The BSP describes this as the "40nm" DSI controller variant. There is
also a "28nm" variant with a different register interface; that one is
found in a different subset of SoCs (V5 and A50).

A100/D1 also come with an updated DPHY, described by the BSP as a
"combo" PHY, which is now also used for LVDS channel 0. (LVDS and DSI
share the same pins on Port D.) Since that is a different subsystem,
I am sending that as a separate series.


Samuel Holland (4):
  dt-bindings: display: sun6i-dsi: Fix clock conditional
  dt-bindings: display: sun6i-dsi: Add the A100 variant
  drm/sun4i: dsi: Add a variant structure
  drm/sun4i: dsi: Add the A100 variant

 .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 30 +++++++---
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c        | 58 +++++++++++++------
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h        |  7 +++
 3 files changed, 69 insertions(+), 26 deletions(-)

Comments

Jernej Škrabec Aug. 14, 2022, 7:46 a.m. UTC | #1
Dne petek, 12. avgust 2022 ob 09:42:55 CEST je Samuel Holland napisal(a):
> Replace the ad-hoc calls to of_device_is_compatible() with a structure
> describing the differences between variants. This is in preparation for
> adding more variants to the driver.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej
Jernej Škrabec Aug. 14, 2022, 7:47 a.m. UTC | #2
Dne petek, 12. avgust 2022 ob 09:42:56 CEST je Samuel Holland napisal(a):
> The A100 variant of the MIPI DSI controller now gets its module clock
> from the TCON via the TCON TOP, so the clock rate cannot be set to a
> fixed value. Otherwise, it appears to be the same as the A31 variant.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej
Maxime Ripard Aug. 15, 2022, 6:42 a.m. UTC | #3
Hi Samuel,

On Fri, Aug 12, 2022 at 02:42:55AM -0500, Samuel Holland wrote:
> Replace the ad-hoc calls to of_device_is_compatible() with a structure
> describing the differences between variants. This is in preparation for
> adding more variants to the driver.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 50 +++++++++++++++++---------
>  drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h |  7 ++++
>  2 files changed, 40 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> index b4dfa166eccd..6479ade416b9 100644
> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
> @@ -1101,12 +1101,16 @@ static const struct component_ops sun6i_dsi_ops = {
>  
>  static int sun6i_dsi_probe(struct platform_device *pdev)
>  {
> +	const struct sun6i_dsi_variant *variant;
>  	struct device *dev = &pdev->dev;
> -	const char *bus_clk_name = NULL;
>  	struct sun6i_dsi *dsi;
>  	void __iomem *base;
>  	int ret;
>  
> +	variant = device_get_match_data(dev);
> +	if (!variant)
> +		return -EINVAL;
> +
>  	dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
>  	if (!dsi)
>  		return -ENOMEM;
> @@ -1114,10 +1118,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
>  	dsi->dev = dev;
>  	dsi->host.ops = &sun6i_dsi_host_ops;
>  	dsi->host.dev = dev;
> -
> -	if (of_device_is_compatible(dev->of_node,
> -				    "allwinner,sun6i-a31-mipi-dsi"))
> -		bus_clk_name = "bus";
> +	dsi->variant = variant;
>  
>  	base = devm_platform_ioremap_resource(pdev, 0);
>  	if (IS_ERR(base)) {
> @@ -1142,7 +1143,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
>  		return PTR_ERR(dsi->regs);
>  	}
>  
> -	dsi->bus_clk = devm_clk_get(dev, bus_clk_name);
> +	dsi->bus_clk = devm_clk_get(dev, variant->has_mod_clk ? "bus" : NULL);
>  	if (IS_ERR(dsi->bus_clk))
>  		return dev_err_probe(dev, PTR_ERR(dsi->bus_clk),
>  				     "Couldn't get the DSI bus clock\n");
> @@ -1151,21 +1152,21 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
>  	if (ret)
>  		return ret;
>  
> -	if (of_device_is_compatible(dev->of_node,
> -				    "allwinner,sun6i-a31-mipi-dsi")) {
> +	if (variant->has_mod_clk) {
>  		dsi->mod_clk = devm_clk_get(dev, "mod");
>  		if (IS_ERR(dsi->mod_clk)) {
>  			dev_err(dev, "Couldn't get the DSI mod clock\n");
>  			ret = PTR_ERR(dsi->mod_clk);
>  			goto err_attach_clk;
>  		}
> -	}
>  
> -	/*
> -	 * In order to operate properly, that clock seems to be always
> -	 * set to 297MHz.
> -	 */
> -	clk_set_rate_exclusive(dsi->mod_clk, 297000000);
> +		/*
> +		 * In order to operate properly, the module clock on the
> +		 * A31 variant always seems to be set to 297MHz.
> +		 */
> +		if (variant->set_mod_clk)
> +			clk_set_rate_exclusive(dsi->mod_clk, 297000000);
> +	}
>
>
>  	dsi->dphy = devm_phy_get(dev, "dphy");
>  	if (IS_ERR(dsi->dphy)) {
> @@ -1205,16 +1206,31 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
>  
>  	component_del(&pdev->dev, &sun6i_dsi_ops);
>  	mipi_dsi_host_unregister(&dsi->host);
> -	clk_rate_exclusive_put(dsi->mod_clk);
> +	if (dsi->variant->has_mod_clk && dsi->variant->set_mod_clk)
> +		clk_rate_exclusive_put(dsi->mod_clk);

There's also a clk_rate_exclusive_put call in the bind error path

Maxime