mbox series

[v7,00/16] Introduce Nuvoton Arbel NPCM8XX BMC SoC

Message ID 20220706165406.117349-1-tmaimon77@gmail.com
Headers show
Series Introduce Nuvoton Arbel NPCM8XX BMC SoC | expand

Message

Tomer Maimon July 6, 2022, 4:53 p.m. UTC
This patchset  adds initial support for the Nuvoton 
Arbel NPCM8XX Board Management controller (BMC) SoC family. 

The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC.
The NPCM8XX computing subsystem comprises a quadcore ARM 
Cortex A35 ARM-V8 architecture.

This patchset adds minimal architecture and drivers such as:
Clocksource, Clock, Reset, and WD.

Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX.

This patchset was tested on the Arbel NPCM8XX evaluation board.

Addressed comments from:
 - Philipp Zabel: https://www.spinics.net/lists/arm-kernel/msg993305.html

Changes since version 6:
 - NPCM reset driver
	- Modify warning message.
 - dt-bindings: serial: 8250: Add npcm845 compatible string patch accepted, due
   to it the patch removed from the patchset.

Changes since version 5:
 - NPCM8XX clock driver
	- Remove refclk if devm_of_clk_add_hw_provider function failed.
 - NPCM8XX clock source driver
	- Remove NPCM8XX TIMER_OF_DECLARE support, using the same as NPCM7XX.

Changes since version 4:
 - NPCM8XX clock driver
	- Use the same quote in the dt-binding file.

Changes since version 3:
 - NPCM8XX clock driver
	- Rename NPCM8xx clock dt-binding header file.
	- Remove unused structures.
	- Improve Handling the clocks registration.
 - NPCM reset driver
	- Add ref phandle to dt-binding.

Changes since version 2:
 - Remove NPCM8xx WDT compatible patch.
 - Remove NPCM8xx UART compatible patch.
 - NPCM8XX clock driver
	- Add debug new line.
	- Add 25M fixed rate clock.
	- Remove unused clocks and clock name from dt-binding.
 - NPCM reset driver
	- Revert to npcm7xx dt-binding.
	- Skip dt binding quotes.
	- Adding DTS backward compatibility.
	- Remove NPCM8xx binding include file.
	- Warp commit message.
- NPCM8XX device tree:
	- Remove unused clock nodes (used in the clock driver)
	- Modify gcr and rst node names.

Changes since version 1:
 - NPCM8XX clock driver
	- Modify dt-binding.
	- Remove unsed definition and include.
	- Include alphabetically.
	- Use clock devm.
 - NPCM reset driver
	- Modify dt-binding.
	- Modify syscon name.
	- Add syscon support to NPCM7XX dts reset node.
	- use data structure.
 - NPCM8XX device tree:
	- Modify evb compatible name.
	- Add NPCM7xx compatible.
	- Remove disable nodes from the EVB DTS.

Tomer Maimon (16):
  dt-bindings: timer: npcm: Add npcm845 compatible string
  dt-bindings: watchdog: npcm: Add npcm845 compatible string
  dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
  clk: npcm8xx: add clock controller
  dt-bindings: reset: npcm: add GCR syscon property
  ARM: dts: nuvoton: add reset syscon property
  reset: npcm: using syscon instead of device data
  dt-bindings: reset: npcm: Add support for NPCM8XX
  reset: npcm: Add NPCM8XX support
  dt-bindings: arm: npcm: Add maintainer
  dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
  dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
  arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
  arm64: dts: nuvoton: Add initial NPCM8XX device tree
  arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
  arm64: defconfig: Add Nuvoton NPCM family support

 .../devicetree/bindings/arm/npcm/npcm.yaml    |   7 +
 .../bindings/arm/npcm/nuvoton,gcr.yaml        |   2 +
 .../bindings/clock/nuvoton,npcm845-clk.yaml   |  49 ++
 .../bindings/reset/nuvoton,npcm750-reset.yaml |  10 +-
 .../bindings/timer/nuvoton,npcm7xx-timer.yaml |   2 +
 .../bindings/watchdog/nuvoton,npcm-wdt.txt    |   3 +-
 MAINTAINERS                                   |   2 +
 arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi |   1 +
 arch/arm64/Kconfig.platforms                  |  11 +
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
 .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi   | 170 +++++
 .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts  |  30 +
 .../boot/dts/nuvoton/nuvoton-npcm845.dtsi     |  76 +++
 arch/arm64/configs/defconfig                  |   3 +
 drivers/clk/Kconfig                           |   6 +
 drivers/clk/Makefile                          |   1 +
 drivers/clk/clk-npcm8xx.c                     | 600 ++++++++++++++++++
 drivers/reset/reset-npcm.c                    | 207 +++++-
 .../dt-bindings/clock/nuvoton,npcm845-clk.h   |  49 ++
 20 files changed, 1196 insertions(+), 36 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
 create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi
 create mode 100644 drivers/clk/clk-npcm8xx.c
 create mode 100644 include/dt-bindings/clock/nuvoton,npcm845-clk.h

Comments

Joel Stanley July 8, 2022, 6:50 a.m. UTC | #1
Hi Arnd,

On Wed, 6 Jul 2022 at 16:54, Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> This patchset  adds initial support for the Nuvoton
> Arbel NPCM8XX Board Management controller (BMC) SoC family.

Are you happy with a cross tree new soc branch for this series? If so
I can put them in a branch and get some build coverage before sending
them out.

(I notice the clock and reset changes are waiting on acks still)

Cheers,

Joel


>
> The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC.
> The NPCM8XX computing subsystem comprises a quadcore ARM
> Cortex A35 ARM-V8 architecture.
>
> This patchset adds minimal architecture and drivers such as:
> Clocksource, Clock, Reset, and WD.
>
> Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX.
>
> This patchset was tested on the Arbel NPCM8XX evaluation board.
>
> Addressed comments from:
>  - Philipp Zabel: https://www.spinics.net/lists/arm-kernel/msg993305.html
>
> Changes since version 6:
>  - NPCM reset driver
>         - Modify warning message.
>  - dt-bindings: serial: 8250: Add npcm845 compatible string patch accepted, due
>    to it the patch removed from the patchset.
>
> Changes since version 5:
>  - NPCM8XX clock driver
>         - Remove refclk if devm_of_clk_add_hw_provider function failed.
>  - NPCM8XX clock source driver
>         - Remove NPCM8XX TIMER_OF_DECLARE support, using the same as NPCM7XX.
>
> Changes since version 4:
>  - NPCM8XX clock driver
>         - Use the same quote in the dt-binding file.
>
> Changes since version 3:
>  - NPCM8XX clock driver
>         - Rename NPCM8xx clock dt-binding header file.
>         - Remove unused structures.
>         - Improve Handling the clocks registration.
>  - NPCM reset driver
>         - Add ref phandle to dt-binding.
>
> Changes since version 2:
>  - Remove NPCM8xx WDT compatible patch.
>  - Remove NPCM8xx UART compatible patch.
>  - NPCM8XX clock driver
>         - Add debug new line.
>         - Add 25M fixed rate clock.
>         - Remove unused clocks and clock name from dt-binding.
>  - NPCM reset driver
>         - Revert to npcm7xx dt-binding.
>         - Skip dt binding quotes.
>         - Adding DTS backward compatibility.
>         - Remove NPCM8xx binding include file.
>         - Warp commit message.
> - NPCM8XX device tree:
>         - Remove unused clock nodes (used in the clock driver)
>         - Modify gcr and rst node names.
>
> Changes since version 1:
>  - NPCM8XX clock driver
>         - Modify dt-binding.
>         - Remove unsed definition and include.
>         - Include alphabetically.
>         - Use clock devm.
>  - NPCM reset driver
>         - Modify dt-binding.
>         - Modify syscon name.
>         - Add syscon support to NPCM7XX dts reset node.
>         - use data structure.
>  - NPCM8XX device tree:
>         - Modify evb compatible name.
>         - Add NPCM7xx compatible.
>         - Remove disable nodes from the EVB DTS.
>
> Tomer Maimon (16):
>   dt-bindings: timer: npcm: Add npcm845 compatible string
>   dt-bindings: watchdog: npcm: Add npcm845 compatible string
>   dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
>   clk: npcm8xx: add clock controller
>   dt-bindings: reset: npcm: add GCR syscon property
>   ARM: dts: nuvoton: add reset syscon property
>   reset: npcm: using syscon instead of device data
>   dt-bindings: reset: npcm: Add support for NPCM8XX
>   reset: npcm: Add NPCM8XX support
>   dt-bindings: arm: npcm: Add maintainer
>   dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
>   dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
>   arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
>   arm64: dts: nuvoton: Add initial NPCM8XX device tree
>   arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
>   arm64: defconfig: Add Nuvoton NPCM family support
>
>  .../devicetree/bindings/arm/npcm/npcm.yaml    |   7 +
>  .../bindings/arm/npcm/nuvoton,gcr.yaml        |   2 +
>  .../bindings/clock/nuvoton,npcm845-clk.yaml   |  49 ++
>  .../bindings/reset/nuvoton,npcm750-reset.yaml |  10 +-
>  .../bindings/timer/nuvoton,npcm7xx-timer.yaml |   2 +
>  .../bindings/watchdog/nuvoton,npcm-wdt.txt    |   3 +-
>  MAINTAINERS                                   |   2 +
>  arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi |   1 +
>  arch/arm64/Kconfig.platforms                  |  11 +
>  arch/arm64/boot/dts/Makefile                  |   1 +
>  arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
>  .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi   | 170 +++++
>  .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts  |  30 +
>  .../boot/dts/nuvoton/nuvoton-npcm845.dtsi     |  76 +++
>  arch/arm64/configs/defconfig                  |   3 +
>  drivers/clk/Kconfig                           |   6 +
>  drivers/clk/Makefile                          |   1 +
>  drivers/clk/clk-npcm8xx.c                     | 600 ++++++++++++++++++
>  drivers/reset/reset-npcm.c                    | 207 +++++-
>  .../dt-bindings/clock/nuvoton,npcm845-clk.h   |  49 ++
>  20 files changed, 1196 insertions(+), 36 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml
>  create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
>  create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
>  create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
>  create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi
>  create mode 100644 drivers/clk/clk-npcm8xx.c
>  create mode 100644 include/dt-bindings/clock/nuvoton,npcm845-clk.h
>
> --
> 2.33.0
>
Arnd Bergmann July 8, 2022, 1:45 p.m. UTC | #2
On Fri, Jul 8, 2022 at 8:50 AM Joel Stanley <joel@jms.id.au> wrote:
>
> Hi Arnd,
>
> On Wed, 6 Jul 2022 at 16:54, Tomer Maimon <tmaimon77@gmail.com> wrote:
> >
> > This patchset  adds initial support for the Nuvoton
> > Arbel NPCM8XX Board Management controller (BMC) SoC family.
>
> Are you happy with a cross tree new soc branch for this series? If so
> I can put them in a branch and get some build coverage before sending
> them out.
>
> (I notice the clock and reset changes are waiting on acks still)
>

Hi Joel,

Yes, I think we should merge the parts that are reviewed already, but I'd
leave out the clk (4/16) and reset (9/16) patches in this case.

Krzysztof has reviewed the binding changes, so I don't mind having
the DT nodes added in the soc tree even if the two drivers are still
missing.

I would do the same thing for the sunplus SP7021 platform that
Qin Jian has been posting, as this is also waiting for a final Ack
on the clk driver.

I would put both of the new platforms into a single branch in the
SoC tree, separate from the usual dt/drivers/soc/defconfig
branches. I was already planning to pick npcm8xx up myself,
but if you can do a pull request, that would be even better.

       Arnd
Arnd Bergmann July 18, 2022, 11:28 a.m. UTC | #3
On Fri, Jul 8, 2022 at 3:45 PM Arnd Bergmann <arnd@arndb.de> wrote:
> On Fri, Jul 8, 2022 at 8:50 AM Joel Stanley <joel@jms.id.au> wrote:
> > Are you happy with a cross tree new soc branch for this series? If so
> > I can put them in a branch and get some build coverage before sending
> > them out.
> >
> > (I notice the clock and reset changes are waiting on acks still)
>
> Yes, I think we should merge the parts that are reviewed already, but I'd
> leave out the clk (4/16) and reset (9/16) patches in this case.
>
> Krzysztof has reviewed the binding changes, so I don't mind having
> the DT nodes added in the soc tree even if the two drivers are still
> missing.
>
> I would do the same thing for the sunplus SP7021 platform that
> Qin Jian has been posting, as this is also waiting for a final Ack
> on the clk driver.
>
> I would put both of the new platforms into a single branch in the
> SoC tree, separate from the usual dt/drivers/soc/defconfig
> branches. I was already planning to pick npcm8xx up myself,
> but if you can do a pull request, that would be even better.

I see there is now a v9 of the series, let me know if I should
apply some or all of those, or if I should wait for a pull request
from you.

I've just merged the Sunplus sp7021 support leaving out the
clock driver in order to make progress on that one, and
we can do the same thing here if there is still ongoing discussion
about some of the drivers. It would be nice to not wait too long
though, as we are already past -rc7.

      Arnd
Tomer Maimon July 18, 2022, 1:12 p.m. UTC | #4
Hi Arnd,

Appreciate you taking care of this!

Are these questions direct to me or Joel?

On our side we will be happy that you will start to merge Arbel
NPCM8XX without the clock driver, hopefully the NPCM8XX clock driver
will ACK soon and maybe you can merge it as well.

What do you say Joel?

Thanks a lot

Tomer

On Mon, 18 Jul 2022 at 14:28, Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Fri, Jul 8, 2022 at 3:45 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > On Fri, Jul 8, 2022 at 8:50 AM Joel Stanley <joel@jms.id.au> wrote:
> > > Are you happy with a cross tree new soc branch for this series? If so
> > > I can put them in a branch and get some build coverage before sending
> > > them out.
> > >
> > > (I notice the clock and reset changes are waiting on acks still)
> >
> > Yes, I think we should merge the parts that are reviewed already, but I'd
> > leave out the clk (4/16) and reset (9/16) patches in this case.
> >
> > Krzysztof has reviewed the binding changes, so I don't mind having
> > the DT nodes added in the soc tree even if the two drivers are still
> > missing.
> >
> > I would do the same thing for the sunplus SP7021 platform that
> > Qin Jian has been posting, as this is also waiting for a final Ack
> > on the clk driver.
> >
> > I would put both of the new platforms into a single branch in the
> > SoC tree, separate from the usual dt/drivers/soc/defconfig
> > branches. I was already planning to pick npcm8xx up myself,
> > but if you can do a pull request, that would be even better.
>
> I see there is now a v9 of the series, let me know if I should
> apply some or all of those, or if I should wait for a pull request
> from you.
>
> I've just merged the Sunplus sp7021 support leaving out the
> clock driver in order to make progress on that one, and
> we can do the same thing here if there is still ongoing discussion
> about some of the drivers. It would be nice to not wait too long
> though, as we are already past -rc7.
>
>       Arnd
Arnd Bergmann July 19, 2022, 2:41 p.m. UTC | #5
On Mon, Jul 18, 2022 at 3:12 PM Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> Hi Arnd,
>
> Appreciate you taking care of this!
>
> Are these questions direct to me or Joel?
>
> On our side we will be happy that you will start to merge Arbel
> NPCM8XX without the clock driver, hopefully the NPCM8XX clock driver
> will ACK soon and maybe you can merge it as well.
>
> What do you say Joel?

As discussed off-list, I have now merged the series into the soc tree
as part of the arm/newsoc branch directly, with the exception of the
clk driver. No need to resend the patches I merged for future versions,
if any changes are required before the merge window, please send
them directly to soc@kernel.org.

After that, it's best to continue working with Joel so he can merge
and forward future patches.

Regarding the clk driver, please make sure this applies cleanly
on top of what I just merged. This can be applied to either
the soc tree at the moment, or the common-clk tree in the
future if it misses the merge window.

      Arnd