mbox series

[v3,0/2] new emtrion hardware emCON-MX8M Mini

Message ID 20211216165851.64708-1-reinhold.mueller@emtrion.com
Headers show
Series new emtrion hardware emCON-MX8M Mini | expand

Message

reinhold.mueller@emtrion.com Dec. 16, 2021, 4:58 p.m. UTC
From: Reinhold Mueller <reinhold.mueller@emtrion.com>

This patchset adds support for the emtrion emCON-MX8M Mini

Changes

v3:
[PATCH 1/2]
	- no fixes, Acked-by: Rob Herring <robh@kernel.org>
[PATCH 2/2]
	- inserted hyphen in some node names
	- spell out regulator in some regulator nodes
	- order of properties
	- sort label node alphabetically
	- inserting space before node name

v2:
[PATCH 1/2]
	- no fixes
[PATCH 2/2]
	- replaced GPIO_ACTIVE_LOW by IRQ_TYPE_LEVEL_LOW

v1:
[PATCH 0/2]
	- split former patch in dts -and yaml patches
[PATCH 1/2]
	- removing character '\t'
[PATCH 2/2]
	- correct entry compatible in spi-flash@0

Reinhold Mueller (2):
  dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini
  arm64: dts: imx8mm: Add support for emtrion emCON-MX8M Mini

 .../devicetree/bindings/arm/fsl.yaml          |   1 +
 arch/arm64/boot/dts/freescale/Makefile        |   3 +-
 .../boot/dts/freescale/imx8mm-emcon-avari.dts |  23 +
 .../dts/freescale/imx8mm-emcon-avari.dtsi     | 139 ++++
 .../boot/dts/freescale/imx8mm-emcon.dtsi      | 645 ++++++++++++++++++
 5 files changed, 810 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dts
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi

Comments

Fabio Estevam Dec. 16, 2021, 5:18 p.m. UTC | #1
Hi Reinhold,

On Thu, Dec 16, 2021 at 1:59 PM <reinhold.mueller@emtrion.com> wrote:

> +       reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               rpmsg_reserved: rpmsg@b8000000 {
> +                       no-map;
> +                       reg = <0 0xb8000000 0 0x400000>;
> +               };
> +
> +               loader_reserved: loader@bb700000 {
> +                       no-map;
> +                       reg = <0 0xbb700000 0x0 0x00100000>;
> +               };
> +
> +               pci_reserved: pci@bb800000 {
> +                       no-map;
> +                       reg = <0 0xbb800000 0x0 0x00200000>;
> +               };
> +
> +               ivshmem2_reserved: ivshmem2@bba00000 {
> +                       no-map;
> +                       reg = <0 0xbba00000 0x0 0x00100000>;
> +               };
> +
> +               ivshmem_reserved: ivshmem@bbb00000 {
> +                       no-map;
> +                       reg = <0 0xbbb00000 0x0 0x00100000>;
> +               };
> +       };

Are these reserved nodes needed with mainline?

Looks like they are remnants from NXP vendor BSP.

> +&fec1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_fec1>;
> +       phy-mode = "rgmii-id";
> +       phy-reset-gpios = <&gpio1 9 0>;

phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;

Actually, phy-reset-gpios is considered deprecated.

You could also add an mdio node as fec child and:
add reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; there.
Mueller, Reinhold Dec. 20, 2021, 7:22 a.m. UTC | #2
Hi Fabio,

thanks for the feedback.
Please see the comments at the marked issues below.
I will send a new patchset.

Regards
Reinhold


Reinhold Mueller
Software engineer


emtrion GmbH
Am Hasenbiel 6 | 76297 Stutensee | Germany

Phone +49 7244 62694 20
Fax +49 7244 62694 19
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> -----Ursprüngliche Nachricht-----
> Von: Fabio Estevam <festevam@gmail.com>
> Gesendet: Donnerstag, 16. Dezember 2021 18:19
> An: Mueller, Reinhold <Reinhold.Mueller@emtrion.de>
> Cc: Shawn Guo <shawnguo@kernel.org>; Rob Herring
> <robh+dt@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>; Sascha
> Hauer <kernel@pengutronix.de>; NXP Linux Team <linux-imx@nxp.com>;
> open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree@vger.kernel.org>; linux-kernel <linux-kernel@vger.kernel.org>
> Betreff: Re: [PATCH v3 2/2] arm64: dts: imx8mm: Add support for emtrion
> emCON-MX8M Mini
>
> Hi Reinhold,
>
> On Thu, Dec 16, 2021 at 1:59 PM <reinhold.mueller@emtrion.com> wrote:
>
> > +       reserved-memory {
> > +               #address-cells = <2>;
> > +               #size-cells = <2>;
> > +               ranges;
> > +
> > +               rpmsg_reserved: rpmsg@b8000000 {
> > +                       no-map;
> > +                       reg = <0 0xb8000000 0 0x400000>;
> > +               };
> > +
> > +               loader_reserved: loader@bb700000 {
> > +                       no-map;
> > +                       reg = <0 0xbb700000 0x0 0x00100000>;
> > +               };
> > +
> > +               pci_reserved: pci@bb800000 {
> > +                       no-map;
> > +                       reg = <0 0xbb800000 0x0 0x00200000>;
> > +               };
> > +
> > +               ivshmem2_reserved: ivshmem2@bba00000 {
> > +                       no-map;
> > +                       reg = <0 0xbba00000 0x0 0x00100000>;
> > +               };
> > +
> > +               ivshmem_reserved: ivshmem@bbb00000 {
> > +                       no-map;
> > +                       reg = <0 0xbbb00000 0x0 0x00100000>;
> > +               };
> > +       };
>
> Are these reserved nodes needed with mainline?
>
> Looks like they are remnants from NXP vendor BSP.
>
The reserved memory nodes are more custom specific, so i remove it from the tree.
> > +&fec1 {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_fec1>;
> > +       phy-mode = "rgmii-id";
> > +       phy-reset-gpios = <&gpio1 9 0>;
>
> phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
>
> Actually, phy-reset-gpios is considered deprecated.
>
> You could also add an mdio node as fec child and:
> add reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; there.
Ok, i will add a child in fec fort he reset gpios