[00/12] Add basic SoC support for mediatek mt7986

This patch adds basic SoC support for Mediatek's new 4-core SoC,
MT7986, which is mainly for wifi-router application.

Sam Shih (12):
  dt-bindings: clock: mediatek: document clk bindings for mediatek
    mt7986 SoC
  clk: mediatek: add mt7986 clock IDs
  clk: mediatek: add mt7986 clock support
  pinctrl: mediatek: moore: use pin number in mtk_pin_desc instead of
    array index
  dt-bindings: pinctrl: update bindings for MT7986 SoC
  pinctrl: mediatek: add support for MT7986 SoC
  dt-bindings: arm64: dts: mediatek: Add mt7986 series
  dt-bindings: rng: mediatek: add mt7986 to mtk rng binding
  dt-bindings: serial: Add compatible for Mediatek MT7986
  dt-bindings: watchdog: Add compatible for Mediatek MT7986
  arm64: dts: mediatek: add mt7986a support
  arm64: dts: mediatek: add mt7986b support

 .../devicetree/bindings/arm/mediatek.yaml     |    8 +
 .../arm/mediatek/mediatek,apmixedsys.txt      |    1 +
 .../bindings/arm/mediatek/mediatek,ethsys.txt |    1 +
 .../arm/mediatek/mediatek,infracfg.txt        |    2 +
 .../arm/mediatek/mediatek,sgmiisys.txt        |    2 +
 .../arm/mediatek/mediatek,topckgen.txt        |    1 +
 .../bindings/pinctrl/pinctrl-mt7622.txt       |  284 +++
 .../devicetree/bindings/rng/mtk-rng.yaml      |    1 +
 .../devicetree/bindings/serial/mtk-uart.txt   |    1 +
 .../devicetree/bindings/watchdog/mtk-wdt.txt  |    1 +
 arch/arm64/boot/dts/mediatek/Makefile         |    2 +
 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts  |   49 +
 arch/arm64/boot/dts/mediatek/mt7986a.dtsi     |  235 +++
 arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts  |   21 +
 arch/arm64/boot/dts/mediatek/mt7986b.dtsi     |  235 +++
 drivers/clk/mediatek/Kconfig                  |   17 +
 drivers/clk/mediatek/Makefile                 |    2 +
 drivers/clk/mediatek/clk-mt7986-eth.c         |  132 ++
 drivers/clk/mediatek/clk-mt7986.c             |  610 ++++++
 drivers/pinctrl/mediatek/Kconfig              |    7 +
 drivers/pinctrl/mediatek/Makefile             |    1 +
 drivers/pinctrl/mediatek/pinctrl-moore.c      |   61 +
 drivers/pinctrl/mediatek/pinctrl-mt7986.c     | 1640 +++++++++++++++++
 include/dt-bindings/clock/mt7986-clk.h        |  244 +++
 24 files changed, 3558 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7986b.dtsi
 create mode 100644 drivers/clk/mediatek/clk-mt7986-eth.c
 create mode 100644 drivers/clk/mediatek/clk-mt7986.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7986.c
 create mode 100644 include/dt-bindings/clock/mt7986-clk.h

Hi Sam,

On Mon, Jul 26, 2021 at 12:17 AM Sam Shih <sam.shih@mediatek.com> wrote:
>
> Certain SoC are missing the middle part gpios in consecutive pins,
> it's better to use pin number in mtk_pin_desc instead of array index
> for the extensibility

Now the driver pin number has to be consistent with the array index
because the driver would use pin number as the array index to fetch
the pin descriptor.

For those missing GPIOs, we could just fill out .name in struct
mtk_pin_desc as NULL to indicate the pin is unavailable for users (pin
not ballout) on the certain SoC and then allow us to reuse all of the
pinctrl operations with minimal modification.

>
> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
> ---
>  drivers/pinctrl/mediatek/pinctrl-moore.c | 61 ++++++++++++++++++++++++
>  1 file changed, 61 insertions(+)
>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c
> index 3a4a23c40a71..16206254ec3d 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-moore.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c
> @@ -35,6 +35,19 @@ static const struct pin_config_item mtk_conf_items[] = {
>  };
>  #endif
>
> +static int mtk_pin_desc_lookup(struct mtk_pinctrl *hw, int pin)
> +{
> +       int idx;
> +
> +       for (idx = 0 ; idx < hw->soc->npins ; idx++)
> +               if (hw->soc->pins[idx].number == pin)
> +                       break;
> +       if (idx < hw->soc->npins)
> +               return idx;
> +
> +       return -EINVAL;
> +}
> +
>  static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
>                               unsigned int selector, unsigned int group)
>  {
> @@ -74,6 +87,13 @@ static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
>  {
>         struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
>         const struct mtk_pin_desc *desc;
> +       int err;
> +
> +       err = mtk_pin_desc_lookup(hw, pin);
> +       if (err >= 0)
> +               pin = err;
> +       else
> +               return err;
>

We can drop it and use the following snippet instead

desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];

/* !desc->name to show the pin is not ballout */
if (!desc->name)
         return -ENOTSUPP;

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
>
> @@ -87,6 +107,13 @@ static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
>  {
>         struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
>         const struct mtk_pin_desc *desc;
> +       int err;
> +
> +       err = mtk_pin_desc_lookup(hw, pin);
> +       if (err >= 0)
> +               pin = err;
> +       else
> +               return err;
>

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
>
> @@ -102,6 +129,12 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
>         int val, val2, err, reg, ret = 1;
>         const struct mtk_pin_desc *desc;
>
> +       err = mtk_pin_desc_lookup(hw, pin);
> +       if (err >= 0)
> +               pin = err;
> +       else
> +               return err;
> +

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
>
>         switch (param) {
> @@ -217,6 +250,12 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
>         u32 reg, param, arg;
>         int cfg, err = 0;
>
> +       err = mtk_pin_desc_lookup(hw, pin);
> +       if (err >= 0)
> +               pin = err;
> +       else
> +               return err;
> +

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
>
>         for (cfg = 0; cfg < num_configs; cfg++) {
> @@ -434,6 +473,12 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
>         const struct mtk_pin_desc *desc;
>         int value, err;
>
> +       err = mtk_pin_desc_lookup(hw, gpio);
> +       if (err >= 0)
> +               gpio = err;
> +       else
> +               return err;
> +

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
>
>         err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
> @@ -447,6 +492,15 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
>  {
>         struct mtk_pinctrl *hw = gpiochip_get_data(chip);
>         const struct mtk_pin_desc *desc;
> +       int err;
> +
> +       err = mtk_pin_desc_lookup(hw, gpio);
> +       if (err >= 0) {
> +               gpio = err;
> +       } else {
> +               dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
> +               return;
> +       }
>

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
>
> @@ -488,6 +542,13 @@ static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
>         struct mtk_pinctrl *hw = gpiochip_get_data(chip);
>         const struct mtk_pin_desc *desc;
>         u32 debounce;
> +       int err;
> +
> +       err = mtk_pin_desc_lookup(hw, offset);
> +       if (err >= 0)
> +               offset = err;
> +       else
> +               return err;
>

Ditto

>         desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
>
> --
> 2.29.2
>