| Message ID | 20200910061115.909-1-chuanjia.liu@mediatek.com |
|---|---|
| Headers | show |
| Series | Spilt PCIe node to comply with hardware design | expand |
On 10/09/2020 08:11, Chuanjia Liu wrote: > Use regmap to get shared pcie-cfg base and change > the method to get pcie irq. > > Acked-by: Ryder Lee <ryder.lee@mediatek.com> > Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> > --- > drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++------- > 1 file changed, 18 insertions(+), 7 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > index cf4c18f0c25a..987845d19982 100644 > --- a/drivers/pci/controller/pcie-mediatek.c > +++ b/drivers/pci/controller/pcie-mediatek.c > @@ -14,6 +14,7 @@ > #include <linux/irqchip/chained_irq.h> > #include <linux/irqdomain.h> > #include <linux/kernel.h> > +#include <linux/mfd/syscon.h> > #include <linux/msi.h> > #include <linux/module.h> > #include <linux/of_address.h> > @@ -23,6 +24,7 @@ > #include <linux/phy/phy.h> > #include <linux/platform_device.h> > #include <linux/pm_runtime.h> > +#include <linux/regmap.h> > #include <linux/reset.h> > > #include "../pci.h" > @@ -205,6 +207,7 @@ struct mtk_pcie_port { > * struct mtk_pcie - PCIe host information > * @dev: pointer to PCIe device > * @base: IO mapped register base > + * @cfg: IO mapped register map for PCIe config > * @free_ck: free-run reference clock > * @mem: non-prefetchable memory resource > * @ports: pointer to PCIe port information > @@ -213,6 +216,7 @@ struct mtk_pcie_port { > struct mtk_pcie { > struct device *dev; > void __iomem *base; > + struct regmap *cfg; > struct clk *free_ck; > > struct list_head ports; > @@ -648,7 +652,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, > return err; > } > > - port->irq = platform_get_irq(pdev, port->slot); > + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); > if (port->irq < 0) > return port->irq; You will need to make sure taht the driver keeps working with the old DTS format. This is not the case here. Regards, Matthias > > @@ -674,12 +678,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > if (!mem) > return -EINVAL; > > - /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ > - if (pcie->base) { > - val = readl(pcie->base + PCIE_SYS_CFG_V2); > - val |= PCIE_CSR_LTSSM_EN(port->slot) | > - PCIE_CSR_ASPM_L1_EN(port->slot); > - writel(val, pcie->base + PCIE_SYS_CFG_V2); > + /* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */ > + if (pcie->cfg) { > + val = PCIE_CSR_LTSSM_EN(port->slot) | > + PCIE_CSR_ASPM_L1_EN(port->slot); > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); > } > > /* Assert all reset signals */ > @@ -983,6 +986,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > struct device *dev = pcie->dev; > struct platform_device *pdev = to_platform_device(dev); > struct resource *regs; > + struct device_node *cfg_node; > int err; > > /* get shared registers, which are optional */ > @@ -995,6 +999,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > } > } > > + cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0); > + if (cfg_node) { > + pcie->cfg = syscon_node_to_regmap(cfg_node); > + if (IS_ERR(pcie->cfg)) > + return PTR_ERR(pcie->cfg); > + } > + > pcie->free_ck = devm_clk_get(dev, "free_ck"); > if (IS_ERR(pcie->free_ck)) { > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) >
On Thu, 2020-09-10 at 12:44 +0200, Matthias Brugger wrote: > > On 10/09/2020 08:11, Chuanjia Liu wrote: > > Use regmap to get shared pcie-cfg base and change > > the method to get pcie irq. > > > > Acked-by: Ryder Lee <ryder.lee@mediatek.com> > > Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> > > --- > > drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++------- > > 1 file changed, 18 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > > index cf4c18f0c25a..987845d19982 100644 > > --- a/drivers/pci/controller/pcie-mediatek.c > > +++ b/drivers/pci/controller/pcie-mediatek.c > > @@ -14,6 +14,7 @@ > > #include <linux/irqchip/chained_irq.h> > > #include <linux/irqdomain.h> > > #include <linux/kernel.h> > > +#include <linux/mfd/syscon.h> > > #include <linux/msi.h> > > #include <linux/module.h> > > #include <linux/of_address.h> > > @@ -23,6 +24,7 @@ > > #include <linux/phy/phy.h> > > #include <linux/platform_device.h> > > #include <linux/pm_runtime.h> > > +#include <linux/regmap.h> > > #include <linux/reset.h> > > > > #include "../pci.h" > > @@ -205,6 +207,7 @@ struct mtk_pcie_port { > > * struct mtk_pcie - PCIe host information > > * @dev: pointer to PCIe device > > * @base: IO mapped register base > > + * @cfg: IO mapped register map for PCIe config > > * @free_ck: free-run reference clock > > * @mem: non-prefetchable memory resource > > * @ports: pointer to PCIe port information > > @@ -213,6 +216,7 @@ struct mtk_pcie_port { > > struct mtk_pcie { > > struct device *dev; > > void __iomem *base; > > + struct regmap *cfg; > > struct clk *free_ck; > > > > struct list_head ports; > > @@ -648,7 +652,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, > > return err; > > } > > > > - port->irq = platform_get_irq(pdev, port->slot); > > + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); > > if (port->irq < 0) > > return port->irq; > > You will need to make sure taht the driver keeps working with the old DTS > format. This is not the case here. > Thanks for your review, I will fix it in the next version. Regards, Chuanjia > Regards, > Matthias > > > > > @@ -674,12 +678,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > > if (!mem) > > return -EINVAL; > > > > - /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ > > - if (pcie->base) { > > - val = readl(pcie->base + PCIE_SYS_CFG_V2); > > - val |= PCIE_CSR_LTSSM_EN(port->slot) | > > - PCIE_CSR_ASPM_L1_EN(port->slot); > > - writel(val, pcie->base + PCIE_SYS_CFG_V2); > > + /* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */ > > + if (pcie->cfg) { > > + val = PCIE_CSR_LTSSM_EN(port->slot) | > > + PCIE_CSR_ASPM_L1_EN(port->slot); > > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); > > } > > > > /* Assert all reset signals */ > > @@ -983,6 +986,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > > struct device *dev = pcie->dev; > > struct platform_device *pdev = to_platform_device(dev); > > struct resource *regs; > > + struct device_node *cfg_node; > > int err; > > > > /* get shared registers, which are optional */ > > @@ -995,6 +999,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > > } > > } > > > > + cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0); > > + if (cfg_node) { > > + pcie->cfg = syscon_node_to_regmap(cfg_node); > > + if (IS_ERR(pcie->cfg)) > > + return PTR_ERR(pcie->cfg); > > + } > > + > > pcie->free_ck = devm_clk_get(dev, "free_ck"); > > if (IS_ERR(pcie->free_ck)) { > > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) > >
In current architecture, MSI domain will be inherited from the root bridge, and all of the devices will share the same MSI domain. Hence that, the PCIe devices will not work properly if the irq number which required is more than 32. Split the PCIe node for MT2712 and MT7622 platform to fix MSI issue and comply with the hardware design. change note: v5:rebase for 5.9-rc1, no code change. v4:change commit message due to bayes statistical bogofilter considers this series patch SPAM. v3:rebase for 5.8-rc1. Only collect ack of Ryder, No code change. v2:change the allocation of MT2712 PCIe MMIO space due to the allocation size is not right in v1. Chuanjia Liu (4): dt-bindings: pci: mediatek: Modified the Device tree bindings PCI: mediatek: Use regmap to get shared pcie-cfg base arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 ARM: dts: mediatek: Modified MT7629 PCIe node .../bindings/pci/mediatek-pcie-cfg.yaml | 38 +++++ .../devicetree/bindings/pci/mediatek-pcie.txt | 144 +++++++++++------- arch/arm/boot/dts/mt7629-rfb.dts | 3 +- arch/arm/boot/dts/mt7629.dtsi | 23 +-- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++---- .../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 +- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 ++++++--- drivers/pci/controller/pcie-mediatek.c | 25 ++- 9 files changed, 258 insertions(+), 140 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml