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[00/13] iMX 8 - Another round of cleanups

Message ID 20200904145312.10960-1-krzk@kernel.org
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Series iMX 8 - Another round of cleanups | expand

Message

Krzysztof Kozlowski Sept. 4, 2020, 2:52 p.m. UTC
Hi,

This is an another round of cleanups of i.MX 8 DTS and binings.  No
dependencies.

Best regards,
Krzysztof

Krzysztof Kozlowski (13):
  dt-bindings: power: fsl,imx-gpcv2: Document interrupt controller
    properties
  dt-bindings: display: bridge: nwl-dsi: Add common properties
  dt-bindings: arm: fsl: Fix matching Purism Librem5 phones
  dt-bindings: gpu: vivante,gc: Add common properties
  dt-bindings: gpu: vivante,gc: Remove trailing whitespace
  dt-bindings: mfd: rohm,bd71837-pmic: Add common properties
  dt-bindings: mfd: rohm,bd71847-pmic: Add common clock-names
  arm64: dts: imx8mm-var-som-symphony: Use newer interrupts property
  arm64: dts: imx8mp-evk: Align pin configuration group names with
    schema
  arm64: dts: imx8mq: Add missing interrupts to GPC
  arm64: dts: imx8mq-librem5: Align regulator names with schema
  arm64: dts: imx8mq-librem5: Drop interrupt-names in PMIC
  arm64: dts: imx8mq-librem5: Add interrupt-names to ti,tps6598x

 .../devicetree/bindings/arm/fsl.yaml          | 10 ++++--
 .../bindings/display/bridge/nwl-dsi.yaml      |  4 +++
 .../devicetree/bindings/gpu/vivante,gc.yaml   |  9 +++++-
 .../bindings/mfd/rohm,bd71837-pmic.yaml       |  6 ++++
 .../bindings/mfd/rohm,bd71847-pmic.yaml       |  3 ++
 .../bindings/power/fsl,imx-gpcv2.yaml         |  4 +++
 .../dts/freescale/imx8mm-var-som-symphony.dts |  2 +-
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts  | 12 +++----
 .../dts/freescale/imx8mq-librem5-devkit.dts   |  1 -
 .../boot/dts/freescale/imx8mq-librem5.dtsi    | 32 +++++++++----------
 arch/arm64/boot/dts/freescale/imx8mq.dtsi     |  1 +
 11 files changed, 57 insertions(+), 27 deletions(-)

Comments

Lucas Stach Sept. 4, 2020, 2:59 p.m. UTC | #1
On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> Device tree schema expects pin configuration groups to end with 'grp'
> suffix, otherwise dtbs_check complain with a warning like:
> 
>   ... 'usdhc3grp-100mhz', 'usdhc3grp-200mhz' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 3d535f1b3440..ad66f1286d95 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -157,7 +157,7 @@
>  		>;
>  	};
>  
> -	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
> +	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x41
>  		>;
> @@ -182,7 +182,7 @@
>  		>;
>  	};
>  
> -	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
> +	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194
>  			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4
> @@ -194,7 +194,7 @@
>  		>;
>  	};
>  
> -	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
> +	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196
>  			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6
> @@ -206,7 +206,7 @@
>  		>;
>  	};
>  
> -	pinctrl_usdhc2_gpio: usdhc2grp-gpio {
> +	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4
>  		>;
> @@ -228,7 +228,7 @@
>  		>;
>  	};
>  
> -	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
> +	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194
>  			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4
> @@ -244,7 +244,7 @@
>  		>;
>  	};
>  
> -	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
> +	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196
>  			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6
Lucas Stach Sept. 4, 2020, 3:04 p.m. UTC | #2
On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 device node was missing interrupts
> property necessary to route its interrupt to GIC.  This also fixes the
> dbts_check warnings like:
> 
>   arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
>     {'compatible': ... '$nodename': ['gpc@303a0000']} is not valid under any of the given schemas
>   arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: 'interrupts' is a required property
> 
> Fixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index aad3b9f2f35c..5e0e7d0f1bc4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -623,6 +623,7 @@
>  			gpc: gpc@303a0000 {
>  				compatible = "fsl,imx8mq-gpc";
>  				reg = <0x303a0000 0x10000>;
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>  				interrupt-parent = <&gic>;
>  				interrupt-controller;
>  				#interrupt-cells = <3>;
Shawn Guo Sept. 13, 2020, 1:19 a.m. UTC | #3
On Fri, Sep 04, 2020 at 04:53:07PM +0200, Krzysztof Kozlowski wrote:
> The int-gpios was deprecated in favor of generic interrupts property.
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Applied patch #8 ~ #13, thanks.