| Message ID | 20180906222442.14825-1-contact@paulk.fr |
|---|---|
| Headers | show |
| Series | Cedrus driver for the Allwinner Video Engine, using media requests | expand |
On Fri, Sep 07, 2018 at 12:24:38AM +0200, Paul Kocialkowski wrote: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > This introduces the Cedrus VPU driver that supports the VPU found in > Allwinner SoCs, also known as Video Engine. It is implemented through > a V4L2 M2M decoder device and a media device (used for media requests). > So far, it only supports MPEG-2 decoding. > > Since this VPU is stateless, synchronization with media requests is > required in order to ensure consistency between frame headers that > contain metadata about the frame to process and the raw slice data that > is used to generate the frame. > > This driver was made possible thanks to the long-standing effort > carried out by the linux-sunxi community in the interest of reverse > engineering, documenting and implementing support for the Allwinner VPU. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- [...] diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > new file mode 100644 > index 000000000000..029eb1626bf4 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > @@ -0,0 +1,237 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Cedrus VPU driver > + * > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > + * Copyright (C) 2018 Bootlin > + */ > + > +#include <media/videobuf2-dma-contig.h> > + > +#include "cedrus.h" > +#include "cedrus_hw.h" > +#include "cedrus_regs.h" > + > +/* Default MPEG-2 quantization coefficients, from the specification. */ > + > +static const u8 intra_quantization_matrix_default[64] = { > + 8, 16, 16, 19, 16, 19, 22, 22, > + 22, 22, 22, 22, 26, 24, 26, 27, > + 27, 27, 26, 26, 26, 26, 27, 27, > + 27, 29, 29, 29, 34, 34, 34, 29, > + 29, 29, 27, 27, 29, 29, 32, 32, > + 34, 34, 37, 38, 37, 35, 35, 34, > + 35, 38, 38, 40, 40, 40, 48, 48, > + 46, 46, 56, 56, 58, 69, 69, 83 > +}; I think it should also mention that the table above is the DC prediction table, already in the zig-zag order. 8, 16, 19, 22, 26, 27, 29, 34, 16, 16, 22, 24, 27, 29, 34, 37, 19, 22, 26, 27, 29, 34, 34, 38, 22, 22, 26, 27, 29, 34, 37, 40, 22, 26, 27, 29, 32, 35, 40, 48, 26, 27, 29, 32, 35, 40, 48, 58, 26, 27, 29, 34, 38, 46, 56, 69, 27, 29, 35, 38, 46, 56, 69, 83 See slides no 466 and 486 in following pdf: http://iphome.hhi.de/schwarz/assets/pdfs/08_ImageCoding.pdf > + > +static const u8 non_intra_quantization_matrix_default[64] = { > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16, > + 16, 16, 16, 16, 16, 16, 16, 16 > +}; > + > +static enum cedrus_irq_status cedrus_mpeg2_irq_status(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + u32 reg; > + > + reg = cedrus_read(dev, VE_DEC_MPEG_STATUS); > + reg &= VE_DEC_MPEG_STATUS_CHECK_MASK; > + > + if (!reg) > + return CEDRUS_IRQ_NONE; > + > + if (reg & VE_DEC_MPEG_STATUS_CHECK_ERROR || > + !(reg & VE_DEC_MPEG_STATUS_SUCCESS)) > + return CEDRUS_IRQ_ERROR; > + > + return CEDRUS_IRQ_OK; > +} > + > +static void cedrus_mpeg2_irq_clear(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + > + cedrus_write(dev, VE_DEC_MPEG_STATUS, VE_DEC_MPEG_STATUS_CHECK_MASK); > +} > + > +static void cedrus_mpeg2_irq_disable(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + u32 reg = cedrus_read(dev, VE_DEC_MPEG_CTRL); > + > + reg &= ~VE_DEC_MPEG_CTRL_IRQ_MASK; > + > + cedrus_write(dev, VE_DEC_MPEG_CTRL, reg); > +} > + > +static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) > +{ > + const struct v4l2_ctrl_mpeg2_slice_params *slice_params; > + const struct v4l2_mpeg2_sequence *sequence; > + const struct v4l2_mpeg2_picture *picture; > + const struct v4l2_ctrl_mpeg2_quantization *quantization; > + dma_addr_t src_buf_addr, dst_luma_addr, dst_chroma_addr; > + dma_addr_t fwd_luma_addr, fwd_chroma_addr; > + dma_addr_t bwd_luma_addr, bwd_chroma_addr; > + struct cedrus_dev *dev = ctx->dev; > + const u8 *matrix; > + unsigned int i; > + u32 reg; > + > + slice_params = run->mpeg2.slice_params; > + sequence = &slice_params->sequence; > + picture = &slice_params->picture; > + > + quantization = run->mpeg2.quantization; > + > + /* Activate MPEG engine. */ > + cedrus_engine_enable(dev, CEDRUS_CODEC_MPEG2); > + > + /* Set intra quantization matrix. */ > + > + if (quantization && quantization->load_intra_quantiser_matrix) > + matrix = quantization->intra_quantiser_matrix; > + else > + matrix = intra_quantization_matrix_default; > + > + for (i = 0; i < 64; i++) { > + reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); > + reg |= VE_DEC_MPEG_IQMINPUT_FLAG_INTRA; > + > + cedrus_write(dev, VE_DEC_MPEG_IQMINPUT, reg); > + } > + > + /* Set non-intra quantization matrix. */ > + > + if (quantization && quantization->load_non_intra_quantiser_matrix) > + matrix = quantization->non_intra_quantiser_matrix; > + else > + matrix = non_intra_quantization_matrix_default; > + > + for (i = 0; i < 64; i++) { > + reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); > + reg |= VE_DEC_MPEG_IQMINPUT_FLAG_NON_INTRA; > + > + cedrus_write(dev, VE_DEC_MPEG_IQMINPUT, reg); > + } > + > + /* Set MPEG picture header. */ > + > + reg = VE_DEC_MPEG_MP12HDR_SLICE_TYPE(picture->picture_coding_type); > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 0, picture->f_code[0][0]); > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 1, picture->f_code[0][1]); > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 0, picture->f_code[1][0]); > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 1, picture->f_code[1][1]); > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(picture->intra_dc_precision); > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(picture->picture_structure); > + reg |= VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(picture->top_field_first); > + reg |= VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(picture->frame_pred_frame_dct); > + reg |= VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(picture->concealment_motion_vectors); > + reg |= VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(picture->q_scale_type); > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_VLC_FORMAT(picture->intra_vlc_format); > + reg |= VE_DEC_MPEG_MP12HDR_ALTERNATE_SCAN(picture->alternate_scan); > + reg |= VE_DEC_MPEG_MP12HDR_FULL_PEL_FORWARD_VECTOR(0); > + reg |= VE_DEC_MPEG_MP12HDR_FULL_PEL_BACKWARD_VECTOR(0); > + > + cedrus_write(dev, VE_DEC_MPEG_MP12HDR, reg); > + > + /* Set frame dimensions. */ > + > + reg = VE_DEC_MPEG_PICCODEDSIZE_WIDTH(sequence->horizontal_size); > + reg |= VE_DEC_MPEG_PICCODEDSIZE_HEIGHT(sequence->vertical_size); > + > + cedrus_write(dev, VE_DEC_MPEG_PICCODEDSIZE, reg); > + > + reg = VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(ctx->src_fmt.width); > + reg |= VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(ctx->src_fmt.height); > + > + cedrus_write(dev, VE_DEC_MPEG_PICBOUNDSIZE, reg); > + > + /* Forward and backward prediction reference buffers. */ > + > + fwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 0); > + fwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 1); > + > + cedrus_write(dev, VE_DEC_MPEG_FWD_REF_LUMA_ADDR, fwd_luma_addr); > + cedrus_write(dev, VE_DEC_MPEG_FWD_REF_CHROMA_ADDR, fwd_chroma_addr); > + > + bwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 0); > + bwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 1); > + > + cedrus_write(dev, VE_DEC_MPEG_BWD_REF_LUMA_ADDR, bwd_luma_addr); > + cedrus_write(dev, VE_DEC_MPEG_BWD_REF_CHROMA_ADDR, bwd_chroma_addr); > + > + /* Destination luma and chroma buffers. */ > + > + dst_luma_addr = cedrus_dst_buf_addr(ctx, run->dst->vb2_buf.index, 0); > + dst_chroma_addr = cedrus_dst_buf_addr(ctx, run->dst->vb2_buf.index, 1); > + > + cedrus_write(dev, VE_DEC_MPEG_REC_LUMA, dst_luma_addr); > + cedrus_write(dev, VE_DEC_MPEG_REC_CHROMA, dst_chroma_addr); > + > + /* Source offset and length in bits. */ > + > + cedrus_write(dev, VE_DEC_MPEG_VLD_OFFSET, slice_params->data_bit_offset); > + > + reg = slice_params->bit_size - slice_params->data_bit_offset; > + cedrus_write(dev, VE_DEC_MPEG_VLD_LEN, reg); > + > + /* Source beginning and end addresses. */ > + > + src_buf_addr = vb2_dma_contig_plane_dma_addr(&run->src->vb2_buf, 0); > + > + reg = VE_DEC_MPEG_VLD_ADDR_BASE(src_buf_addr); > + reg |= VE_DEC_MPEG_VLD_ADDR_VALID_PIC_DATA; > + reg |= VE_DEC_MPEG_VLD_ADDR_LAST_PIC_DATA; > + reg |= VE_DEC_MPEG_VLD_ADDR_FIRST_PIC_DATA; > + > + cedrus_write(dev, VE_DEC_MPEG_VLD_ADDR, reg); > + > + reg = src_buf_addr + DIV_ROUND_UP(slice_params->bit_size, 8); > + cedrus_write(dev, VE_DEC_MPEG_VLD_END_ADDR, reg); > + > + /* Macroblock address: start at the beginning. */ > + reg = VE_DEC_MPEG_MBADDR_Y(0) | VE_DEC_MPEG_MBADDR_X(0); > + cedrus_write(dev, VE_DEC_MPEG_MBADDR, reg); > + > + /* Clear previous errors. */ > + cedrus_write(dev, VE_DEC_MPEG_ERROR, 0); > + > + /* Clear correct macroblocks register. */ > + cedrus_write(dev, VE_DEC_MPEG_CRTMBADDR, 0); > + > + /* Enable appropriate interruptions and components. */ > + > + reg = VE_DEC_MPEG_CTRL_IRQ_MASK | VE_DEC_MPEG_CTRL_MC_NO_WRITEBACK | > + VE_DEC_MPEG_CTRL_MC_CACHE_EN; > + > + cedrus_write(dev, VE_DEC_MPEG_CTRL, reg); > +} > + > +static void cedrus_mpeg2_trigger(struct cedrus_ctx *ctx) > +{ > + struct cedrus_dev *dev = ctx->dev; > + u32 reg; > + > + /* Trigger MPEG engine. */ > + reg = VE_DEC_MPEG_TRIGGER_HW_MPEG_VLD | VE_DEC_MPEG_TRIGGER_MPEG2 | > + VE_DEC_MPEG_TRIGGER_MB_BOUNDARY; > + > + cedrus_write(dev, VE_DEC_MPEG_TRIGGER, reg); > +} > + > +struct cedrus_dec_ops cedrus_dec_ops_mpeg2 = { > + .irq_clear = cedrus_mpeg2_irq_clear, > + .irq_disable = cedrus_mpeg2_irq_disable, > + .irq_status = cedrus_mpeg2_irq_status, > + .setup = cedrus_mpeg2_setup, > + .trigger = cedrus_mpeg2_trigger, > +}; > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > new file mode 100644 > index 000000000000..9b14d1fb94a0 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > @@ -0,0 +1,233 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Cedrus VPU driver > + * > + * Copyright (c) 2013-2016 Jens Kuske <jenskuske@gmail.com> > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > + */ > + > +#ifndef _CEDRUS_REGS_H_ > +#define _CEDRUS_REGS_H_ > + > +/* > + * Common acronyms and contractions used in register descriptions: > + * * VLD : Variable-Length Decoder > + * * IQ: Inverse Quantization > + * * IDCT: Inverse Discrete Cosine Transform > + * * MC: Motion Compensation > + * * STCD: Start Code Detect > + * * SDRT: Scale Down and Rotate > + */ > + > +#define VE_ENGINE_DEC_MPEG 0x100 > +#define VE_ENGINE_DEC_H264 0x200 > + > +#define VE_MODE 0x00 > + > +#define VE_MODE_REC_WR_MODE_2MB (0x01 << 20) > +#define VE_MODE_REC_WR_MODE_1MB (0x00 << 20) > +#define VE_MODE_DDR_MODE_BW_128 (0x03 << 16) > +#define VE_MODE_DDR_MODE_BW_256 (0x02 << 16) > +#define VE_MODE_DISABLED (0x07 << 0) > +#define VE_MODE_DEC_H265 (0x04 << 0) > +#define VE_MODE_DEC_H264 (0x01 << 0) > +#define VE_MODE_DEC_MPEG (0x00 << 0) > + > +#define VE_PRIMARY_CHROMA_BUF_LEN 0xc4 > +#define VE_PRIMARY_FB_LINE_STRIDE 0xc8 > + > +#define VE_PRIMARY_FB_LINE_STRIDE_CHROMA(s) (((s) << 16) & GENMASK(31, 16)) > +#define VE_PRIMARY_FB_LINE_STRIDE_LUMA(s) (((s) << 0) & GENMASK(15, 0)) > + > +#define VE_CHROMA_BUF_LEN 0xe8 > + > +#define VE_SECONDARY_OUT_FMT_TILED_32_NV12 (0x00 << 30) > +#define VE_SECONDARY_OUT_FMT_EXT (0x01 << 30) > +#define VE_SECONDARY_OUT_FMT_YU12 (0x02 << 30) > +#define VE_SECONDARY_OUT_FMT_YV12 (0x03 << 30) > +#define VE_CHROMA_BUF_LEN_SDRT(l) ((l) & GENMASK(27, 0)) > + > +#define VE_PRIMARY_OUT_FMT 0xec > + > +#define VE_PRIMARY_OUT_FMT_TILED_32_NV12 (0x00 << 4) > +#define VE_PRIMARY_OUT_FMT_TILED_128_NV12 (0x01 << 4) > +#define VE_PRIMARY_OUT_FMT_YU12 (0x02 << 4) > +#define VE_PRIMARY_OUT_FMT_YV12 (0x03 << 4) > +#define VE_PRIMARY_OUT_FMT_NV12 (0x04 << 4) > +#define VE_PRIMARY_OUT_FMT_NV21 (0x05 << 4) > +#define VE_SECONDARY_OUT_FMT_EXT_TILED_32_NV12 (0x00 << 0) > +#define VE_SECONDARY_OUT_FMT_EXT_TILED_128_NV12 (0x01 << 0) > +#define VE_SECONDARY_OUT_FMT_EXT_YU12 (0x02 << 0) > +#define VE_SECONDARY_OUT_FMT_EXT_YV12 (0x03 << 0) > +#define VE_SECONDARY_OUT_FMT_EXT_NV12 (0x04 << 0) > +#define VE_SECONDARY_OUT_FMT_EXT_NV21 (0x05 << 0) > + > +#define VE_VERSION 0xf0 > + > +#define VE_VERSION_SHIFT 16 > + > +#define VE_DEC_MPEG_MP12HDR (VE_ENGINE_DEC_MPEG + 0x00) > + > +#define VE_DEC_MPEG_MP12HDR_SLICE_TYPE(t) (((t) << 28) & GENMASK(30, 28)) > +#define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x)) > +#define VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y) \ > + GENMASK(VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) + 3, \ > + VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) > +#define VE_DEC_MPEG_MP12HDR_F_CODE(x, y, v) \ > + (((v) << VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) & \ > + VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y)) > +#define VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(p) \ > + (((p) << 10) & GENMASK(11, 10)) > +#define VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(s) \ > + (((s) << 8) & GENMASK(9, 8)) > +#define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ > + ((v) ? BIT(7) : 0) > +#define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ > + ((v) ? BIT(6) : 0) > +#define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ > + ((v) ? BIT(5) : 0) > +#define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ > + ((v) ? BIT(4) : 0) > +#define VE_DEC_MPEG_MP12HDR_INTRA_VLC_FORMAT(v) \ > + ((v) ? BIT(3) : 0) > +#define VE_DEC_MPEG_MP12HDR_ALTERNATE_SCAN(v) \ > + ((v) ? BIT(2) : 0) > +#define VE_DEC_MPEG_MP12HDR_FULL_PEL_FORWARD_VECTOR(v) \ > + ((v) ? BIT(1) : 0) > +#define VE_DEC_MPEG_MP12HDR_FULL_PEL_BACKWARD_VECTOR(v) \ > + ((v) ? BIT(0) : 0) > + > +#define VE_DEC_MPEG_PICCODEDSIZE (VE_ENGINE_DEC_MPEG + 0x08) > + > +#define VE_DEC_MPEG_PICCODEDSIZE_WIDTH(w) \ > + ((DIV_ROUND_UP((w), 16) << 8) & GENMASK(15, 8)) > +#define VE_DEC_MPEG_PICCODEDSIZE_HEIGHT(h) \ > + ((DIV_ROUND_UP((h), 16) << 0) & GENMASK(7, 0)) > + > +#define VE_DEC_MPEG_PICBOUNDSIZE (VE_ENGINE_DEC_MPEG + 0x0c) > + > +#define VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(w) (((w) << 16) & GENMASK(27, 16)) > +#define VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(h) (((h) << 0) & GENMASK(11, 0)) > + > +#define VE_DEC_MPEG_MBADDR (VE_ENGINE_DEC_MPEG + 0x10) > + > +#define VE_DEC_MPEG_MBADDR_X(w) (((w) << 8) & GENMASK(15, 8)) > +#define VE_DEC_MPEG_MBADDR_Y(h) (((h) << 0) & GENMASK(0, 7)) > + > +#define VE_DEC_MPEG_CTRL (VE_ENGINE_DEC_MPEG + 0x14) > + > +#define VE_DEC_MPEG_CTRL_MC_CACHE_EN BIT(31) > +#define VE_DEC_MPEG_CTRL_SW_VLD BIT(27) > +#define VE_DEC_MPEG_CTRL_SW_IQ_IS BIT(17) > +#define VE_DEC_MPEG_CTRL_QP_AC_DC_OUT_EN BIT(14) > +#define VE_DEC_MPEG_CTRL_ROTATE_SCALE_OUT_EN BIT(8) > +#define VE_DEC_MPEG_CTRL_MC_NO_WRITEBACK BIT(7) > +#define VE_DEC_MPEG_CTRL_ROTATE_IRQ_EN BIT(6) > +#define VE_DEC_MPEG_CTRL_VLD_DATA_REQ_IRQ_EN BIT(5) > +#define VE_DEC_MPEG_CTRL_ERROR_IRQ_EN BIT(4) > +#define VE_DEC_MPEG_CTRL_FINISH_IRQ_EN BIT(3) > +#define VE_DEC_MPEG_CTRL_IRQ_MASK \ > + (VE_DEC_MPEG_CTRL_FINISH_IRQ_EN | VE_DEC_MPEG_CTRL_ERROR_IRQ_EN | \ > + VE_DEC_MPEG_CTRL_VLD_DATA_REQ_IRQ_EN) > + > +#define VE_DEC_MPEG_TRIGGER (VE_ENGINE_DEC_MPEG + 0x18) > + > +#define VE_DEC_MPEG_TRIGGER_MB_BOUNDARY BIT(31) > + > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_420 (0x00 << 27) > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_411 (0x01 << 27) > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_422 (0x02 << 27) > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_444 (0x03 << 27) > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_422T (0x04 << 27) > + > +#define VE_DEC_MPEG_TRIGGER_MPEG1 (0x01 << 24) > +#define VE_DEC_MPEG_TRIGGER_MPEG2 (0x02 << 24) > +#define VE_DEC_MPEG_TRIGGER_JPEG (0x03 << 24) > +#define VE_DEC_MPEG_TRIGGER_MPEG4 (0x04 << 24) > +#define VE_DEC_MPEG_TRIGGER_VP62 (0x05 << 24) > + > +#define VE_DEC_MPEG_TRIGGER_VP62_AC_GET_BITS BIT(7) > + > +#define VE_DEC_MPEG_TRIGGER_STCD_VC1 (0x02 << 4) > +#define VE_DEC_MPEG_TRIGGER_STCD_MPEG2 (0x01 << 4) > +#define VE_DEC_MPEG_TRIGGER_STCD_AVC (0x00 << 4) > + > +#define VE_DEC_MPEG_TRIGGER_HW_MPEG_VLD (0x0f << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_JPEG_VLD (0x0e << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_MB (0x0d << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_ROTATE (0x0c << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_VP6_VLD (0x0b << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_MAF (0x0a << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_STCD_END (0x09 << 0) > +#define VE_DEC_MPEG_TRIGGER_HW_STCD_BEGIN (0x08 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_MC (0x07 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_IQ (0x06 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_IDCT (0x05 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_SCALE (0x04 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_VP6 (0x03 << 0) > +#define VE_DEC_MPEG_TRIGGER_SW_VP62_AC_GET_BITS (0x02 << 0) > + > +#define VE_DEC_MPEG_STATUS (VE_ENGINE_DEC_MPEG + 0x1c) > + > +#define VE_DEC_MPEG_STATUS_START_DETECT_BUSY BIT(27) > +#define VE_DEC_MPEG_STATUS_VP6_BIT BIT(26) > +#define VE_DEC_MPEG_STATUS_VP6_BIT_BUSY BIT(25) > +#define VE_DEC_MPEG_STATUS_MAF_BUSY BIT(23) > +#define VE_DEC_MPEG_STATUS_VP6_MVP_BUSY BIT(22) > +#define VE_DEC_MPEG_STATUS_JPEG_BIT_END BIT(21) > +#define VE_DEC_MPEG_STATUS_JPEG_RESTART_ERROR BIT(20) > +#define VE_DEC_MPEG_STATUS_JPEG_MARKER BIT(19) > +#define VE_DEC_MPEG_STATUS_ROTATE_BUSY BIT(18) > +#define VE_DEC_MPEG_STATUS_DEBLOCKING_BUSY BIT(17) > +#define VE_DEC_MPEG_STATUS_SCALE_DOWN_BUSY BIT(16) > +#define VE_DEC_MPEG_STATUS_IQIS_BUF_EMPTY BIT(15) > +#define VE_DEC_MPEG_STATUS_IDCT_BUF_EMPTY BIT(14) > +#define VE_DEC_MPEG_STATUS_VE_BUSY BIT(13) > +#define VE_DEC_MPEG_STATUS_MC_BUSY BIT(12) > +#define VE_DEC_MPEG_STATUS_IDCT_BUSY BIT(11) > +#define VE_DEC_MPEG_STATUS_IQIS_BUSY BIT(10) > +#define VE_DEC_MPEG_STATUS_DCAC_BUSY BIT(9) > +#define VE_DEC_MPEG_STATUS_VLD_BUSY BIT(8) > +#define VE_DEC_MPEG_STATUS_ROTATE_SUCCESS BIT(3) > +#define VE_DEC_MPEG_STATUS_VLD_DATA_REQ BIT(2) > +#define VE_DEC_MPEG_STATUS_ERROR BIT(1) > +#define VE_DEC_MPEG_STATUS_SUCCESS BIT(0) > +#define VE_DEC_MPEG_STATUS_CHECK_MASK \ > + (VE_DEC_MPEG_STATUS_SUCCESS | VE_DEC_MPEG_STATUS_ERROR | \ > + VE_DEC_MPEG_STATUS_VLD_DATA_REQ) > +#define VE_DEC_MPEG_STATUS_CHECK_ERROR \ > + (VE_DEC_MPEG_STATUS_ERROR | VE_DEC_MPEG_STATUS_VLD_DATA_REQ) > + > +#define VE_DEC_MPEG_VLD_ADDR (VE_ENGINE_DEC_MPEG + 0x28) > + > +#define VE_DEC_MPEG_VLD_ADDR_FIRST_PIC_DATA BIT(30) > +#define VE_DEC_MPEG_VLD_ADDR_LAST_PIC_DATA BIT(29) > +#define VE_DEC_MPEG_VLD_ADDR_VALID_PIC_DATA BIT(28) > +#define VE_DEC_MPEG_VLD_ADDR_BASE(a) \ > + (((a) & GENMASK(27, 4)) | (((a) >> 28) & GENMASK(3, 0))) > + > +#define VE_DEC_MPEG_VLD_OFFSET (VE_ENGINE_DEC_MPEG + 0x2c) > +#define VE_DEC_MPEG_VLD_LEN (VE_ENGINE_DEC_MPEG + 0x30) > +#define VE_DEC_MPEG_VLD_END_ADDR (VE_ENGINE_DEC_MPEG + 0x34) > + > +#define VE_DEC_MPEG_REC_LUMA (VE_ENGINE_DEC_MPEG + 0x48) > +#define VE_DEC_MPEG_REC_CHROMA (VE_ENGINE_DEC_MPEG + 0x4c) > +#define VE_DEC_MPEG_FWD_REF_LUMA_ADDR (VE_ENGINE_DEC_MPEG + 0x50) > +#define VE_DEC_MPEG_FWD_REF_CHROMA_ADDR (VE_ENGINE_DEC_MPEG + 0x54) > +#define VE_DEC_MPEG_BWD_REF_LUMA_ADDR (VE_ENGINE_DEC_MPEG + 0x58) > +#define VE_DEC_MPEG_BWD_REF_CHROMA_ADDR (VE_ENGINE_DEC_MPEG + 0x5c) > + > +#define VE_DEC_MPEG_IQMINPUT (VE_ENGINE_DEC_MPEG + 0x80) > + > +#define VE_DEC_MPEG_IQMINPUT_FLAG_INTRA (0x01 << 14) > +#define VE_DEC_MPEG_IQMINPUT_FLAG_NON_INTRA (0x00 << 14) > +#define VE_DEC_MPEG_IQMINPUT_WEIGHT(i, v) \ > + (((v) & GENMASK(7, 0)) | (((i) << 8) & GENMASK(13, 8))) > + > +#define VE_DEC_MPEG_ERROR (VE_ENGINE_DEC_MPEG + 0xc4) > +#define VE_DEC_MPEG_CRTMBADDR (VE_ENGINE_DEC_MPEG + 0xc8) > +#define VE_DEC_MPEG_ROT_LUMA (VE_ENGINE_DEC_MPEG + 0xcc) > +#define VE_DEC_MPEG_ROT_CHROMA (VE_ENGINE_DEC_MPEG + 0xd0) > + > +#endif > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > new file mode 100644 > index 000000000000..bd119d2c4e1f > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > @@ -0,0 +1,544 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Cedrus VPU driver > + * > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > + * Copyright (C) 2018 Bootlin > + * > + * Based on the vim2m driver, that is: > + * > + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. > + * Pawel Osciak, <pawel@osciak.com> > + * Marek Szyprowski, <m.szyprowski@samsung.com> > + */ > + > +#include <media/videobuf2-dma-contig.h> > +#include <media/v4l2-device.h> > +#include <media/v4l2-ioctl.h> > +#include <media/v4l2-event.h> > +#include <media/v4l2-mem2mem.h> > + > +#include "cedrus.h" > +#include "cedrus_video.h" > +#include "cedrus_dec.h" > +#include "cedrus_hw.h" > + > +#define CEDRUS_DECODE_SRC BIT(0) > +#define CEDRUS_DECODE_DST BIT(1) > + > +#define CEDRUS_MIN_WIDTH 16U > +#define CEDRUS_MIN_HEIGHT 16U > +#define CEDRUS_MAX_WIDTH 3840U > +#define CEDRUS_MAX_HEIGHT 2160U > + > +static struct cedrus_format cedrus_formats[] = { > + { > + .pixelformat = V4L2_PIX_FMT_MPEG2_SLICE, > + .directions = CEDRUS_DECODE_SRC, > + }, > + { > + .pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12, > + .directions = CEDRUS_DECODE_DST, > + }, > + { > + .pixelformat = V4L2_PIX_FMT_NV12, > + .directions = CEDRUS_DECODE_DST, > + .capabilities = CEDRUS_CAPABILITY_UNTILED, > + }, > +}; > + > +#define CEDRUS_FORMATS_COUNT ARRAY_SIZE(cedrus_formats) > + > +static inline struct cedrus_ctx *cedrus_file2ctx(struct file *file) > +{ > + return container_of(file->private_data, struct cedrus_ctx, fh); > +} > + > +static struct cedrus_format *cedrus_find_format(u32 pixelformat, u32 directions, > + unsigned int capabilities) > +{ > + struct cedrus_format *fmt; > + unsigned int i; > + > + for (i = 0; i < CEDRUS_FORMATS_COUNT; i++) { > + fmt = &cedrus_formats[i]; > + > + if (fmt->capabilities && (fmt->capabilities & capabilities) != > + fmt->capabilities) > + continue; > + > + if (fmt->pixelformat == pixelformat && > + (fmt->directions & directions) != 0) > + break; > + } > + > + if (i == CEDRUS_FORMATS_COUNT) > + return NULL; > + > + return &cedrus_formats[i]; > +} > + > +static bool cedrus_check_format(u32 pixelformat, u32 directions, > + unsigned int capabilities) > +{ > + struct cedrus_format *fmt = cedrus_find_format(pixelformat, directions, > + capabilities); > + > + return fmt != NULL; > +} > + > +static void cedrus_prepare_format(struct v4l2_pix_format *pix_fmt) > +{ > + unsigned int width = pix_fmt->width; > + unsigned int height = pix_fmt->height; > + unsigned int sizeimage = pix_fmt->sizeimage; > + unsigned int bytesperline = pix_fmt->bytesperline; > + > + pix_fmt->field = V4L2_FIELD_NONE; > + > + /* Limit to hardware min/max. */ > + width = clamp(width, CEDRUS_MIN_WIDTH, CEDRUS_MAX_WIDTH); > + height = clamp(height, CEDRUS_MIN_HEIGHT, CEDRUS_MAX_HEIGHT); > + > + switch (pix_fmt->pixelformat) { > + case V4L2_PIX_FMT_MPEG2_SLICE: > + /* Zero bytes per line for encoded source. */ > + bytesperline = 0; > + > + break; > + > + case V4L2_PIX_FMT_SUNXI_TILED_NV12: > + /* 32-aligned stride. */ > + bytesperline = ALIGN(width, 32); > + > + /* 32-aligned height. */ > + height = ALIGN(height, 32); > + > + /* Luma plane size. */ > + sizeimage = bytesperline * height; > + > + /* Chroma plane size. */ > + sizeimage += bytesperline * height / 2; > + > + break; > + > + case V4L2_PIX_FMT_NV12: > + /* 16-aligned stride. */ > + bytesperline = ALIGN(width, 16); > + > + /* 16-aligned height. */ > + height = ALIGN(height, 16); > + > + /* Luma plane size. */ > + sizeimage = bytesperline * height; > + > + /* Chroma plane size. */ > + sizeimage += bytesperline * height / 2; > + > + break; > + } > + > + pix_fmt->width = width; > + pix_fmt->height = height; > + > + pix_fmt->bytesperline = bytesperline; > + pix_fmt->sizeimage = sizeimage; > +} > + > +static int cedrus_querycap(struct file *file, void *priv, > + struct v4l2_capability *cap) > +{ > + strlcpy(cap->driver, CEDRUS_NAME, sizeof(cap->driver)); > + strlcpy(cap->card, CEDRUS_NAME, sizeof(cap->card)); > + snprintf(cap->bus_info, sizeof(cap->bus_info), > + "platform:%s", CEDRUS_NAME); > + > + return 0; > +} > + > +static int cedrus_enum_fmt(struct file *file, struct v4l2_fmtdesc *f, > + u32 direction) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + struct cedrus_dev *dev = ctx->dev; > + unsigned int capabilities = dev->capabilities; > + struct cedrus_format *fmt; > + unsigned int i, index; > + > + /* Index among formats that match the requested direction. */ > + index = 0; > + > + for (i = 0; i < CEDRUS_FORMATS_COUNT; i++) { > + fmt = &cedrus_formats[i]; > + > + if (fmt->capabilities && (fmt->capabilities & capabilities) != > + fmt->capabilities) > + continue; > + > + if (!(cedrus_formats[i].directions & direction)) > + continue; > + > + if (index == f->index) > + break; > + > + index++; > + } > + > + /* Matched format. */ > + if (i < CEDRUS_FORMATS_COUNT) { > + f->pixelformat = cedrus_formats[i].pixelformat; > + > + return 0; > + } > + > + return -EINVAL; > +} > + > +static int cedrus_enum_fmt_vid_cap(struct file *file, void *priv, > + struct v4l2_fmtdesc *f) > +{ > + return cedrus_enum_fmt(file, f, CEDRUS_DECODE_DST); > +} > + > +static int cedrus_enum_fmt_vid_out(struct file *file, void *priv, > + struct v4l2_fmtdesc *f) > +{ > + return cedrus_enum_fmt(file, f, CEDRUS_DECODE_SRC); > +} > + > +static int cedrus_g_fmt_vid_cap(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + > + /* Fall back to dummy default by lack of hardware configuration. */ > + if (!ctx->dst_fmt.width || !ctx->dst_fmt.height) { > + f->fmt.pix.pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12; > + cedrus_prepare_format(&f->fmt.pix); > + > + return 0; > + } > + > + f->fmt.pix = ctx->dst_fmt; > + > + return 0; > +} > + > +static int cedrus_g_fmt_vid_out(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + > + /* Fall back to dummy default by lack of hardware configuration. */ > + if (!ctx->dst_fmt.width || !ctx->dst_fmt.height) { > + f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE; > + f->fmt.pix.sizeimage = SZ_1K; > + cedrus_prepare_format(&f->fmt.pix); > + > + return 0; > + } > + > + f->fmt.pix = ctx->src_fmt; > + > + return 0; > +} > + > +static int cedrus_try_fmt_vid_cap(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + struct cedrus_dev *dev = ctx->dev; > + struct v4l2_pix_format *pix_fmt = &f->fmt.pix; > + > + if (!cedrus_check_format(pix_fmt->pixelformat, CEDRUS_DECODE_DST, > + dev->capabilities)) > + return -EINVAL; > + > + cedrus_prepare_format(pix_fmt); > + > + return 0; > +} > + > +static int cedrus_try_fmt_vid_out(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + struct cedrus_dev *dev = ctx->dev; > + struct v4l2_pix_format *pix_fmt = &f->fmt.pix; > + > + if (!cedrus_check_format(pix_fmt->pixelformat, CEDRUS_DECODE_SRC, > + dev->capabilities)) > + return -EINVAL; > + > + /* Source image size has to be provided by userspace. */ > + if (pix_fmt->sizeimage == 0) > + return -EINVAL; > + > + cedrus_prepare_format(pix_fmt); > + > + return 0; > +} > + > +static int cedrus_s_fmt_vid_cap(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + struct cedrus_dev *dev = ctx->dev; > + int ret; > + > + ret = cedrus_try_fmt_vid_cap(file, priv, f); > + if (ret) > + return ret; > + > + ctx->dst_fmt = f->fmt.pix; > + > + cedrus_dst_format_set(dev, &ctx->dst_fmt); > + > + return 0; > +} > + > +static int cedrus_s_fmt_vid_out(struct file *file, void *priv, > + struct v4l2_format *f) > +{ > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > + int ret; > + > + ret = cedrus_try_fmt_vid_out(file, priv, f); > + if (ret) > + return ret; > + > + ctx->src_fmt = f->fmt.pix; > + > + /* Propagate colorspace information to capture. */ > + ctx->dst_fmt.colorspace = f->fmt.pix.colorspace; > + ctx->dst_fmt.xfer_func = f->fmt.pix.xfer_func; > + ctx->dst_fmt.ycbcr_enc = f->fmt.pix.ycbcr_enc; > + ctx->dst_fmt.quantization = f->fmt.pix.quantization; > + > + return 0; > +} > + > +const struct v4l2_ioctl_ops cedrus_ioctl_ops = { > + .vidioc_querycap = cedrus_querycap, > + > + .vidioc_enum_fmt_vid_cap = cedrus_enum_fmt_vid_cap, > + .vidioc_g_fmt_vid_cap = cedrus_g_fmt_vid_cap, > + .vidioc_try_fmt_vid_cap = cedrus_try_fmt_vid_cap, > + .vidioc_s_fmt_vid_cap = cedrus_s_fmt_vid_cap, > + > + .vidioc_enum_fmt_vid_out = cedrus_enum_fmt_vid_out, > + .vidioc_g_fmt_vid_out = cedrus_g_fmt_vid_out, > + .vidioc_try_fmt_vid_out = cedrus_try_fmt_vid_out, > + .vidioc_s_fmt_vid_out = cedrus_s_fmt_vid_out, > + > + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, > + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, > + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, > + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, > + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, > + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, > + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, > + > + .vidioc_streamon = v4l2_m2m_ioctl_streamon, > + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, > + > + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, > + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, > +}; > + > +static int cedrus_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, > + unsigned int *nplanes, unsigned int sizes[], > + struct device *alloc_devs[]) > +{ > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + struct cedrus_dev *dev = ctx->dev; > + struct v4l2_pix_format *pix_fmt; > + u32 directions; > + > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { > + directions = CEDRUS_DECODE_SRC; > + pix_fmt = &ctx->src_fmt; > + } else { > + directions = CEDRUS_DECODE_DST; > + pix_fmt = &ctx->dst_fmt; > + } > + > + if (!cedrus_check_format(pix_fmt->pixelformat, directions, > + dev->capabilities)) > + return -EINVAL; > + > + if (*nplanes) { > + if (sizes[0] < pix_fmt->sizeimage) > + return -EINVAL; > + } else { > + sizes[0] = pix_fmt->sizeimage; > + *nplanes = 1; > + } > + > + return 0; > +} > + > +static void cedrus_queue_cleanup(struct vb2_queue *vq, u32 state) > +{ > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + struct vb2_v4l2_buffer *vbuf; > + unsigned long flags; > + > + for (;;) { > + spin_lock_irqsave(&ctx->dev->irq_lock, flags); > + > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) > + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); > + else > + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); > + > + spin_unlock_irqrestore(&ctx->dev->irq_lock, flags); > + > + if (!vbuf) > + return; > + > + v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, > + &ctx->hdl); > + v4l2_m2m_buf_done(vbuf, state); > + } > +} > + > +static int cedrus_buf_init(struct vb2_buffer *vb) > +{ > + struct vb2_queue *vq = vb->vb2_queue; > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + > + if (!V4L2_TYPE_IS_OUTPUT(vq->type)) > + ctx->dst_bufs[vb->index] = vb; > + > + return 0; > +} > + > +static void cedrus_buf_cleanup(struct vb2_buffer *vb) > +{ > + struct vb2_queue *vq = vb->vb2_queue; > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + > + if (!V4L2_TYPE_IS_OUTPUT(vq->type)) > + ctx->dst_bufs[vb->index] = NULL; > +} > + > +static int cedrus_buf_prepare(struct vb2_buffer *vb) > +{ > + struct vb2_queue *vq = vb->vb2_queue; > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + struct v4l2_pix_format *pix_fmt; > + > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) > + pix_fmt = &ctx->src_fmt; > + else > + pix_fmt = &ctx->dst_fmt; > + > + if (vb2_plane_size(vb, 0) < pix_fmt->sizeimage) > + return -EINVAL; > + > + vb2_set_plane_payload(vb, 0, pix_fmt->sizeimage); > + > + return 0; > +} > + > +static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count) > +{ > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + struct cedrus_dev *dev = ctx->dev; > + int ret = 0; > + > + switch (ctx->src_fmt.pixelformat) { > + case V4L2_PIX_FMT_MPEG2_SLICE: > + ctx->current_codec = CEDRUS_CODEC_MPEG2; > + break; > + > + default: > + return -EINVAL; > + } > + > + if (V4L2_TYPE_IS_OUTPUT(vq->type) && > + dev->dec_ops[ctx->current_codec]->start) > + ret = dev->dec_ops[ctx->current_codec]->start(ctx); > + > + if (ret) > + cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); > + > + return ret; > +} > + > +static void cedrus_stop_streaming(struct vb2_queue *vq) > +{ > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > + struct cedrus_dev *dev = ctx->dev; > + > + if (V4L2_TYPE_IS_OUTPUT(vq->type) && > + dev->dec_ops[ctx->current_codec]->stop) > + dev->dec_ops[ctx->current_codec]->stop(ctx); > + > + cedrus_queue_cleanup(vq, VB2_BUF_STATE_ERROR); > +} > + > +static void cedrus_buf_queue(struct vb2_buffer *vb) > +{ > + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); > + > + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); > +} > + > +static void cedrus_buf_request_complete(struct vb2_buffer *vb) > +{ > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); > + > + v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->hdl); > +} > +static struct vb2_ops cedrus_qops = { > + .queue_setup = cedrus_queue_setup, > + .buf_prepare = cedrus_buf_prepare, > + .buf_init = cedrus_buf_init, > + .buf_cleanup = cedrus_buf_cleanup, > + .buf_queue = cedrus_buf_queue, > + .buf_request_complete = cedrus_buf_request_complete, > + .start_streaming = cedrus_start_streaming, > + .stop_streaming = cedrus_stop_streaming, > + .wait_prepare = vb2_ops_wait_prepare, > + .wait_finish = vb2_ops_wait_finish, > +}; > + > +int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, > + struct vb2_queue *dst_vq) > +{ > + struct cedrus_ctx *ctx = priv; > + int ret; > + > + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; > + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; > + src_vq->drv_priv = ctx; > + src_vq->buf_struct_size = sizeof(struct cedrus_buffer); > + src_vq->min_buffers_needed = 1; > + src_vq->ops = &cedrus_qops; > + src_vq->mem_ops = &vb2_dma_contig_memops; > + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; > + src_vq->lock = &ctx->dev->dev_mutex; > + src_vq->dev = ctx->dev->dev; > + src_vq->supports_requests = true; > + > + ret = vb2_queue_init(src_vq); > + if (ret) > + return ret; > + > + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; > + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; > + dst_vq->drv_priv = ctx; > + dst_vq->buf_struct_size = sizeof(struct cedrus_buffer); > + dst_vq->min_buffers_needed = 1; > + dst_vq->ops = &cedrus_qops; > + dst_vq->mem_ops = &vb2_dma_contig_memops; > + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; > + dst_vq->lock = &ctx->dev->dev_mutex; > + dst_vq->dev = ctx->dev->dev; > + > + return vb2_queue_init(dst_vq); > +} > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.h b/drivers/staging/media/sunxi/cedrus/cedrus_video.h > new file mode 100644 > index 000000000000..0e4f7a8cccf2 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.h > @@ -0,0 +1,30 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Cedrus VPU driver > + * > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > + * Copyright (C) 2018 Bootlin > + * > + * Based on the vim2m driver, that is: > + * > + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. > + * Pawel Osciak, <pawel@osciak.com> > + * Marek Szyprowski, <m.szyprowski@samsung.com> > + */ > + > +#ifndef _CEDRUS_VIDEO_H_ > +#define _CEDRUS_VIDEO_H_ > + > +struct cedrus_format { > + u32 pixelformat; > + u32 directions; > + unsigned int capabilities; > +}; > + > +extern const struct v4l2_ioctl_ops cedrus_ioctl_ops; > + > +int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, > + struct vb2_queue *dst_vq); > + > +#endif > -- > 2.18.0 > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com. > For more options, visit https://groups.google.com/d/optout.
Hi, Le vendredi 07 septembre 2018 à 07:33 +0000, Priit Laes a écrit : > On Fri, Sep 07, 2018 at 12:24:38AM +0200, Paul Kocialkowski wrote: > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > This introduces the Cedrus VPU driver that supports the VPU found in > > Allwinner SoCs, also known as Video Engine. It is implemented through > > a V4L2 M2M decoder device and a media device (used for media requests). > > So far, it only supports MPEG-2 decoding. > > > > Since this VPU is stateless, synchronization with media requests is > > required in order to ensure consistency between frame headers that > > contain metadata about the frame to process and the raw slice data that > > is used to generate the frame. > > > > This driver was made possible thanks to the long-standing effort > > carried out by the linux-sunxi community in the interest of reverse > > engineering, documenting and implementing support for the Allwinner VPU. > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > --- > > [...] > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > > new file mode 100644 > > index 000000000000..029eb1626bf4 > > --- /dev/null > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > > @@ -0,0 +1,237 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Cedrus VPU driver > > + * > > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > + * Copyright (C) 2018 Bootlin > > + */ > > + > > +#include <media/videobuf2-dma-contig.h> > > + > > +#include "cedrus.h" > > +#include "cedrus_hw.h" > > +#include "cedrus_regs.h" > > + > > +/* Default MPEG-2 quantization coefficients, from the specification. */ > > + > > +static const u8 intra_quantization_matrix_default[64] = { > > + 8, 16, 16, 19, 16, 19, 22, 22, > > + 22, 22, 22, 22, 26, 24, 26, 27, > > + 27, 27, 26, 26, 26, 26, 27, 27, > > + 27, 29, 29, 29, 34, 34, 34, 29, > > + 29, 29, 27, 27, 29, 29, 32, 32, > > + 34, 34, 37, 38, 37, 35, 35, 34, > > + 35, 38, 38, 40, 40, 40, 48, 48, > > + 46, 46, 56, 56, 58, 69, 69, 83 > > +}; > > I think it should also mention that the table above is the DC > prediction table, already in the zig-zag order. Good idea, although this is certainly not worth sending a new revision for. Feel free to suggest this change on top of the series if I don't! Cheers, Paul > 8, 16, 19, 22, 26, 27, 29, 34, > 16, 16, 22, 24, 27, 29, 34, 37, > 19, 22, 26, 27, 29, 34, 34, 38, > 22, 22, 26, 27, 29, 34, 37, 40, > 22, 26, 27, 29, 32, 35, 40, 48, > 26, 27, 29, 32, 35, 40, 48, 58, > 26, 27, 29, 34, 38, 46, 56, 69, > 27, 29, 35, 38, 46, 56, 69, 83 > > See slides no 466 and 486 in following pdf: > http://iphome.hhi.de/schwarz/assets/pdfs/08_ImageCoding.pdf > > + > > +static const u8 non_intra_quantization_matrix_default[64] = { > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16, > > + 16, 16, 16, 16, 16, 16, 16, 16 > > +}; > > + > > +static enum cedrus_irq_status cedrus_mpeg2_irq_status(struct cedrus_ctx *ctx) > > +{ > > + struct cedrus_dev *dev = ctx->dev; > > + u32 reg; > > + > > + reg = cedrus_read(dev, VE_DEC_MPEG_STATUS); > > + reg &= VE_DEC_MPEG_STATUS_CHECK_MASK; > > + > > + if (!reg) > > + return CEDRUS_IRQ_NONE; > > + > > + if (reg & VE_DEC_MPEG_STATUS_CHECK_ERROR || > > + !(reg & VE_DEC_MPEG_STATUS_SUCCESS)) > > + return CEDRUS_IRQ_ERROR; > > + > > + return CEDRUS_IRQ_OK; > > +} > > + > > +static void cedrus_mpeg2_irq_clear(struct cedrus_ctx *ctx) > > +{ > > + struct cedrus_dev *dev = ctx->dev; > > + > > + cedrus_write(dev, VE_DEC_MPEG_STATUS, VE_DEC_MPEG_STATUS_CHECK_MASK); > > +} > > + > > +static void cedrus_mpeg2_irq_disable(struct cedrus_ctx *ctx) > > +{ > > + struct cedrus_dev *dev = ctx->dev; > > + u32 reg = cedrus_read(dev, VE_DEC_MPEG_CTRL); > > + > > + reg &= ~VE_DEC_MPEG_CTRL_IRQ_MASK; > > + > > + cedrus_write(dev, VE_DEC_MPEG_CTRL, reg); > > +} > > + > > +static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) > > +{ > > + const struct v4l2_ctrl_mpeg2_slice_params *slice_params; > > + const struct v4l2_mpeg2_sequence *sequence; > > + const struct v4l2_mpeg2_picture *picture; > > + const struct v4l2_ctrl_mpeg2_quantization *quantization; > > + dma_addr_t src_buf_addr, dst_luma_addr, dst_chroma_addr; > > + dma_addr_t fwd_luma_addr, fwd_chroma_addr; > > + dma_addr_t bwd_luma_addr, bwd_chroma_addr; > > + struct cedrus_dev *dev = ctx->dev; > > + const u8 *matrix; > > + unsigned int i; > > + u32 reg; > > + > > + slice_params = run->mpeg2.slice_params; > > + sequence = &slice_params->sequence; > > + picture = &slice_params->picture; > > + > > + quantization = run->mpeg2.quantization; > > + > > + /* Activate MPEG engine. */ > > + cedrus_engine_enable(dev, CEDRUS_CODEC_MPEG2); > > + > > + /* Set intra quantization matrix. */ > > + > > + if (quantization && quantization->load_intra_quantiser_matrix) > > + matrix = quantization->intra_quantiser_matrix; > > + else > > + matrix = intra_quantization_matrix_default; > > + > > + for (i = 0; i < 64; i++) { > > + reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); > > + reg |= VE_DEC_MPEG_IQMINPUT_FLAG_INTRA; > > + > > + cedrus_write(dev, VE_DEC_MPEG_IQMINPUT, reg); > > + } > > + > > + /* Set non-intra quantization matrix. */ > > + > > + if (quantization && quantization->load_non_intra_quantiser_matrix) > > + matrix = quantization->non_intra_quantiser_matrix; > > + else > > + matrix = non_intra_quantization_matrix_default; > > + > > + for (i = 0; i < 64; i++) { > > + reg = VE_DEC_MPEG_IQMINPUT_WEIGHT(i, matrix[i]); > > + reg |= VE_DEC_MPEG_IQMINPUT_FLAG_NON_INTRA; > > + > > + cedrus_write(dev, VE_DEC_MPEG_IQMINPUT, reg); > > + } > > + > > + /* Set MPEG picture header. */ > > + > > + reg = VE_DEC_MPEG_MP12HDR_SLICE_TYPE(picture->picture_coding_type); > > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 0, picture->f_code[0][0]); > > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(0, 1, picture->f_code[0][1]); > > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 0, picture->f_code[1][0]); > > + reg |= VE_DEC_MPEG_MP12HDR_F_CODE(1, 1, picture->f_code[1][1]); > > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(picture->intra_dc_precision); > > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(picture->picture_structure); > > + reg |= VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(picture->top_field_first); > > + reg |= VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(picture->frame_pred_frame_dct); > > + reg |= VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(picture->concealment_motion_vectors); > > + reg |= VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(picture->q_scale_type); > > + reg |= VE_DEC_MPEG_MP12HDR_INTRA_VLC_FORMAT(picture->intra_vlc_format); > > + reg |= VE_DEC_MPEG_MP12HDR_ALTERNATE_SCAN(picture->alternate_scan); > > + reg |= VE_DEC_MPEG_MP12HDR_FULL_PEL_FORWARD_VECTOR(0); > > + reg |= VE_DEC_MPEG_MP12HDR_FULL_PEL_BACKWARD_VECTOR(0); > > + > > + cedrus_write(dev, VE_DEC_MPEG_MP12HDR, reg); > > + > > + /* Set frame dimensions. */ > > + > > + reg = VE_DEC_MPEG_PICCODEDSIZE_WIDTH(sequence->horizontal_size); > > + reg |= VE_DEC_MPEG_PICCODEDSIZE_HEIGHT(sequence->vertical_size); > > + > > + cedrus_write(dev, VE_DEC_MPEG_PICCODEDSIZE, reg); > > + > > + reg = VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(ctx->src_fmt.width); > > + reg |= VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(ctx->src_fmt.height); > > + > > + cedrus_write(dev, VE_DEC_MPEG_PICBOUNDSIZE, reg); > > + > > + /* Forward and backward prediction reference buffers. */ > > + > > + fwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 0); > > + fwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 1); > > + > > + cedrus_write(dev, VE_DEC_MPEG_FWD_REF_LUMA_ADDR, fwd_luma_addr); > > + cedrus_write(dev, VE_DEC_MPEG_FWD_REF_CHROMA_ADDR, fwd_chroma_addr); > > + > > + bwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 0); > > + bwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 1); > > + > > + cedrus_write(dev, VE_DEC_MPEG_BWD_REF_LUMA_ADDR, bwd_luma_addr); > > + cedrus_write(dev, VE_DEC_MPEG_BWD_REF_CHROMA_ADDR, bwd_chroma_addr); > > + > > + /* Destination luma and chroma buffers. */ > > + > > + dst_luma_addr = cedrus_dst_buf_addr(ctx, run->dst->vb2_buf.index, 0); > > + dst_chroma_addr = cedrus_dst_buf_addr(ctx, run->dst->vb2_buf.index, 1); > > + > > + cedrus_write(dev, VE_DEC_MPEG_REC_LUMA, dst_luma_addr); > > + cedrus_write(dev, VE_DEC_MPEG_REC_CHROMA, dst_chroma_addr); > > + > > + /* Source offset and length in bits. */ > > + > > + cedrus_write(dev, VE_DEC_MPEG_VLD_OFFSET, slice_params->data_bit_offset); > > + > > + reg = slice_params->bit_size - slice_params->data_bit_offset; > > + cedrus_write(dev, VE_DEC_MPEG_VLD_LEN, reg); > > + > > + /* Source beginning and end addresses. */ > > + > > + src_buf_addr = vb2_dma_contig_plane_dma_addr(&run->src->vb2_buf, 0); > > + > > + reg = VE_DEC_MPEG_VLD_ADDR_BASE(src_buf_addr); > > + reg |= VE_DEC_MPEG_VLD_ADDR_VALID_PIC_DATA; > > + reg |= VE_DEC_MPEG_VLD_ADDR_LAST_PIC_DATA; > > + reg |= VE_DEC_MPEG_VLD_ADDR_FIRST_PIC_DATA; > > + > > + cedrus_write(dev, VE_DEC_MPEG_VLD_ADDR, reg); > > + > > + reg = src_buf_addr + DIV_ROUND_UP(slice_params->bit_size, 8); > > + cedrus_write(dev, VE_DEC_MPEG_VLD_END_ADDR, reg); > > + > > + /* Macroblock address: start at the beginning. */ > > + reg = VE_DEC_MPEG_MBADDR_Y(0) | VE_DEC_MPEG_MBADDR_X(0); > > + cedrus_write(dev, VE_DEC_MPEG_MBADDR, reg); > > + > > + /* Clear previous errors. */ > > + cedrus_write(dev, VE_DEC_MPEG_ERROR, 0); > > + > > + /* Clear correct macroblocks register. */ > > + cedrus_write(dev, VE_DEC_MPEG_CRTMBADDR, 0); > > + > > + /* Enable appropriate interruptions and components. */ > > + > > + reg = VE_DEC_MPEG_CTRL_IRQ_MASK | VE_DEC_MPEG_CTRL_MC_NO_WRITEBACK | > > + VE_DEC_MPEG_CTRL_MC_CACHE_EN; > > + > > + cedrus_write(dev, VE_DEC_MPEG_CTRL, reg); > > +} > > + > > +static void cedrus_mpeg2_trigger(struct cedrus_ctx *ctx) > > +{ > > + struct cedrus_dev *dev = ctx->dev; > > + u32 reg; > > + > > + /* Trigger MPEG engine. */ > > + reg = VE_DEC_MPEG_TRIGGER_HW_MPEG_VLD | VE_DEC_MPEG_TRIGGER_MPEG2 | > > + VE_DEC_MPEG_TRIGGER_MB_BOUNDARY; > > + > > + cedrus_write(dev, VE_DEC_MPEG_TRIGGER, reg); > > +} > > + > > +struct cedrus_dec_ops cedrus_dec_ops_mpeg2 = { > > + .irq_clear = cedrus_mpeg2_irq_clear, > > + .irq_disable = cedrus_mpeg2_irq_disable, > > + .irq_status = cedrus_mpeg2_irq_status, > > + .setup = cedrus_mpeg2_setup, > > + .trigger = cedrus_mpeg2_trigger, > > +}; > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > new file mode 100644 > > index 000000000000..9b14d1fb94a0 > > --- /dev/null > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > @@ -0,0 +1,233 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Cedrus VPU driver > > + * > > + * Copyright (c) 2013-2016 Jens Kuske <jenskuske@gmail.com> > > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > + */ > > + > > +#ifndef _CEDRUS_REGS_H_ > > +#define _CEDRUS_REGS_H_ > > + > > +/* > > + * Common acronyms and contractions used in register descriptions: > > + * * VLD : Variable-Length Decoder > > + * * IQ: Inverse Quantization > > + * * IDCT: Inverse Discrete Cosine Transform > > + * * MC: Motion Compensation > > + * * STCD: Start Code Detect > > + * * SDRT: Scale Down and Rotate > > + */ > > + > > +#define VE_ENGINE_DEC_MPEG 0x100 > > +#define VE_ENGINE_DEC_H264 0x200 > > + > > +#define VE_MODE 0x00 > > + > > +#define VE_MODE_REC_WR_MODE_2MB (0x01 << 20) > > +#define VE_MODE_REC_WR_MODE_1MB (0x00 << 20) > > +#define VE_MODE_DDR_MODE_BW_128 (0x03 << 16) > > +#define VE_MODE_DDR_MODE_BW_256 (0x02 << 16) > > +#define VE_MODE_DISABLED (0x07 << 0) > > +#define VE_MODE_DEC_H265 (0x04 << 0) > > +#define VE_MODE_DEC_H264 (0x01 << 0) > > +#define VE_MODE_DEC_MPEG (0x00 << 0) > > + > > +#define VE_PRIMARY_CHROMA_BUF_LEN 0xc4 > > +#define VE_PRIMARY_FB_LINE_STRIDE 0xc8 > > + > > +#define VE_PRIMARY_FB_LINE_STRIDE_CHROMA(s) (((s) << 16) & GENMASK(31, 16)) > > +#define VE_PRIMARY_FB_LINE_STRIDE_LUMA(s) (((s) << 0) & GENMASK(15, 0)) > > + > > +#define VE_CHROMA_BUF_LEN 0xe8 > > + > > +#define VE_SECONDARY_OUT_FMT_TILED_32_NV12 (0x00 << 30) > > +#define VE_SECONDARY_OUT_FMT_EXT (0x01 << 30) > > +#define VE_SECONDARY_OUT_FMT_YU12 (0x02 << 30) > > +#define VE_SECONDARY_OUT_FMT_YV12 (0x03 << 30) > > +#define VE_CHROMA_BUF_LEN_SDRT(l) ((l) & GENMASK(27, 0)) > > + > > +#define VE_PRIMARY_OUT_FMT 0xec > > + > > +#define VE_PRIMARY_OUT_FMT_TILED_32_NV12 (0x00 << 4) > > +#define VE_PRIMARY_OUT_FMT_TILED_128_NV12 (0x01 << 4) > > +#define VE_PRIMARY_OUT_FMT_YU12 (0x02 << 4) > > +#define VE_PRIMARY_OUT_FMT_YV12 (0x03 << 4) > > +#define VE_PRIMARY_OUT_FMT_NV12 (0x04 << 4) > > +#define VE_PRIMARY_OUT_FMT_NV21 (0x05 << 4) > > +#define VE_SECONDARY_OUT_FMT_EXT_TILED_32_NV12 (0x00 << 0) > > +#define VE_SECONDARY_OUT_FMT_EXT_TILED_128_NV12 (0x01 << 0) > > +#define VE_SECONDARY_OUT_FMT_EXT_YU12 (0x02 << 0) > > +#define VE_SECONDARY_OUT_FMT_EXT_YV12 (0x03 << 0) > > +#define VE_SECONDARY_OUT_FMT_EXT_NV12 (0x04 << 0) > > +#define VE_SECONDARY_OUT_FMT_EXT_NV21 (0x05 << 0) > > + > > +#define VE_VERSION 0xf0 > > + > > +#define VE_VERSION_SHIFT 16 > > + > > +#define VE_DEC_MPEG_MP12HDR (VE_ENGINE_DEC_MPEG + 0x00) > > + > > +#define VE_DEC_MPEG_MP12HDR_SLICE_TYPE(t) (((t) << 28) & GENMASK(30, 28)) > > +#define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x)) > > +#define VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y) \ > > + GENMASK(VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) + 3, \ > > + VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) > > +#define VE_DEC_MPEG_MP12HDR_F_CODE(x, y, v) \ > > + (((v) << VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) & \ > > + VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y)) > > +#define VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(p) \ > > + (((p) << 10) & GENMASK(11, 10)) > > +#define VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(s) \ > > + (((s) << 8) & GENMASK(9, 8)) > > +#define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ > > + ((v) ? BIT(7) : 0) > > +#define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ > > + ((v) ? BIT(6) : 0) > > +#define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ > > + ((v) ? BIT(5) : 0) > > +#define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ > > + ((v) ? BIT(4) : 0) > > +#define VE_DEC_MPEG_MP12HDR_INTRA_VLC_FORMAT(v) \ > > + ((v) ? BIT(3) : 0) > > +#define VE_DEC_MPEG_MP12HDR_ALTERNATE_SCAN(v) \ > > + ((v) ? BIT(2) : 0) > > +#define VE_DEC_MPEG_MP12HDR_FULL_PEL_FORWARD_VECTOR(v) \ > > + ((v) ? BIT(1) : 0) > > +#define VE_DEC_MPEG_MP12HDR_FULL_PEL_BACKWARD_VECTOR(v) \ > > + ((v) ? BIT(0) : 0) > > + > > +#define VE_DEC_MPEG_PICCODEDSIZE (VE_ENGINE_DEC_MPEG + 0x08) > > + > > +#define VE_DEC_MPEG_PICCODEDSIZE_WIDTH(w) \ > > + ((DIV_ROUND_UP((w), 16) << 8) & GENMASK(15, 8)) > > +#define VE_DEC_MPEG_PICCODEDSIZE_HEIGHT(h) \ > > + ((DIV_ROUND_UP((h), 16) << 0) & GENMASK(7, 0)) > > + > > +#define VE_DEC_MPEG_PICBOUNDSIZE (VE_ENGINE_DEC_MPEG + 0x0c) > > + > > +#define VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(w) (((w) << 16) & GENMASK(27, 16)) > > +#define VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(h) (((h) << 0) & GENMASK(11, 0)) > > + > > +#define VE_DEC_MPEG_MBADDR (VE_ENGINE_DEC_MPEG + 0x10) > > + > > +#define VE_DEC_MPEG_MBADDR_X(w) (((w) << 8) & GENMASK(15, 8)) > > +#define VE_DEC_MPEG_MBADDR_Y(h) (((h) << 0) & GENMASK(0, 7)) > > + > > +#define VE_DEC_MPEG_CTRL (VE_ENGINE_DEC_MPEG + 0x14) > > + > > +#define VE_DEC_MPEG_CTRL_MC_CACHE_EN BIT(31) > > +#define VE_DEC_MPEG_CTRL_SW_VLD BIT(27) > > +#define VE_DEC_MPEG_CTRL_SW_IQ_IS BIT(17) > > +#define VE_DEC_MPEG_CTRL_QP_AC_DC_OUT_EN BIT(14) > > +#define VE_DEC_MPEG_CTRL_ROTATE_SCALE_OUT_EN BIT(8) > > +#define VE_DEC_MPEG_CTRL_MC_NO_WRITEBACK BIT(7) > > +#define VE_DEC_MPEG_CTRL_ROTATE_IRQ_EN BIT(6) > > +#define VE_DEC_MPEG_CTRL_VLD_DATA_REQ_IRQ_EN BIT(5) > > +#define VE_DEC_MPEG_CTRL_ERROR_IRQ_EN BIT(4) > > +#define VE_DEC_MPEG_CTRL_FINISH_IRQ_EN BIT(3) > > +#define VE_DEC_MPEG_CTRL_IRQ_MASK \ > > + (VE_DEC_MPEG_CTRL_FINISH_IRQ_EN | VE_DEC_MPEG_CTRL_ERROR_IRQ_EN | \ > > + VE_DEC_MPEG_CTRL_VLD_DATA_REQ_IRQ_EN) > > + > > +#define VE_DEC_MPEG_TRIGGER (VE_ENGINE_DEC_MPEG + 0x18) > > + > > +#define VE_DEC_MPEG_TRIGGER_MB_BOUNDARY BIT(31) > > + > > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_420 (0x00 << 27) > > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_411 (0x01 << 27) > > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_422 (0x02 << 27) > > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_444 (0x03 << 27) > > +#define VE_DEC_MPEG_TRIGGER_CHROMA_FMT_422T (0x04 << 27) > > + > > +#define VE_DEC_MPEG_TRIGGER_MPEG1 (0x01 << 24) > > +#define VE_DEC_MPEG_TRIGGER_MPEG2 (0x02 << 24) > > +#define VE_DEC_MPEG_TRIGGER_JPEG (0x03 << 24) > > +#define VE_DEC_MPEG_TRIGGER_MPEG4 (0x04 << 24) > > +#define VE_DEC_MPEG_TRIGGER_VP62 (0x05 << 24) > > + > > +#define VE_DEC_MPEG_TRIGGER_VP62_AC_GET_BITS BIT(7) > > + > > +#define VE_DEC_MPEG_TRIGGER_STCD_VC1 (0x02 << 4) > > +#define VE_DEC_MPEG_TRIGGER_STCD_MPEG2 (0x01 << 4) > > +#define VE_DEC_MPEG_TRIGGER_STCD_AVC (0x00 << 4) > > + > > +#define VE_DEC_MPEG_TRIGGER_HW_MPEG_VLD (0x0f << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_JPEG_VLD (0x0e << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_MB (0x0d << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_ROTATE (0x0c << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_VP6_VLD (0x0b << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_MAF (0x0a << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_STCD_END (0x09 << 0) > > +#define VE_DEC_MPEG_TRIGGER_HW_STCD_BEGIN (0x08 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_MC (0x07 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_IQ (0x06 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_IDCT (0x05 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_SCALE (0x04 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_VP6 (0x03 << 0) > > +#define VE_DEC_MPEG_TRIGGER_SW_VP62_AC_GET_BITS (0x02 << 0) > > + > > +#define VE_DEC_MPEG_STATUS (VE_ENGINE_DEC_MPEG + 0x1c) > > + > > +#define VE_DEC_MPEG_STATUS_START_DETECT_BUSY BIT(27) > > +#define VE_DEC_MPEG_STATUS_VP6_BIT BIT(26) > > +#define VE_DEC_MPEG_STATUS_VP6_BIT_BUSY BIT(25) > > +#define VE_DEC_MPEG_STATUS_MAF_BUSY BIT(23) > > +#define VE_DEC_MPEG_STATUS_VP6_MVP_BUSY BIT(22) > > +#define VE_DEC_MPEG_STATUS_JPEG_BIT_END BIT(21) > > +#define VE_DEC_MPEG_STATUS_JPEG_RESTART_ERROR BIT(20) > > +#define VE_DEC_MPEG_STATUS_JPEG_MARKER BIT(19) > > +#define VE_DEC_MPEG_STATUS_ROTATE_BUSY BIT(18) > > +#define VE_DEC_MPEG_STATUS_DEBLOCKING_BUSY BIT(17) > > +#define VE_DEC_MPEG_STATUS_SCALE_DOWN_BUSY BIT(16) > > +#define VE_DEC_MPEG_STATUS_IQIS_BUF_EMPTY BIT(15) > > +#define VE_DEC_MPEG_STATUS_IDCT_BUF_EMPTY BIT(14) > > +#define VE_DEC_MPEG_STATUS_VE_BUSY BIT(13) > > +#define VE_DEC_MPEG_STATUS_MC_BUSY BIT(12) > > +#define VE_DEC_MPEG_STATUS_IDCT_BUSY BIT(11) > > +#define VE_DEC_MPEG_STATUS_IQIS_BUSY BIT(10) > > +#define VE_DEC_MPEG_STATUS_DCAC_BUSY BIT(9) > > +#define VE_DEC_MPEG_STATUS_VLD_BUSY BIT(8) > > +#define VE_DEC_MPEG_STATUS_ROTATE_SUCCESS BIT(3) > > +#define VE_DEC_MPEG_STATUS_VLD_DATA_REQ BIT(2) > > +#define VE_DEC_MPEG_STATUS_ERROR BIT(1) > > +#define VE_DEC_MPEG_STATUS_SUCCESS BIT(0) > > +#define VE_DEC_MPEG_STATUS_CHECK_MASK \ > > + (VE_DEC_MPEG_STATUS_SUCCESS | VE_DEC_MPEG_STATUS_ERROR | \ > > + VE_DEC_MPEG_STATUS_VLD_DATA_REQ) > > +#define VE_DEC_MPEG_STATUS_CHECK_ERROR \ > > + (VE_DEC_MPEG_STATUS_ERROR | VE_DEC_MPEG_STATUS_VLD_DATA_REQ) > > + > > +#define VE_DEC_MPEG_VLD_ADDR (VE_ENGINE_DEC_MPEG + 0x28) > > + > > +#define VE_DEC_MPEG_VLD_ADDR_FIRST_PIC_DATA BIT(30) > > +#define VE_DEC_MPEG_VLD_ADDR_LAST_PIC_DATA BIT(29) > > +#define VE_DEC_MPEG_VLD_ADDR_VALID_PIC_DATA BIT(28) > > +#define VE_DEC_MPEG_VLD_ADDR_BASE(a) \ > > + (((a) & GENMASK(27, 4)) | (((a) >> 28) & GENMASK(3, 0))) > > + > > +#define VE_DEC_MPEG_VLD_OFFSET (VE_ENGINE_DEC_MPEG + 0x2c) > > +#define VE_DEC_MPEG_VLD_LEN (VE_ENGINE_DEC_MPEG + 0x30) > > +#define VE_DEC_MPEG_VLD_END_ADDR (VE_ENGINE_DEC_MPEG + 0x34) > > + > > +#define VE_DEC_MPEG_REC_LUMA (VE_ENGINE_DEC_MPEG + 0x48) > > +#define VE_DEC_MPEG_REC_CHROMA (VE_ENGINE_DEC_MPEG + 0x4c) > > +#define VE_DEC_MPEG_FWD_REF_LUMA_ADDR (VE_ENGINE_DEC_MPEG + 0x50) > > +#define VE_DEC_MPEG_FWD_REF_CHROMA_ADDR (VE_ENGINE_DEC_MPEG + 0x54) > > +#define VE_DEC_MPEG_BWD_REF_LUMA_ADDR (VE_ENGINE_DEC_MPEG + 0x58) > > +#define VE_DEC_MPEG_BWD_REF_CHROMA_ADDR (VE_ENGINE_DEC_MPEG + 0x5c) > > + > > +#define VE_DEC_MPEG_IQMINPUT (VE_ENGINE_DEC_MPEG + 0x80) > > + > > +#define VE_DEC_MPEG_IQMINPUT_FLAG_INTRA (0x01 << 14) > > +#define VE_DEC_MPEG_IQMINPUT_FLAG_NON_INTRA (0x00 << 14) > > +#define VE_DEC_MPEG_IQMINPUT_WEIGHT(i, v) \ > > + (((v) & GENMASK(7, 0)) | (((i) << 8) & GENMASK(13, 8))) > > + > > +#define VE_DEC_MPEG_ERROR (VE_ENGINE_DEC_MPEG + 0xc4) > > +#define VE_DEC_MPEG_CRTMBADDR (VE_ENGINE_DEC_MPEG + 0xc8) > > +#define VE_DEC_MPEG_ROT_LUMA (VE_ENGINE_DEC_MPEG + 0xcc) > > +#define VE_DEC_MPEG_ROT_CHROMA (VE_ENGINE_DEC_MPEG + 0xd0) > > + > > +#endif > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > > new file mode 100644 > > index 000000000000..bd119d2c4e1f > > --- /dev/null > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c > > @@ -0,0 +1,544 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Cedrus VPU driver > > + * > > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > + * Copyright (C) 2018 Bootlin > > + * > > + * Based on the vim2m driver, that is: > > + * > > + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. > > + * Pawel Osciak, <pawel@osciak.com> > > + * Marek Szyprowski, <m.szyprowski@samsung.com> > > + */ > > + > > +#include <media/videobuf2-dma-contig.h> > > +#include <media/v4l2-device.h> > > +#include <media/v4l2-ioctl.h> > > +#include <media/v4l2-event.h> > > +#include <media/v4l2-mem2mem.h> > > + > > +#include "cedrus.h" > > +#include "cedrus_video.h" > > +#include "cedrus_dec.h" > > +#include "cedrus_hw.h" > > + > > +#define CEDRUS_DECODE_SRC BIT(0) > > +#define CEDRUS_DECODE_DST BIT(1) > > + > > +#define CEDRUS_MIN_WIDTH 16U > > +#define CEDRUS_MIN_HEIGHT 16U > > +#define CEDRUS_MAX_WIDTH 3840U > > +#define CEDRUS_MAX_HEIGHT 2160U > > + > > +static struct cedrus_format cedrus_formats[] = { > > + { > > + .pixelformat = V4L2_PIX_FMT_MPEG2_SLICE, > > + .directions = CEDRUS_DECODE_SRC, > > + }, > > + { > > + .pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12, > > + .directions = CEDRUS_DECODE_DST, > > + }, > > + { > > + .pixelformat = V4L2_PIX_FMT_NV12, > > + .directions = CEDRUS_DECODE_DST, > > + .capabilities = CEDRUS_CAPABILITY_UNTILED, > > + }, > > +}; > > + > > +#define CEDRUS_FORMATS_COUNT ARRAY_SIZE(cedrus_formats) > > + > > +static inline struct cedrus_ctx *cedrus_file2ctx(struct file *file) > > +{ > > + return container_of(file->private_data, struct cedrus_ctx, fh); > > +} > > + > > +static struct cedrus_format *cedrus_find_format(u32 pixelformat, u32 directions, > > + unsigned int capabilities) > > +{ > > + struct cedrus_format *fmt; > > + unsigned int i; > > + > > + for (i = 0; i < CEDRUS_FORMATS_COUNT; i++) { > > + fmt = &cedrus_formats[i]; > > + > > + if (fmt->capabilities && (fmt->capabilities & capabilities) != > > + fmt->capabilities) > > + continue; > > + > > + if (fmt->pixelformat == pixelformat && > > + (fmt->directions & directions) != 0) > > + break; > > + } > > + > > + if (i == CEDRUS_FORMATS_COUNT) > > + return NULL; > > + > > + return &cedrus_formats[i]; > > +} > > + > > +static bool cedrus_check_format(u32 pixelformat, u32 directions, > > + unsigned int capabilities) > > +{ > > + struct cedrus_format *fmt = cedrus_find_format(pixelformat, directions, > > + capabilities); > > + > > + return fmt != NULL; > > +} > > + > > +static void cedrus_prepare_format(struct v4l2_pix_format *pix_fmt) > > +{ > > + unsigned int width = pix_fmt->width; > > + unsigned int height = pix_fmt->height; > > + unsigned int sizeimage = pix_fmt->sizeimage; > > + unsigned int bytesperline = pix_fmt->bytesperline; > > + > > + pix_fmt->field = V4L2_FIELD_NONE; > > + > > + /* Limit to hardware min/max. */ > > + width = clamp(width, CEDRUS_MIN_WIDTH, CEDRUS_MAX_WIDTH); > > + height = clamp(height, CEDRUS_MIN_HEIGHT, CEDRUS_MAX_HEIGHT); > > + > > + switch (pix_fmt->pixelformat) { > > + case V4L2_PIX_FMT_MPEG2_SLICE: > > + /* Zero bytes per line for encoded source. */ > > + bytesperline = 0; > > + > > + break; > > + > > + case V4L2_PIX_FMT_SUNXI_TILED_NV12: > > + /* 32-aligned stride. */ > > + bytesperline = ALIGN(width, 32); > > + > > + /* 32-aligned height. */ > > + height = ALIGN(height, 32); > > + > > + /* Luma plane size. */ > > + sizeimage = bytesperline * height; > > + > > + /* Chroma plane size. */ > > + sizeimage += bytesperline * height / 2; > > + > > + break; > > + > > + case V4L2_PIX_FMT_NV12: > > + /* 16-aligned stride. */ > > + bytesperline = ALIGN(width, 16); > > + > > + /* 16-aligned height. */ > > + height = ALIGN(height, 16); > > + > > + /* Luma plane size. */ > > + sizeimage = bytesperline * height; > > + > > + /* Chroma plane size. */ > > + sizeimage += bytesperline * height / 2; > > + > > + break; > > + } > > + > > + pix_fmt->width = width; > > + pix_fmt->height = height; > > + > > + pix_fmt->bytesperline = bytesperline; > > + pix_fmt->sizeimage = sizeimage; > > +} > > + > > +static int cedrus_querycap(struct file *file, void *priv, > > + struct v4l2_capability *cap) > > +{ > > + strlcpy(cap->driver, CEDRUS_NAME, sizeof(cap->driver)); > > + strlcpy(cap->card, CEDRUS_NAME, sizeof(cap->card)); > > + snprintf(cap->bus_info, sizeof(cap->bus_info), > > + "platform:%s", CEDRUS_NAME); > > + > > + return 0; > > +} > > + > > +static int cedrus_enum_fmt(struct file *file, struct v4l2_fmtdesc *f, > > + u32 direction) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + struct cedrus_dev *dev = ctx->dev; > > + unsigned int capabilities = dev->capabilities; > > + struct cedrus_format *fmt; > > + unsigned int i, index; > > + > > + /* Index among formats that match the requested direction. */ > > + index = 0; > > + > > + for (i = 0; i < CEDRUS_FORMATS_COUNT; i++) { > > + fmt = &cedrus_formats[i]; > > + > > + if (fmt->capabilities && (fmt->capabilities & capabilities) != > > + fmt->capabilities) > > + continue; > > + > > + if (!(cedrus_formats[i].directions & direction)) > > + continue; > > + > > + if (index == f->index) > > + break; > > + > > + index++; > > + } > > + > > + /* Matched format. */ > > + if (i < CEDRUS_FORMATS_COUNT) { > > + f->pixelformat = cedrus_formats[i].pixelformat; > > + > > + return 0; > > + } > > + > > + return -EINVAL; > > +} > > + > > +static int cedrus_enum_fmt_vid_cap(struct file *file, void *priv, > > + struct v4l2_fmtdesc *f) > > +{ > > + return cedrus_enum_fmt(file, f, CEDRUS_DECODE_DST); > > +} > > + > > +static int cedrus_enum_fmt_vid_out(struct file *file, void *priv, > > + struct v4l2_fmtdesc *f) > > +{ > > + return cedrus_enum_fmt(file, f, CEDRUS_DECODE_SRC); > > +} > > + > > +static int cedrus_g_fmt_vid_cap(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + > > + /* Fall back to dummy default by lack of hardware configuration. */ > > + if (!ctx->dst_fmt.width || !ctx->dst_fmt.height) { > > + f->fmt.pix.pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12; > > + cedrus_prepare_format(&f->fmt.pix); > > + > > + return 0; > > + } > > + > > + f->fmt.pix = ctx->dst_fmt; > > + > > + return 0; > > +} > > + > > +static int cedrus_g_fmt_vid_out(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + > > + /* Fall back to dummy default by lack of hardware configuration. */ > > + if (!ctx->dst_fmt.width || !ctx->dst_fmt.height) { > > + f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE; > > + f->fmt.pix.sizeimage = SZ_1K; > > + cedrus_prepare_format(&f->fmt.pix); > > + > > + return 0; > > + } > > + > > + f->fmt.pix = ctx->src_fmt; > > + > > + return 0; > > +} > > + > > +static int cedrus_try_fmt_vid_cap(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + struct cedrus_dev *dev = ctx->dev; > > + struct v4l2_pix_format *pix_fmt = &f->fmt.pix; > > + > > + if (!cedrus_check_format(pix_fmt->pixelformat, CEDRUS_DECODE_DST, > > + dev->capabilities)) > > + return -EINVAL; > > + > > + cedrus_prepare_format(pix_fmt); > > + > > + return 0; > > +} > > + > > +static int cedrus_try_fmt_vid_out(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + struct cedrus_dev *dev = ctx->dev; > > + struct v4l2_pix_format *pix_fmt = &f->fmt.pix; > > + > > + if (!cedrus_check_format(pix_fmt->pixelformat, CEDRUS_DECODE_SRC, > > + dev->capabilities)) > > + return -EINVAL; > > + > > + /* Source image size has to be provided by userspace. */ > > + if (pix_fmt->sizeimage == 0) > > + return -EINVAL; > > + > > + cedrus_prepare_format(pix_fmt); > > + > > + return 0; > > +} > > + > > +static int cedrus_s_fmt_vid_cap(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + struct cedrus_dev *dev = ctx->dev; > > + int ret; > > + > > + ret = cedrus_try_fmt_vid_cap(file, priv, f); > > + if (ret) > > + return ret; > > + > > + ctx->dst_fmt = f->fmt.pix; > > + > > + cedrus_dst_format_set(dev, &ctx->dst_fmt); > > + > > + return 0; > > +} > > + > > +static int cedrus_s_fmt_vid_out(struct file *file, void *priv, > > + struct v4l2_format *f) > > +{ > > + struct cedrus_ctx *ctx = cedrus_file2ctx(file); > > + int ret; > > + > > + ret = cedrus_try_fmt_vid_out(file, priv, f); > > + if (ret) > > + return ret; > > + > > + ctx->src_fmt = f->fmt.pix; > > + > > + /* Propagate colorspace information to capture. */ > > + ctx->dst_fmt.colorspace = f->fmt.pix.colorspace; > > + ctx->dst_fmt.xfer_func = f->fmt.pix.xfer_func; > > + ctx->dst_fmt.ycbcr_enc = f->fmt.pix.ycbcr_enc; > > + ctx->dst_fmt.quantization = f->fmt.pix.quantization; > > + > > + return 0; > > +} > > + > > +const struct v4l2_ioctl_ops cedrus_ioctl_ops = { > > + .vidioc_querycap = cedrus_querycap, > > + > > + .vidioc_enum_fmt_vid_cap = cedrus_enum_fmt_vid_cap, > > + .vidioc_g_fmt_vid_cap = cedrus_g_fmt_vid_cap, > > + .vidioc_try_fmt_vid_cap = cedrus_try_fmt_vid_cap, > > + .vidioc_s_fmt_vid_cap = cedrus_s_fmt_vid_cap, > > + > > + .vidioc_enum_fmt_vid_out = cedrus_enum_fmt_vid_out, > > + .vidioc_g_fmt_vid_out = cedrus_g_fmt_vid_out, > > + .vidioc_try_fmt_vid_out = cedrus_try_fmt_vid_out, > > + .vidioc_s_fmt_vid_out = cedrus_s_fmt_vid_out, > > + > > + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, > > + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, > > + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, > > + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, > > + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, > > + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, > > + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, > > + > > + .vidioc_streamon = v4l2_m2m_ioctl_streamon, > > + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, > > + > > + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, > > + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, > > +}; > > + > > +static int cedrus_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, > > + unsigned int *nplanes, unsigned int sizes[], > > + struct device *alloc_devs[]) > > +{ > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + struct cedrus_dev *dev = ctx->dev; > > + struct v4l2_pix_format *pix_fmt; > > + u32 directions; > > + > > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) { > > + directions = CEDRUS_DECODE_SRC; > > + pix_fmt = &ctx->src_fmt; > > + } else { > > + directions = CEDRUS_DECODE_DST; > > + pix_fmt = &ctx->dst_fmt; > > + } > > + > > + if (!cedrus_check_format(pix_fmt->pixelformat, directions, > > + dev->capabilities)) > > + return -EINVAL; > > + > > + if (*nplanes) { > > + if (sizes[0] < pix_fmt->sizeimage) > > + return -EINVAL; > > + } else { > > + sizes[0] = pix_fmt->sizeimage; > > + *nplanes = 1; > > + } > > + > > + return 0; > > +} > > + > > +static void cedrus_queue_cleanup(struct vb2_queue *vq, u32 state) > > +{ > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + struct vb2_v4l2_buffer *vbuf; > > + unsigned long flags; > > + > > + for (;;) { > > + spin_lock_irqsave(&ctx->dev->irq_lock, flags); > > + > > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) > > + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); > > + else > > + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); > > + > > + spin_unlock_irqrestore(&ctx->dev->irq_lock, flags); > > + > > + if (!vbuf) > > + return; > > + > > + v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, > > + &ctx->hdl); > > + v4l2_m2m_buf_done(vbuf, state); > > + } > > +} > > + > > +static int cedrus_buf_init(struct vb2_buffer *vb) > > +{ > > + struct vb2_queue *vq = vb->vb2_queue; > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + > > + if (!V4L2_TYPE_IS_OUTPUT(vq->type)) > > + ctx->dst_bufs[vb->index] = vb; > > + > > + return 0; > > +} > > + > > +static void cedrus_buf_cleanup(struct vb2_buffer *vb) > > +{ > > + struct vb2_queue *vq = vb->vb2_queue; > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + > > + if (!V4L2_TYPE_IS_OUTPUT(vq->type)) > > + ctx->dst_bufs[vb->index] = NULL; > > +} > > + > > +static int cedrus_buf_prepare(struct vb2_buffer *vb) > > +{ > > + struct vb2_queue *vq = vb->vb2_queue; > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + struct v4l2_pix_format *pix_fmt; > > + > > + if (V4L2_TYPE_IS_OUTPUT(vq->type)) > > + pix_fmt = &ctx->src_fmt; > > + else > > + pix_fmt = &ctx->dst_fmt; > > + > > + if (vb2_plane_size(vb, 0) < pix_fmt->sizeimage) > > + return -EINVAL; > > + > > + vb2_set_plane_payload(vb, 0, pix_fmt->sizeimage); > > + > > + return 0; > > +} > > + > > +static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count) > > +{ > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + struct cedrus_dev *dev = ctx->dev; > > + int ret = 0; > > + > > + switch (ctx->src_fmt.pixelformat) { > > + case V4L2_PIX_FMT_MPEG2_SLICE: > > + ctx->current_codec = CEDRUS_CODEC_MPEG2; > > + break; > > + > > + default: > > + return -EINVAL; > > + } > > + > > + if (V4L2_TYPE_IS_OUTPUT(vq->type) && > > + dev->dec_ops[ctx->current_codec]->start) > > + ret = dev->dec_ops[ctx->current_codec]->start(ctx); > > + > > + if (ret) > > + cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); > > + > > + return ret; > > +} > > + > > +static void cedrus_stop_streaming(struct vb2_queue *vq) > > +{ > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); > > + struct cedrus_dev *dev = ctx->dev; > > + > > + if (V4L2_TYPE_IS_OUTPUT(vq->type) && > > + dev->dec_ops[ctx->current_codec]->stop) > > + dev->dec_ops[ctx->current_codec]->stop(ctx); > > + > > + cedrus_queue_cleanup(vq, VB2_BUF_STATE_ERROR); > > +} > > + > > +static void cedrus_buf_queue(struct vb2_buffer *vb) > > +{ > > + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); > > + > > + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); > > +} > > + > > +static void cedrus_buf_request_complete(struct vb2_buffer *vb) > > +{ > > + struct cedrus_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); > > + > > + v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->hdl); > > +} > > +static struct vb2_ops cedrus_qops = { > > + .queue_setup = cedrus_queue_setup, > > + .buf_prepare = cedrus_buf_prepare, > > + .buf_init = cedrus_buf_init, > > + .buf_cleanup = cedrus_buf_cleanup, > > + .buf_queue = cedrus_buf_queue, > > + .buf_request_complete = cedrus_buf_request_complete, > > + .start_streaming = cedrus_start_streaming, > > + .stop_streaming = cedrus_stop_streaming, > > + .wait_prepare = vb2_ops_wait_prepare, > > + .wait_finish = vb2_ops_wait_finish, > > +}; > > + > > +int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, > > + struct vb2_queue *dst_vq) > > +{ > > + struct cedrus_ctx *ctx = priv; > > + int ret; > > + > > + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; > > + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; > > + src_vq->drv_priv = ctx; > > + src_vq->buf_struct_size = sizeof(struct cedrus_buffer); > > + src_vq->min_buffers_needed = 1; > > + src_vq->ops = &cedrus_qops; > > + src_vq->mem_ops = &vb2_dma_contig_memops; > > + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; > > + src_vq->lock = &ctx->dev->dev_mutex; > > + src_vq->dev = ctx->dev->dev; > > + src_vq->supports_requests = true; > > + > > + ret = vb2_queue_init(src_vq); > > + if (ret) > > + return ret; > > + > > + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; > > + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; > > + dst_vq->drv_priv = ctx; > > + dst_vq->buf_struct_size = sizeof(struct cedrus_buffer); > > + dst_vq->min_buffers_needed = 1; > > + dst_vq->ops = &cedrus_qops; > > + dst_vq->mem_ops = &vb2_dma_contig_memops; > > + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; > > + dst_vq->lock = &ctx->dev->dev_mutex; > > + dst_vq->dev = ctx->dev->dev; > > + > > + return vb2_queue_init(dst_vq); > > +} > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.h b/drivers/staging/media/sunxi/cedrus/cedrus_video.h > > new file mode 100644 > > index 000000000000..0e4f7a8cccf2 > > --- /dev/null > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.h > > @@ -0,0 +1,30 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Cedrus VPU driver > > + * > > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > + * Copyright (C) 2018 Bootlin > > + * > > + * Based on the vim2m driver, that is: > > + * > > + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. > > + * Pawel Osciak, <pawel@osciak.com> > > + * Marek Szyprowski, <m.szyprowski@samsung.com> > > + */ > > + > > +#ifndef _CEDRUS_VIDEO_H_ > > +#define _CEDRUS_VIDEO_H_ > > + > > +struct cedrus_format { > > + u32 pixelformat; > > + u32 directions; > > + unsigned int capabilities; > > +}; > > + > > +extern const struct v4l2_ioctl_ops cedrus_ioctl_ops; > > + > > +int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, > > + struct vb2_queue *dst_vq); > > + > > +#endif > > -- > > 2.18.0 > > > > -- > > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com. > > For more options, visit https://groups.google.com/d/optout.
On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > This introduces the Cedrus VPU driver that supports the VPU found in > Allwinner SoCs, also known as Video Engine. It is implemented through > a V4L2 M2M decoder device and a media device (used for media requests). > So far, it only supports MPEG-2 decoding. > > Since this VPU is stateless, synchronization with media requests is > required in order to ensure consistency between frame headers that > contain metadata about the frame to process and the raw slice data that > is used to generate the frame. > > This driver was made possible thanks to the long-standing effort > carried out by the linux-sunxi community in the interest of reverse > engineering, documenting and implementing support for the Allwinner VPU. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> One high-level comment: Can you add a TODO file for this staging driver? This can be done in a follow-up patch. It should contain what needs to be done to get this out of staging: - Request API needs to stabilize - Userspace support for stateless codecs must be created - Ideally one other stateless decoder driver and at least one stateless encoder driver should be implemented to ensure that nothing was forgotten in the Request API. - Anything else? And a few last code comments: > --- > MAINTAINERS | 7 + > drivers/staging/media/Kconfig | 2 + > drivers/staging/media/Makefile | 1 + > drivers/staging/media/sunxi/Kconfig | 15 + > drivers/staging/media/sunxi/Makefile | 1 + > drivers/staging/media/sunxi/cedrus/Kconfig | 14 + > drivers/staging/media/sunxi/cedrus/Makefile | 3 + > drivers/staging/media/sunxi/cedrus/cedrus.c | 422 ++++++++++++++ > drivers/staging/media/sunxi/cedrus/cedrus.h | 165 ++++++ > .../staging/media/sunxi/cedrus/cedrus_dec.c | 70 +++ > .../staging/media/sunxi/cedrus/cedrus_dec.h | 27 + > .../staging/media/sunxi/cedrus/cedrus_hw.c | 322 +++++++++++ > .../staging/media/sunxi/cedrus/cedrus_hw.h | 30 + > .../staging/media/sunxi/cedrus/cedrus_mpeg2.c | 237 ++++++++ > .../staging/media/sunxi/cedrus/cedrus_regs.h | 233 ++++++++ > .../staging/media/sunxi/cedrus/cedrus_video.c | 544 ++++++++++++++++++ > .../staging/media/sunxi/cedrus/cedrus_video.h | 30 + > 17 files changed, 2123 insertions(+) > create mode 100644 drivers/staging/media/sunxi/Kconfig > create mode 100644 drivers/staging/media/sunxi/Makefile > create mode 100644 drivers/staging/media/sunxi/cedrus/Kconfig > create mode 100644 drivers/staging/media/sunxi/cedrus/Makefile > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_regs.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.h > <snip> > +static int cedrus_request_validate(struct media_request *req) > +{ > + struct media_request_object *obj; > + struct v4l2_ctrl_handler *parent_hdl, *hdl; > + struct cedrus_ctx *ctx = NULL; > + struct v4l2_ctrl *ctrl_test; > + unsigned int i; > + > + if (vb2_request_buffer_cnt(req) != 1) > + return -ENOENT; I would return ENOENT if there are no buffers, and EINVAL if there are too many. Returning ENOENT in the latter case would be very confusing. I also highly recommend that you add v4l2_info lines for these errors. > + > + list_for_each_entry(obj, &req->objects, list) { > + struct vb2_buffer *vb; > + > + if (vb2_request_object_is_buffer(obj)) { > + vb = container_of(obj, struct vb2_buffer, req_obj); > + ctx = vb2_get_drv_priv(vb->vb2_queue); > + > + break; > + } > + } > + > + if (!ctx) > + return -ENOENT; > + > + parent_hdl = &ctx->hdl; > + > + hdl = v4l2_ctrl_request_hdl_find(req, parent_hdl); > + if (!hdl) { > + v4l2_err(&ctx->dev->v4l2_dev, "Missing codec control(s)\n"); Should be v4l2_info: it is not a driver error, it is just an info message. > + return -ENOENT; > + } > + > + for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > + if (cedrus_controls[i].codec != ctx->current_codec || > + !cedrus_controls[i].required) > + continue; > + > + ctrl_test = v4l2_ctrl_request_hdl_ctrl_find(hdl, > + cedrus_controls[i].id); > + if (!ctrl_test) { > + v4l2_err(&ctx->dev->v4l2_dev, > + "Missing required codec control\n"); Ditto. > + return -ENOENT; > + } > + } > + > + v4l2_ctrl_request_hdl_put(hdl); > + > + return vb2_request_validate(req); > +} Not worth making a v10, but you can do this in a follow-up patch. Once I have the two follow-up patches I'll make a pull request. Regards, Hans
Hi Hans, On Fri, Sep 07, 2018 at 03:13:19PM +0200, Hans Verkuil wrote: > On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > This introduces the Cedrus VPU driver that supports the VPU found in > > Allwinner SoCs, also known as Video Engine. It is implemented through > > a V4L2 M2M decoder device and a media device (used for media requests). > > So far, it only supports MPEG-2 decoding. > > > > Since this VPU is stateless, synchronization with media requests is > > required in order to ensure consistency between frame headers that > > contain metadata about the frame to process and the raw slice data that > > is used to generate the frame. > > > > This driver was made possible thanks to the long-standing effort > > carried out by the linux-sunxi community in the interest of reverse > > engineering, documenting and implementing support for the Allwinner VPU. > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > One high-level comment: > > Can you add a TODO file for this staging driver? This can be done in > a follow-up patch. > > It should contain what needs to be done to get this out of staging: > > - Request API needs to stabilize > - Userspace support for stateless codecs must be created On that particular note, as part of the effort to develop the driver, we've also developped two userspace components: - v4l2-request-test, that has a bunch of sample frames for various codecs and will rely solely on the kernel request api (and DRM for the display part) to test and bringup a particular driver https://github.com/bootlin/v4l2-request-test - libva-v4l2-request, that is a libva implementation using the request API https://github.com/bootlin/libva-v4l2-request Did you have something else in mind? Maxime
On 09/07/2018 03:26 PM, Maxime Ripard wrote: > Hi Hans, > > On Fri, Sep 07, 2018 at 03:13:19PM +0200, Hans Verkuil wrote: >> On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: >>> From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> >>> This introduces the Cedrus VPU driver that supports the VPU found in >>> Allwinner SoCs, also known as Video Engine. It is implemented through >>> a V4L2 M2M decoder device and a media device (used for media requests). >>> So far, it only supports MPEG-2 decoding. >>> >>> Since this VPU is stateless, synchronization with media requests is >>> required in order to ensure consistency between frame headers that >>> contain metadata about the frame to process and the raw slice data that >>> is used to generate the frame. >>> >>> This driver was made possible thanks to the long-standing effort >>> carried out by the linux-sunxi community in the interest of reverse >>> engineering, documenting and implementing support for the Allwinner VPU. >>> >>> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> >> >> One high-level comment: >> >> Can you add a TODO file for this staging driver? This can be done in >> a follow-up patch. >> >> It should contain what needs to be done to get this out of staging: >> >> - Request API needs to stabilize >> - Userspace support for stateless codecs must be created > > On that particular note, as part of the effort to develop the driver, > we've also developped two userspace components: > > - v4l2-request-test, that has a bunch of sample frames for various > codecs and will rely solely on the kernel request api (and DRM for > the display part) to test and bringup a particular driver > https://github.com/bootlin/v4l2-request-test > > - libva-v4l2-request, that is a libva implementation using the > request API > https://github.com/bootlin/libva-v4l2-request > > Did you have something else in mind? Reviewing this will be the next step. I haven't looked at the userspace components at all yet, so I don't know yet whether it is what we expect/want/need. I think this might be a very good topic for the media summit in October if we can get all the stakeholders together. Regards, Hans
On Fri, Sep 07, 2018 at 03:52:00PM +0200, Hans Verkuil wrote: > On 09/07/2018 03:26 PM, Maxime Ripard wrote: > > Hi Hans, > > > > On Fri, Sep 07, 2018 at 03:13:19PM +0200, Hans Verkuil wrote: > >> On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > >>> From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > >>> > >>> This introduces the Cedrus VPU driver that supports the VPU found in > >>> Allwinner SoCs, also known as Video Engine. It is implemented through > >>> a V4L2 M2M decoder device and a media device (used for media requests). > >>> So far, it only supports MPEG-2 decoding. > >>> > >>> Since this VPU is stateless, synchronization with media requests is > >>> required in order to ensure consistency between frame headers that > >>> contain metadata about the frame to process and the raw slice data that > >>> is used to generate the frame. > >>> > >>> This driver was made possible thanks to the long-standing effort > >>> carried out by the linux-sunxi community in the interest of reverse > >>> engineering, documenting and implementing support for the Allwinner VPU. > >>> > >>> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > >>> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > >> > >> One high-level comment: > >> > >> Can you add a TODO file for this staging driver? This can be done in > >> a follow-up patch. > >> > >> It should contain what needs to be done to get this out of staging: > >> > >> - Request API needs to stabilize > >> - Userspace support for stateless codecs must be created > > > > On that particular note, as part of the effort to develop the driver, > > we've also developped two userspace components: > > > > - v4l2-request-test, that has a bunch of sample frames for various > > codecs and will rely solely on the kernel request api (and DRM for > > the display part) to test and bringup a particular driver > > https://github.com/bootlin/v4l2-request-test > > > > - libva-v4l2-request, that is a libva implementation using the > > request API > > https://github.com/bootlin/libva-v4l2-request > > > > Did you have something else in mind? > > Reviewing this will be the next step. I haven't looked at the userspace components > at all yet, so I don't know yet whether it is what we expect/want/need. We meant this as a debug tool and a stop-gap measure, respectively, so it might not be what you're expecting, and I'm kind of expecting to have the libva fade away with media frameworks getting native support. > I think this might be a very good topic for the media summit in October if we > can get all the stakeholders together. I'll be there, so we can definitely discuss this. Maxime
Hi, Le vendredi 07 septembre 2018 à 16:25 +0200, Maxime Ripard a écrit : > On Fri, Sep 07, 2018 at 03:52:00PM +0200, Hans Verkuil wrote: > > On 09/07/2018 03:26 PM, Maxime Ripard wrote: > > > Hi Hans, > > > > > > On Fri, Sep 07, 2018 at 03:13:19PM +0200, Hans Verkuil wrote: > > > > On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > > > > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > > > > > > > This introduces the Cedrus VPU driver that supports the VPU found in > > > > > Allwinner SoCs, also known as Video Engine. It is implemented through > > > > > a V4L2 M2M decoder device and a media device (used for media requests). > > > > > So far, it only supports MPEG-2 decoding. > > > > > > > > > > Since this VPU is stateless, synchronization with media requests is > > > > > required in order to ensure consistency between frame headers that > > > > > contain metadata about the frame to process and the raw slice data that > > > > > is used to generate the frame. > > > > > > > > > > This driver was made possible thanks to the long-standing effort > > > > > carried out by the linux-sunxi community in the interest of reverse > > > > > engineering, documenting and implementing support for the Allwinner VPU. > > > > > > > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > > > > > One high-level comment: > > > > > > > > Can you add a TODO file for this staging driver? This can be done in > > > > a follow-up patch. > > > > > > > > It should contain what needs to be done to get this out of staging: > > > > > > > > - Request API needs to stabilize > > > > - Userspace support for stateless codecs must be created > > > > > > On that particular note, as part of the effort to develop the driver, > > > we've also developped two userspace components: > > > > > > - v4l2-request-test, that has a bunch of sample frames for various > > > codecs and will rely solely on the kernel request api (and DRM for > > > the display part) to test and bringup a particular driver > > > https://github.com/bootlin/v4l2-request-test > > > > > > - libva-v4l2-request, that is a libva implementation using the > > > request API > > > https://github.com/bootlin/libva-v4l2-request > > > > > > Did you have something else in mind? > > > > Reviewing this will be the next step. I haven't looked at the userspace components > > at all yet, so I don't know yet whether it is what we expect/want/need. > > We meant this as a debug tool and a stop-gap measure, respectively, so > it might not be what you're expecting, and I'm kind of expecting to > have the libva fade away with media frameworks getting native support. > > > I think this might be a very good topic for the media summit in October if we > > can get all the stakeholders together. > > I'll be there, so we can definitely discuss this. Note that I won't be able to attend the summit in the end. I think some work still needs to be done in libva-v4l2-request to make it really generic and compatible with other drivers (for instance, only NV12 is in there at this point, and it's hardcoded in quite some places). There are other things I'm not too happy about (e.g. I figured very recently that the approach to "deduce" logical planes sizes and offsets is problematic). Hopefully, I'll find time to rework that soon. Cheers, Paul
Hi, Le vendredi 07 septembre 2018 à 15:13 +0200, Hans Verkuil a écrit : > On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > This introduces the Cedrus VPU driver that supports the VPU found in > > Allwinner SoCs, also known as Video Engine. It is implemented through > > a V4L2 M2M decoder device and a media device (used for media requests). > > So far, it only supports MPEG-2 decoding. > > > > Since this VPU is stateless, synchronization with media requests is > > required in order to ensure consistency between frame headers that > > contain metadata about the frame to process and the raw slice data that > > is used to generate the frame. > > > > This driver was made possible thanks to the long-standing effort > > carried out by the linux-sunxi community in the interest of reverse > > engineering, documenting and implementing support for the Allwinner VPU. > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > One high-level comment: > > Can you add a TODO file for this staging driver? This can be done in > a follow-up patch. Definitely, I'll do that soon! > It should contain what needs to be done to get this out of staging: > > - Request API needs to stabilize > - Userspace support for stateless codecs must be created > - Ideally one other stateless decoder driver and at least one > stateless encoder driver should be implemented to ensure that nothing > was forgotten in the Request API. > - Anything else? I still fell rather unsure about the codec metadata controls, so it would be good to wait for more feedback on that specific point too. They definitely fit our driver's needs and I also checked them against the spec to spot missing elements, but I'm still worried I might have missed something relevant there. Are there use cases currently not covered by their current verison? > And a few last code comments: > > > --- > > MAINTAINERS | 7 + > > drivers/staging/media/Kconfig | 2 + > > drivers/staging/media/Makefile | 1 + > > drivers/staging/media/sunxi/Kconfig | 15 + > > drivers/staging/media/sunxi/Makefile | 1 + > > drivers/staging/media/sunxi/cedrus/Kconfig | 14 + > > drivers/staging/media/sunxi/cedrus/Makefile | 3 + > > drivers/staging/media/sunxi/cedrus/cedrus.c | 422 ++++++++++++++ > > drivers/staging/media/sunxi/cedrus/cedrus.h | 165 ++++++ > > .../staging/media/sunxi/cedrus/cedrus_dec.c | 70 +++ > > .../staging/media/sunxi/cedrus/cedrus_dec.h | 27 + > > .../staging/media/sunxi/cedrus/cedrus_hw.c | 322 +++++++++++ > > .../staging/media/sunxi/cedrus/cedrus_hw.h | 30 + > > .../staging/media/sunxi/cedrus/cedrus_mpeg2.c | 237 ++++++++ > > .../staging/media/sunxi/cedrus/cedrus_regs.h | 233 ++++++++ > > .../staging/media/sunxi/cedrus/cedrus_video.c | 544 ++++++++++++++++++ > > .../staging/media/sunxi/cedrus/cedrus_video.h | 30 + > > 17 files changed, 2123 insertions(+) > > create mode 100644 drivers/staging/media/sunxi/Kconfig > > create mode 100644 drivers/staging/media/sunxi/Makefile > > create mode 100644 drivers/staging/media/sunxi/cedrus/Kconfig > > create mode 100644 drivers/staging/media/sunxi/cedrus/Makefile > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.c > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.h > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.c > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.h > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.c > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.h > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_regs.h > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.c > > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.h > > > > <snip> > > > +static int cedrus_request_validate(struct media_request *req) > > +{ > > + struct media_request_object *obj; > > + struct v4l2_ctrl_handler *parent_hdl, *hdl; > > + struct cedrus_ctx *ctx = NULL; > > + struct v4l2_ctrl *ctrl_test; > > + unsigned int i; > > + > > + if (vb2_request_buffer_cnt(req) != 1) > > + return -ENOENT; > > I would return ENOENT if there are no buffers, and EINVAL if there are too > many. Returning ENOENT in the latter case would be very confusing. > > I also highly recommend that you add v4l2_info lines for these errors. Yes that seems much clearer. I'll send that as a follow-up patch. > > + > > + list_for_each_entry(obj, &req->objects, list) { > > + struct vb2_buffer *vb; > > + > > + if (vb2_request_object_is_buffer(obj)) { > > + vb = container_of(obj, struct vb2_buffer, req_obj); > > + ctx = vb2_get_drv_priv(vb->vb2_queue); > > + > > + break; > > + } > > + } > > + > > + if (!ctx) > > + return -ENOENT; > > + > > + parent_hdl = &ctx->hdl; > > + > > + hdl = v4l2_ctrl_request_hdl_find(req, parent_hdl); > > + if (!hdl) { > > + v4l2_err(&ctx->dev->v4l2_dev, "Missing codec control(s)\n"); > > Should be v4l2_info: it is not a driver error, it is just an info message. Oh, my mistake. > > + return -ENOENT; > > + } > > + > > + for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > > + if (cedrus_controls[i].codec != ctx->current_codec || > > + !cedrus_controls[i].required) > > + continue; > > + > > + ctrl_test = v4l2_ctrl_request_hdl_ctrl_find(hdl, > > + cedrus_controls[i].id); > > + if (!ctrl_test) { > > + v4l2_err(&ctx->dev->v4l2_dev, > > + "Missing required codec control\n"); > > Ditto. > > > + return -ENOENT; > > + } > > + } > > + > > + v4l2_ctrl_request_hdl_put(hdl); > > + > > + return vb2_request_validate(req); > > +} > > Not worth making a v10, but you can do this in a follow-up patch. > > Once I have the two follow-up patches I'll make a pull request. Excellent! I'm really glad we're approaching the end of it. Cheers, Paul
On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Stateless video decoding engines require both the MPEG-2 slices and > associated metadata from the video stream in order to decode frames. > > This introduces definitions for a new pixel format, describing buffers > with MPEG-2 slice data, as well as control structure sfor passing the > frame metadata to drivers. > > This is based on work from both Florent Revest and Hugues Fruchet. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > --- > .../media/uapi/v4l/extended-controls.rst | 176 ++++++++++++++++++ > .../media/uapi/v4l/pixfmt-compressed.rst | 16 ++ > .../media/uapi/v4l/vidioc-queryctrl.rst | 14 +- > .../media/videodev2.h.rst.exceptions | 2 + > drivers/media/v4l2-core/v4l2-ctrls.c | 63 +++++++ > drivers/media/v4l2-core/v4l2-ioctl.c | 1 + > include/media/v4l2-ctrls.h | 18 +- > include/uapi/linux/v4l2-controls.h | 65 +++++++ > include/uapi/linux/videodev2.h | 5 + > 9 files changed, 351 insertions(+), 9 deletions(-) > > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst > index 9f7312bf3365..f1951236266a 100644 > --- a/Documentation/media/uapi/v4l/extended-controls.rst > +++ b/Documentation/media/uapi/v4l/extended-controls.rst > @@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - > > > > +.. _v4l2-mpeg-mpeg2: > + > +``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` > + Specifies the slice parameters (as extracted from the bitstream) for the > + associated MPEG-2 slice data. This includes the necessary parameters for > + configuring a stateless hardware decoding pipeline for MPEG-2. > + The bitstream parameters are defined according to :ref:`mpeg2part2`. > + > +.. c:type:: v4l2_ctrl_mpeg2_slice_params > + > +.. cssclass:: longtable > + > +.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params > + :header-rows: 0 > + :stub-columns: 0 > + :widths: 1 1 2 > + > + * - __u32 > + - ``bit_size`` > + - Size (in bits) of the current slice data. > + * - __u32 > + - ``data_bit_offset`` > + - Offset (in bits) to the video data in the current slice data. > + * - struct :c:type:`v4l2_mpeg2_sequence` > + - ``sequence`` > + - Structure with MPEG-2 sequence metadata, merging relevant fields from > + the sequence header and sequence extension parts of the bitstream. > + * - struct :c:type:`v4l2_mpeg2_picture` > + - ``picture`` > + - Structure with MPEG-2 picture metadata, merging relevant fields from > + the picture header and picture coding extension parts of the bitstream. > + * - __u8 > + - ``quantiser_scale_code`` > + - Code used to determine the quantization scale to use for the IDCT. > + * - __u8 > + - ``backward_ref_index`` > + - Index for the V4L2 buffer to use as backward reference, used with > + B-coded and P-coded frames. > + * - __u8 > + - ``forward_ref_index`` > + - Index for the V4L2 buffer to use as forward reference, used with > + P-coded frames. Should this be "B-coded frames"? Regards, Hans
On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Stateless video decoding engines require both the MPEG-2 slices and > associated metadata from the video stream in order to decode frames. > > This introduces definitions for a new pixel format, describing buffers > with MPEG-2 slice data, as well as control structure sfor passing the > frame metadata to drivers. > > This is based on work from both Florent Revest and Hugues Fruchet. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > --- > .../media/uapi/v4l/extended-controls.rst | 176 ++++++++++++++++++ > .../media/uapi/v4l/pixfmt-compressed.rst | 16 ++ > .../media/uapi/v4l/vidioc-queryctrl.rst | 14 +- > .../media/videodev2.h.rst.exceptions | 2 + > drivers/media/v4l2-core/v4l2-ctrls.c | 63 +++++++ > drivers/media/v4l2-core/v4l2-ioctl.c | 1 + > include/media/v4l2-ctrls.h | 18 +- > include/uapi/linux/v4l2-controls.h | 65 +++++++ > include/uapi/linux/videodev2.h | 5 + > 9 files changed, 351 insertions(+), 9 deletions(-) > > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst > index 9f7312bf3365..f1951236266a 100644 > --- a/Documentation/media/uapi/v4l/extended-controls.rst > +++ b/Documentation/media/uapi/v4l/extended-controls.rst > @@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - > > > > +.. _v4l2-mpeg-mpeg2: > + > +``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` > + Specifies the slice parameters (as extracted from the bitstream) for the > + associated MPEG-2 slice data. This includes the necessary parameters for > + configuring a stateless hardware decoding pipeline for MPEG-2. > + The bitstream parameters are defined according to :ref:`mpeg2part2`. > + > +.. c:type:: v4l2_ctrl_mpeg2_slice_params > + > +.. cssclass:: longtable > + > +.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params > + :header-rows: 0 > + :stub-columns: 0 > + :widths: 1 1 2 > + > + * - __u32 > + - ``bit_size`` > + - Size (in bits) of the current slice data. > + * - __u32 > + - ``data_bit_offset`` > + - Offset (in bits) to the video data in the current slice data. > + * - struct :c:type:`v4l2_mpeg2_sequence` > + - ``sequence`` > + - Structure with MPEG-2 sequence metadata, merging relevant fields from > + the sequence header and sequence extension parts of the bitstream. > + * - struct :c:type:`v4l2_mpeg2_picture` > + - ``picture`` > + - Structure with MPEG-2 picture metadata, merging relevant fields from > + the picture header and picture coding extension parts of the bitstream. > + * - __u8 > + - ``quantiser_scale_code`` > + - Code used to determine the quantization scale to use for the IDCT. > + * - __u8 > + - ``backward_ref_index`` > + - Index for the V4L2 buffer to use as backward reference, used with > + B-coded and P-coded frames. > + * - __u8 > + - ``forward_ref_index`` > + - Index for the V4L2 buffer to use as forward reference, used with > + P-coded frames. Do these indices refer to the output or capture buffers? I think these should refer to the output buffers, since this control is used in a request for the output side. Regards, Hans
Hi, Le lundi 10 septembre 2018 à 11:41 +0200, Hans Verkuil a écrit : > On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > Stateless video decoding engines require both the MPEG-2 slices and > > associated metadata from the video stream in order to decode frames. > > > > This introduces definitions for a new pixel format, describing buffers > > with MPEG-2 slice data, as well as control structure sfor passing the > > frame metadata to drivers. > > > > This is based on work from both Florent Revest and Hugues Fruchet. > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > --- > > .../media/uapi/v4l/extended-controls.rst | 176 ++++++++++++++++++ > > .../media/uapi/v4l/pixfmt-compressed.rst | 16 ++ > > .../media/uapi/v4l/vidioc-queryctrl.rst | 14 +- > > .../media/videodev2.h.rst.exceptions | 2 + > > drivers/media/v4l2-core/v4l2-ctrls.c | 63 +++++++ > > drivers/media/v4l2-core/v4l2-ioctl.c | 1 + > > include/media/v4l2-ctrls.h | 18 +- > > include/uapi/linux/v4l2-controls.h | 65 +++++++ > > include/uapi/linux/videodev2.h | 5 + > > 9 files changed, 351 insertions(+), 9 deletions(-) > > > > diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst > > index 9f7312bf3365..f1951236266a 100644 > > --- a/Documentation/media/uapi/v4l/extended-controls.rst > > +++ b/Documentation/media/uapi/v4l/extended-controls.rst > > @@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - > > > > > > > > +.. _v4l2-mpeg-mpeg2: > > + > > +``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` > > + Specifies the slice parameters (as extracted from the bitstream) for the > > + associated MPEG-2 slice data. This includes the necessary parameters for > > + configuring a stateless hardware decoding pipeline for MPEG-2. > > + The bitstream parameters are defined according to :ref:`mpeg2part2`. > > + > > +.. c:type:: v4l2_ctrl_mpeg2_slice_params > > + > > +.. cssclass:: longtable > > + > > +.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params > > + :header-rows: 0 > > + :stub-columns: 0 > > + :widths: 1 1 2 > > + > > + * - __u32 > > + - ``bit_size`` > > + - Size (in bits) of the current slice data. > > + * - __u32 > > + - ``data_bit_offset`` > > + - Offset (in bits) to the video data in the current slice data. > > + * - struct :c:type:`v4l2_mpeg2_sequence` > > + - ``sequence`` > > + - Structure with MPEG-2 sequence metadata, merging relevant fields from > > + the sequence header and sequence extension parts of the bitstream. > > + * - struct :c:type:`v4l2_mpeg2_picture` > > + - ``picture`` > > + - Structure with MPEG-2 picture metadata, merging relevant fields from > > + the picture header and picture coding extension parts of the bitstream. > > + * - __u8 > > + - ``quantiser_scale_code`` > > + - Code used to determine the quantization scale to use for the IDCT. > > + * - __u8 > > + - ``backward_ref_index`` > > + - Index for the V4L2 buffer to use as backward reference, used with > > + B-coded and P-coded frames. > > + * - __u8 > > + - ``forward_ref_index`` > > + - Index for the V4L2 buffer to use as forward reference, used with > > + P-coded frames. > > Should this be "B-coded frames"? Oops, that's right, B-coded frames. Should I make a follow-up patch for that (maybe gathered with other changes if required)? Cheers, Paul
On 09/10/2018 11:47 AM, Paul Kocialkowski wrote: > Hi, > > Le lundi 10 septembre 2018 à 11:41 +0200, Hans Verkuil a écrit : >> On 09/07/2018 12:24 AM, Paul Kocialkowski wrote: >>> From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> >>> Stateless video decoding engines require both the MPEG-2 slices and >>> associated metadata from the video stream in order to decode frames. >>> >>> This introduces definitions for a new pixel format, describing buffers >>> with MPEG-2 slice data, as well as control structure sfor passing the >>> frame metadata to drivers. >>> >>> This is based on work from both Florent Revest and Hugues Fruchet. >>> >>> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> --- >>> .../media/uapi/v4l/extended-controls.rst | 176 ++++++++++++++++++ >>> .../media/uapi/v4l/pixfmt-compressed.rst | 16 ++ >>> .../media/uapi/v4l/vidioc-queryctrl.rst | 14 +- >>> .../media/videodev2.h.rst.exceptions | 2 + >>> drivers/media/v4l2-core/v4l2-ctrls.c | 63 +++++++ >>> drivers/media/v4l2-core/v4l2-ioctl.c | 1 + >>> include/media/v4l2-ctrls.h | 18 +- >>> include/uapi/linux/v4l2-controls.h | 65 +++++++ >>> include/uapi/linux/videodev2.h | 5 + >>> 9 files changed, 351 insertions(+), 9 deletions(-) >>> >>> diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst >>> index 9f7312bf3365..f1951236266a 100644 >>> --- a/Documentation/media/uapi/v4l/extended-controls.rst >>> +++ b/Documentation/media/uapi/v4l/extended-controls.rst >>> @@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - >>> >>> >>> >>> +.. _v4l2-mpeg-mpeg2: >>> + >>> +``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` >>> + Specifies the slice parameters (as extracted from the bitstream) for the >>> + associated MPEG-2 slice data. This includes the necessary parameters for >>> + configuring a stateless hardware decoding pipeline for MPEG-2. >>> + The bitstream parameters are defined according to :ref:`mpeg2part2`. >>> + >>> +.. c:type:: v4l2_ctrl_mpeg2_slice_params >>> + >>> +.. cssclass:: longtable >>> + >>> +.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params >>> + :header-rows: 0 >>> + :stub-columns: 0 >>> + :widths: 1 1 2 >>> + >>> + * - __u32 >>> + - ``bit_size`` >>> + - Size (in bits) of the current slice data. >>> + * - __u32 >>> + - ``data_bit_offset`` >>> + - Offset (in bits) to the video data in the current slice data. >>> + * - struct :c:type:`v4l2_mpeg2_sequence` >>> + - ``sequence`` >>> + - Structure with MPEG-2 sequence metadata, merging relevant fields from >>> + the sequence header and sequence extension parts of the bitstream. >>> + * - struct :c:type:`v4l2_mpeg2_picture` >>> + - ``picture`` >>> + - Structure with MPEG-2 picture metadata, merging relevant fields from >>> + the picture header and picture coding extension parts of the bitstream. >>> + * - __u8 >>> + - ``quantiser_scale_code`` >>> + - Code used to determine the quantization scale to use for the IDCT. >>> + * - __u8 >>> + - ``backward_ref_index`` >>> + - Index for the V4L2 buffer to use as backward reference, used with >>> + B-coded and P-coded frames. >>> + * - __u8 >>> + - ``forward_ref_index`` >>> + - Index for the V4L2 buffer to use as forward reference, used with >>> + P-coded frames. >> >> Should this be "B-coded frames"? > > Oops, that's right, B-coded frames. > > Should I make a follow-up patch for that (maybe gathered with other > changes if required)? Follow-up patches, please. All on top of my last pull request that adds the cedrus driver. Regards, Hans
On Fri, Sep 07, 2018 at 12:24:33AM +0200, Paul Kocialkowski wrote: > This is the ninth iteration of the updated Cedrus driver, > that supports the Video Engine found on most Allwinner SoCs, starting > with the A10. It was tested on the A13, A20, A33 and H3. > > The initial version of this driver[0] was originally written and > submitted by Florent Revest using a previous version of the request API > that is necessary to provide coherency between controls and the buffers > they apply to. > > The driver was adapted to use the latest version of the media request > API[1], as submitted by Hans Verkuil. Media request API support is a > hard requirement for the Cedrus driver. > > The driver itself currently only supports MPEG2 and more codecs will be > added eventually. The default output frame format provided by the Video > Engine is a multi-planar tiled YUV format (based on NV12). A specific > format is introduced in the V4L2 API to describe it. Starting with the > A33, the Video Engine can also output untiled YUV formats. Applied the DTS patches, thanks! Maxime
Em Fri, 7 Sep 2018 00:24:38 +0200 Paul Kocialkowski <contact@paulk.fr> escreveu: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > This introduces the Cedrus VPU driver that supports the VPU found in > Allwinner SoCs, also known as Video Engine. It is implemented through > a V4L2 M2M decoder device and a media device (used for media requests). > So far, it only supports MPEG-2 decoding. > > Since this VPU is stateless, synchronization with media requests is > required in order to ensure consistency between frame headers that > contain metadata about the frame to process and the raw slice data that > is used to generate the frame. > > This driver was made possible thanks to the long-standing effort > carried out by the linux-sunxi community in the interest of reverse > engineering, documenting and implementing support for the Allwinner VPU. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- > MAINTAINERS | 7 + > drivers/staging/media/Kconfig | 2 + > drivers/staging/media/Makefile | 1 + > drivers/staging/media/sunxi/Kconfig | 15 + > drivers/staging/media/sunxi/Makefile | 1 + > drivers/staging/media/sunxi/cedrus/Kconfig | 14 + > drivers/staging/media/sunxi/cedrus/Makefile | 3 + > drivers/staging/media/sunxi/cedrus/cedrus.c | 422 ++++++++++++++ > drivers/staging/media/sunxi/cedrus/cedrus.h | 165 ++++++ > .../staging/media/sunxi/cedrus/cedrus_dec.c | 70 +++ > .../staging/media/sunxi/cedrus/cedrus_dec.h | 27 + > .../staging/media/sunxi/cedrus/cedrus_hw.c | 322 +++++++++++ > .../staging/media/sunxi/cedrus/cedrus_hw.h | 30 + > .../staging/media/sunxi/cedrus/cedrus_mpeg2.c | 237 ++++++++ > .../staging/media/sunxi/cedrus/cedrus_regs.h | 233 ++++++++ > .../staging/media/sunxi/cedrus/cedrus_video.c | 544 ++++++++++++++++++ > .../staging/media/sunxi/cedrus/cedrus_video.h | 30 + > 17 files changed, 2123 insertions(+) > create mode 100644 drivers/staging/media/sunxi/Kconfig > create mode 100644 drivers/staging/media/sunxi/Makefile > create mode 100644 drivers/staging/media/sunxi/cedrus/Kconfig > create mode 100644 drivers/staging/media/sunxi/cedrus/Makefile > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_regs.h > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.c > create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index a5b256b25905..6d69f3ad1aa9 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -663,6 +663,13 @@ L: linux-crypto@vger.kernel.org > S: Maintained > F: drivers/crypto/sunxi-ss/ > > +ALLWINNER VPU DRIVER > +M: Maxime Ripard <maxime.ripard@bootlin.com> > +M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > +L: linux-media@vger.kernel.org > +S: Maintained > +F: drivers/staging/media/sunxi/cedrus/ > + > ALPHA PORT > M: Richard Henderson <rth@twiddle.net> > M: Ivan Kokshaysky <ink@jurassic.park.msu.ru> > diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig > index db5cf67047ad..b3620a8f2d9f 100644 > --- a/drivers/staging/media/Kconfig > +++ b/drivers/staging/media/Kconfig > @@ -31,6 +31,8 @@ source "drivers/staging/media/mt9t031/Kconfig" > > source "drivers/staging/media/omap4iss/Kconfig" > > +source "drivers/staging/media/sunxi/Kconfig" > + > source "drivers/staging/media/tegra-vde/Kconfig" > > source "drivers/staging/media/zoran/Kconfig" > diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile > index 503fbe47fa58..42948f805548 100644 > --- a/drivers/staging/media/Makefile > +++ b/drivers/staging/media/Makefile > @@ -5,5 +5,6 @@ obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074/ > obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031/ > obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/ > obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ > +obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ > obj-$(CONFIG_TEGRA_VDE) += tegra-vde/ > obj-$(CONFIG_VIDEO_ZORAN) += zoran/ > diff --git a/drivers/staging/media/sunxi/Kconfig b/drivers/staging/media/sunxi/Kconfig > new file mode 100644 > index 000000000000..c78d92240ceb > --- /dev/null > +++ b/drivers/staging/media/sunxi/Kconfig > @@ -0,0 +1,15 @@ > +config VIDEO_SUNXI > + bool "Allwinner sunXi family Video Devices" > + depends on ARCH_SUNXI || COMPILE_TEST > + help > + If you have an Allwinner SoC based on the sunXi family, say Y. > + > + Note that this option doesn't include new drivers in the > + kernel: saying N will just cause Kconfig to skip all the > + questions about Allwinner media devices. > + > +if VIDEO_SUNXI > + > +source "drivers/staging/media/sunxi/cedrus/Kconfig" > + > +endif > diff --git a/drivers/staging/media/sunxi/Makefile b/drivers/staging/media/sunxi/Makefile > new file mode 100644 > index 000000000000..cee2846c3ecf > --- /dev/null > +++ b/drivers/staging/media/sunxi/Makefile > @@ -0,0 +1 @@ > +obj-$(CONFIG_VIDEO_SUNXI_CEDRUS) += cedrus/ > diff --git a/drivers/staging/media/sunxi/cedrus/Kconfig b/drivers/staging/media/sunxi/cedrus/Kconfig > new file mode 100644 > index 000000000000..afd7d7ee0388 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/Kconfig > @@ -0,0 +1,14 @@ > +config VIDEO_SUNXI_CEDRUS > + tristate "Allwinner Cedrus VPU driver" > + depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER > + depends on HAS_DMA > + depends on OF > + select VIDEOBUF2_DMA_CONTIG > + select MEDIA_REQUEST_API > + select V4L2_MEM2MEM_DEV > + help > + Support for the VPU found in Allwinner SoCs, also known as the Cedar > + video engine. > + > + To compile this driver as a module, choose M here: the module > + will be called sunxi-cedrus. > diff --git a/drivers/staging/media/sunxi/cedrus/Makefile b/drivers/staging/media/sunxi/cedrus/Makefile > new file mode 100644 > index 000000000000..e9dc68b7bcb6 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/Makefile > @@ -0,0 +1,3 @@ > +obj-$(CONFIG_VIDEO_SUNXI_CEDRUS) += sunxi-cedrus.o > + > +sunxi-cedrus-y = cedrus.o cedrus_video.o cedrus_hw.o cedrus_dec.o cedrus_mpeg2.o > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c > new file mode 100644 > index 000000000000..09ab1b732c31 > --- /dev/null > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c > @@ -0,0 +1,422 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Cedrus VPU driver > + * > + * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com> > + * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com> > + * Copyright (C) 2018 Bootlin > + * > + * Based on the vim2m driver, that is: > + * > + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. > + * Pawel Osciak, <pawel@osciak.com> > + * Marek Szyprowski, <m.szyprowski@samsung.com> > + */ > + > +#include <linux/platform_device.h> > +#include <linux/module.h> > +#include <linux/of.h> > + > +#include <media/v4l2-device.h> > +#include <media/v4l2-ioctl.h> > +#include <media/v4l2-ctrls.h> > +#include <media/v4l2-mem2mem.h> > + > +#include "cedrus.h" > +#include "cedrus_video.h" > +#include "cedrus_dec.h" > +#include "cedrus_hw.h" > + > +static const struct cedrus_control cedrus_controls[] = { > + { > + .id = V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS, > + .elem_size = sizeof(struct v4l2_ctrl_mpeg2_slice_params), > + .codec = CEDRUS_CODEC_MPEG2, > + .required = true, > + }, > + { > + .id = V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION, > + .elem_size = sizeof(struct v4l2_ctrl_mpeg2_quantization), > + .codec = CEDRUS_CODEC_MPEG2, > + .required = false, > + }, > +}; > + > +#define CEDRUS_CONTROLS_COUNT ARRAY_SIZE(cedrus_controls) > + > +void *cedrus_find_control_data(struct cedrus_ctx *ctx, u32 id) > +{ > + unsigned int i; > + > + for (i = 0; ctx->ctrls[i] != NULL; i++) > + if (ctx->ctrls[i]->id == id) > + return ctx->ctrls[i]->p_cur.p; > + > + return NULL; > +} > + > +static int cedrus_init_ctrls(struct cedrus_dev *dev, struct cedrus_ctx *ctx) > +{ > + struct v4l2_ctrl_handler *hdl = &ctx->hdl; > + struct v4l2_ctrl *ctrl; > + unsigned int ctrl_size; > + unsigned int i; > + > + v4l2_ctrl_handler_init(hdl, CEDRUS_CONTROLS_COUNT); > + if (hdl->error) { > + v4l2_err(&dev->v4l2_dev, > + "Failed to initialize control handler\n"); > + return hdl->error; > + } > + > + ctrl_size = sizeof(ctrl) * CEDRUS_CONTROLS_COUNT + 1; > + > + ctx->ctrls = kzalloc(ctrl_size, GFP_KERNEL); > + memset(ctx->ctrls, 0, ctrl_size); > + > + for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > + struct v4l2_ctrl_config cfg = { 0 }; > + > + cfg.elem_size = cedrus_controls[i].elem_size; > + cfg.id = cedrus_controls[i].id; > + > + ctrl = v4l2_ctrl_new_custom(hdl, &cfg, NULL); > + if (hdl->error) { > + v4l2_err(&dev->v4l2_dev, > + "Failed to create new custom control\n"); > + > + v4l2_ctrl_handler_free(hdl); > + kfree(ctx->ctrls); > + return hdl->error; > + } > + > + ctx->ctrls[i] = ctrl; > + } > + > + ctx->fh.ctrl_handler = hdl; > + v4l2_ctrl_handler_setup(hdl); > + > + return 0; > +} > + > +static int cedrus_request_validate(struct media_request *req) > +{ > + struct media_request_object *obj; > + struct v4l2_ctrl_handler *parent_hdl, *hdl; > + struct cedrus_ctx *ctx = NULL; > + struct v4l2_ctrl *ctrl_test; > + unsigned int i; > + > + if (vb2_request_buffer_cnt(req) != 1) > + return -ENOENT; > + > + list_for_each_entry(obj, &req->objects, list) { > + struct vb2_buffer *vb; > + > + if (vb2_request_object_is_buffer(obj)) { > + vb = container_of(obj, struct vb2_buffer, req_obj); > + ctx = vb2_get_drv_priv(vb->vb2_queue); > + > + break; > + } > + } > + > + if (!ctx) > + return -ENOENT; > + > + parent_hdl = &ctx->hdl; > + > + hdl = v4l2_ctrl_request_hdl_find(req, parent_hdl); > + if (!hdl) { > + v4l2_err(&ctx->dev->v4l2_dev, "Missing codec control(s)\n"); > + return -ENOENT; > + } > + > + for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > + if (cedrus_controls[i].codec != ctx->current_codec || > + !cedrus_controls[i].required) > + continue; > + > + ctrl_test = v4l2_ctrl_request_hdl_ctrl_find(hdl, > + cedrus_controls[i].id); > + if (!ctrl_test) { > + v4l2_err(&ctx->dev->v4l2_dev, > + "Missing required codec control\n"); > + return -ENOENT; > + } > + } > + > + v4l2_ctrl_request_hdl_put(hdl); > + > + return vb2_request_validate(req); > +} > + > +static int cedrus_open(struct file *file) > +{ > + struct cedrus_dev *dev = video_drvdata(file); > + struct cedrus_ctx *ctx = NULL; > + int ret; > + > + if (mutex_lock_interruptible(&dev->dev_mutex)) > + return -ERESTARTSYS; > + > + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); > + if (!ctx) { > + mutex_unlock(&dev->dev_mutex); > + return -ENOMEM; > + } > + > + v4l2_fh_init(&ctx->fh, video_devdata(file)); > + file->private_data = &ctx->fh; > + ctx->dev = dev; > + > + ret = cedrus_init_ctrls(dev, ctx); > + if (ret) > + goto err_free; > + > + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, > + &cedrus_queue_init); > + if (IS_ERR(ctx->fh.m2m_ctx)) { > + ret = PTR_ERR(ctx->fh.m2m_ctx); > + goto err_ctrls; > + } > + > + v4l2_fh_add(&ctx->fh); > + > + mutex_unlock(&dev->dev_mutex); > + > + return 0; > + > +err_ctrls: > + v4l2_ctrl_handler_free(&ctx->hdl); > +err_free: > + kfree(ctx); > + mutex_unlock(&dev->dev_mutex); > + > + return ret; > +} > + > +static int cedrus_release(struct file *file) > +{ > + struct cedrus_dev *dev = video_drvdata(file); > + struct cedrus_ctx *ctx = container_of(file->private_data, > + struct cedrus_ctx, fh); > + > + mutex_lock(&dev->dev_mutex); > + > + v4l2_fh_del(&ctx->fh); > + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); > + > + v4l2_ctrl_handler_free(&ctx->hdl); > + kfree(ctx->ctrls); > + > + v4l2_fh_exit(&ctx->fh); > + > + kfree(ctx); > + > + mutex_unlock(&dev->dev_mutex); > + > + return 0; > +} > + > +static const struct v4l2_file_operations cedrus_fops = { > + .owner = THIS_MODULE, > + .open = cedrus_open, > + .release = cedrus_release, > + .poll = v4l2_m2m_fop_poll, > + .unlocked_ioctl = video_ioctl2, > + .mmap = v4l2_m2m_fop_mmap, > +}; > + > +static const struct video_device cedrus_video_device = { > + .name = CEDRUS_NAME, > + .vfl_dir = VFL_DIR_M2M, > + .fops = &cedrus_fops, > + .ioctl_ops = &cedrus_ioctl_ops, > + .minor = -1, > + .release = video_device_release_empty, > + .device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING, > +}; > + > +static const struct v4l2_m2m_ops cedrus_m2m_ops = { > + .device_run = cedrus_device_run, > +}; > + > +static const struct media_device_ops cedrus_m2m_media_ops = { > + .req_validate = cedrus_request_validate, > + .req_queue = vb2_m2m_request_queue, > +}; > + > +static int cedrus_probe(struct platform_device *pdev) > +{ > + struct cedrus_dev *dev; > + struct video_device *vfd; > + int ret; > + > + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); > + if (!dev) > + return -ENOMEM; > + > + dev->vfd = cedrus_video_device; > + dev->dev = &pdev->dev; > + dev->pdev = pdev; > + > + ret = cedrus_hw_probe(dev); > + if (ret) { > + dev_err(&pdev->dev, "Failed to probe hardware\n"); > + return ret; > + } > + > + dev->dec_ops[CEDRUS_CODEC_MPEG2] = &cedrus_dec_ops_mpeg2; > + > + mutex_init(&dev->dev_mutex); > + spin_lock_init(&dev->irq_lock); > + > + ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); > + if (ret) { > + dev_err(&pdev->dev, "Failed to register V4L2 device\n"); > + return ret; > + } > + > + vfd = &dev->vfd; > + vfd->lock = &dev->dev_mutex; > + vfd->v4l2_dev = &dev->v4l2_dev; > + > + snprintf(vfd->name, sizeof(vfd->name), "%s", cedrus_video_device.name); > + video_set_drvdata(vfd, dev); > + > + dev->m2m_dev = v4l2_m2m_init(&cedrus_m2m_ops); > + if (IS_ERR(dev->m2m_dev)) { > + v4l2_err(&dev->v4l2_dev, > + "Failed to initialize V4L2 M2M device\n"); > + ret = PTR_ERR(dev->m2m_dev); > + > + goto err_video; > + } > + > + dev->mdev.dev = &pdev->dev; > + strlcpy(dev->mdev.model, CEDRUS_NAME, sizeof(dev->mdev.model)); This is a minor issue: we're getting rid of strlcpy upstream. So, please send a followup patch replacing all occurrences of strcpy, strncpy and strlcpy with strscpy(). The syntax is the same as strlcpy(). Thanks, Mauro
Em Fri, 7 Sep 2018 00:24:38 +0200 Paul Kocialkowski <contact@paulk.fr> escreveu: > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > This introduces the Cedrus VPU driver that supports the VPU found in > Allwinner SoCs, also known as Video Engine. It is implemented through > a V4L2 M2M decoder device and a media device (used for media requests). > So far, it only supports MPEG-2 decoding. > > Since this VPU is stateless, synchronization with media requests is > required in order to ensure consistency between frame headers that > contain metadata about the frame to process and the raw slice data that > is used to generate the frame. > > This driver was made possible thanks to the long-standing effort > carried out by the linux-sunxi community in the interest of reverse > engineering, documenting and implementing support for the Allwinner VPU. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> There are several checkpatch issues here. Ok, some can be ignored, but there are at least some of them that sounda relevant. Please address them. CHECK: Comparison to NULL could be written "ctx->ctrls[i]" #214: FILE: drivers/staging/media/sunxi/cedrus/cedrus.c:51: + for (i = 0; ctx->ctrls[i] != NULL; i++) CHECK: Alignment should match open parenthesis #304: FILE: drivers/staging/media/sunxi/cedrus/cedrus.c:141: + ctrl_test = v4l2_ctrl_request_hdl_ctrl_find(hdl, + cedrus_controls[i].id); CHECK: Alignment should match open parenthesis #468: FILE: drivers/staging/media/sunxi/cedrus/cedrus.c:305: + ret = v4l2_m2m_register_media_controller(dev->m2m_dev, + vfd, MEDIA_ENT_F_PROC_VIDEO_DECODER); CHECK: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #638: FILE: drivers/staging/media/sunxi/cedrus/cedrus.h:47: + bool required; WARNING: line over 80 characters #744: FILE: drivers/staging/media/sunxi/cedrus/cedrus.h:153: +static inline struct cedrus_buffer *vb2_v4l2_to_cedrus_buffer(const struct vb2_v4l2_buffer *p) WARNING: line over 80 characters #749: FILE: drivers/staging/media/sunxi/cedrus/cedrus.h:158: +static inline struct cedrus_buffer *vb2_to_cedrus_buffer(const struct vb2_buffer *p) CHECK: Alignment should match open parenthesis #809: FILE: drivers/staging/media/sunxi/cedrus/cedrus_dec.c:47: + run.mpeg2.slice_params = cedrus_find_control_data(ctx, + V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS); CHECK: Alignment should match open parenthesis #811: FILE: drivers/staging/media/sunxi/cedrus/cedrus_dec.c:49: + run.mpeg2.quantization = cedrus_find_control_data(ctx, + V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION); WARNING: line over 80 characters #1368: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:133: + reg |= VE_DEC_MPEG_MP12HDR_INTRA_DC_PRECISION(picture->intra_dc_precision); WARNING: line over 80 characters #1369: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:134: + reg |= VE_DEC_MPEG_MP12HDR_INTRA_PICTURE_STRUCTURE(picture->picture_structure); WARNING: line over 80 characters #1371: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:136: + reg |= VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(picture->frame_pred_frame_dct); WARNING: line over 80 characters #1372: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:137: + reg |= VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(picture->concealment_motion_vectors); WARNING: line over 80 characters #1395: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:160: + fwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 0); WARNING: line over 80 characters #1396: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:161: + fwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->forward_ref_index, 1); WARNING: line over 80 characters #1401: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:166: + bwd_luma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 0); WARNING: line over 80 characters #1402: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:167: + bwd_chroma_addr = cedrus_dst_buf_addr(ctx, slice_params->backward_ref_index, 1); WARNING: line over 80 characters #1417: FILE: drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c:182: + cedrus_write(dev, VE_DEC_MPEG_VLD_OFFSET, slice_params->data_bit_offset); CHECK: Macro argument reuse 'x' - possible side-effects? #1552: FILE: drivers/staging/media/sunxi/cedrus/cedrus_regs.h:74: +#define VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y) \ + GENMASK(VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) + 3, \ + VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) CHECK: Macro argument reuse 'y' - possible side-effects? #1552: FILE: drivers/staging/media/sunxi/cedrus/cedrus_regs.h:74: +#define VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y) \ + GENMASK(VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) + 3, \ + VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) CHECK: Macro argument reuse 'x' - possible side-effects? #1555: FILE: drivers/staging/media/sunxi/cedrus/cedrus_regs.h:77: +#define VE_DEC_MPEG_MP12HDR_F_CODE(x, y, v) \ + (((v) << VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) & \ + VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y)) CHECK: Macro argument reuse 'y' - possible side-effects? #1555: FILE: drivers/staging/media/sunxi/cedrus/cedrus_regs.h:77: +#define VE_DEC_MPEG_MP12HDR_F_CODE(x, y, v) \ + (((v) << VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y)) & \ + VE_DEC_MPEG_MP12HDR_F_CODE_MASK(x, y)) CHECK: Macro argument reuse 'a' - possible side-effects? #1685: FILE: drivers/staging/media/sunxi/cedrus/cedrus_regs.h:207: +#define VE_DEC_MPEG_VLD_ADDR_BASE(a) \ + (((a) & GENMASK(27, 4)) | (((a) >> 28) & GENMASK(3, 0))) CHECK: Comparison to NULL could be written "fmt" #1805: FILE: drivers/staging/media/sunxi/cedrus/cedrus_video.c:88: + return fmt != NULL; CHECK: Please use a blank line after function/struct/union/enum declarations #2214: FILE: drivers/staging/media/sunxi/cedrus/cedrus_video.c:497: +} +static struct vb2_ops cedrus_qops = { total: 0 errors, 11 warnings, 13 checks, 2139 lines checked Thanks, Mauro
On Tue, Sep 11, 2018 at 12:46:25PM -0300, Mauro Carvalho Chehab wrote: > Em Fri, 7 Sep 2018 00:24:38 +0200 > Paul Kocialkowski <contact@paulk.fr> escreveu: > > > From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > > > This introduces the Cedrus VPU driver that supports the VPU found in > > Allwinner SoCs, also known as Video Engine. It is implemented through > > a V4L2 M2M decoder device and a media device (used for media requests). > > So far, it only supports MPEG-2 decoding. > > > > Since this VPU is stateless, synchronization with media requests is > > required in order to ensure consistency between frame headers that > > contain metadata about the frame to process and the raw slice data that > > is used to generate the frame. > > > > This driver was made possible thanks to the long-standing effort > > carried out by the linux-sunxi community in the interest of reverse > > engineering, documenting and implementing support for the Allwinner VPU. > > > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > There are several checkpatch issues here. Ok, some can be > ignored, but there are at least some of them that sounda relevant. Sorry for that. Given that it's intended to be in staging, do you want us to send subsequent patches or the whole serie? Maxime
On 09/12/2018 09:23 AM, Maxime Ripard wrote: > On Tue, Sep 11, 2018 at 12:46:25PM -0300, Mauro Carvalho Chehab wrote: >> Em Fri, 7 Sep 2018 00:24:38 +0200 >> Paul Kocialkowski <contact@paulk.fr> escreveu: >> >>> From: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> >>> This introduces the Cedrus VPU driver that supports the VPU found in >>> Allwinner SoCs, also known as Video Engine. It is implemented through >>> a V4L2 M2M decoder device and a media device (used for media requests). >>> So far, it only supports MPEG-2 decoding. >>> >>> Since this VPU is stateless, synchronization with media requests is >>> required in order to ensure consistency between frame headers that >>> contain metadata about the frame to process and the raw slice data that >>> is used to generate the frame. >>> >>> This driver was made possible thanks to the long-standing effort >>> carried out by the linux-sunxi community in the interest of reverse >>> engineering, documenting and implementing support for the Allwinner VPU. >>> >>> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> >>> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> >> >> There are several checkpatch issues here. Ok, some can be >> ignored, but there are at least some of them that sounda relevant. > > Sorry for that. Given that it's intended to be in staging, do you want > us to send subsequent patches or the whole serie? I would actually prefer a v10 with the current follow-up patches merged into the main driver. I'm getting kbuild errors for the Kconfig missing select and the PHYS_PFN_OFFSET. So let's just spin a v10. It would help if you post a follow-up patch for the checkpatch changes (that's easy to review), then post a v10 with just that and the other follow-on patches merged into the driver patch itself, and that's what I'll use for the pull request. Sorry, I should have seen those checkpatch.pl warnings myself, but I discovered that my git hooks didn't use the --strict option with checkpatch. I'd have sworn that I had added it in the past, but apparently not :-( Regards, Hans
This is the ninth iteration of the updated Cedrus driver, that supports the Video Engine found on most Allwinner SoCs, starting with the A10. It was tested on the A13, A20, A33 and H3. The initial version of this driver[0] was originally written and submitted by Florent Revest using a previous version of the request API that is necessary to provide coherency between controls and the buffers they apply to. The driver was adapted to use the latest version of the media request API[1], as submitted by Hans Verkuil. Media request API support is a hard requirement for the Cedrus driver. The driver itself currently only supports MPEG2 and more codecs will be added eventually. The default output frame format provided by the Video Engine is a multi-planar tiled YUV format (based on NV12). A specific format is introduced in the V4L2 API to describe it. Starting with the A33, the Video Engine can also output untiled YUV formats. This implementation is based on the significant work that was conducted by various members of the linux-sunxi community for understanding and documenting the Video Engine's innards. In addition to the media requests API, the following series are required for Cedrus: * vicodec: the Virtual Codec driver * allwinner: a64: add SRAM controller / system control * SRAM patches from the Cedrus VPU driver series version 5 Changes since v8: * Removed dummy job_abort as it is now optional; * Fixed video device registration order; * Fixed queue_setup for properly handling CREATE_BUFFERS; * Switched to single-planar API and applied associated reworks, since our formats are not multi-planar V4L2 pixel formats. * Added validation of the number of buffers associated with the request, by modifying the relevant helper as instructed; * Used strlcpy where needed; * Applied various minor fixups from suggestions; * Added some comments for clarity. Changes since v7: * Rebased on the latest Request API; * Brought back comment about DRAM width; * Fixed building as a module; * Fixed copyright headers. Changes since v6: * Reworked MPEG2 controls to stick closer to the bitstream; * Updated controls documentation accordingly and added requested fixes; * Renamed tiled format to V4L2_PIX_FMT_SUNXI_TILED_NV12; * Added various minor driver fixes based on Hans' feedback; * Fixed dst frame alignment based on Jernej's feedback and tests; * Removed set bits for the disabled secondary output. Changes since v5: * Added MPEG2 quantization matrices definitions and support; * Cleaned up registers definitions; * Moved the driver to staging as requested; * Removed label and newline in device-tree sources; * Made it possible to build the driver for COMPILE_TEST; * Fixed various strict checkpatch warnings; * Used v4l2_m2m_register_media_controller and MEDIA_ENT_F_PROC_VIDEO_DECODER; * Moved capabilities to compatible-specific variants; * Removed overkill buffer checks in device_run; * Renamed from Sunxi-Cedrus to Cedrus. Changes since v4: * updated to version 16 of the media requests API; * added support for VPU-based untiling (starting with the A33); * added support for the H3, with SRAM support; * reworked SRAM support and associated compatibles; * improved failure paths; * added some MPEG2 input data validation; * reworked video/format functions to handle multiple formats; * removed in-driver buffer queues; * used a threaded irq instead of a workqueue; * merged various improvements and cleanups from Maxime; * renamed MPEG2_SLICE_HEADER to MPEG2_SLICE_PARAMS; * added prefixes to MPEG2 picture coding types; * used single-buffer allocations to ensure contiguous planes Changes since v3: * updated to version 15 of the media request API; * got rid of untested MPEG1 support; * added definitons for picture coding types; * added documentation about MPEG2 slice header fields; * added documentation about MPEG2 slice format; * added documentation about the MB32 NV12 format; * added MPEG2 slice header validation; * removed the assigned-clocks property; * reworked and fixed error paths; * harmonized debug prints, with v4l2 helpers when applicable; * checked the series through checkpatch; * switched to SPDX license headers; * renamed MPEG2 frame header to slice header for consistency and clarity; * removed A20 SRAM compatible from the driver's list. Changes since v2: * updated to version 13 of the media request API; * integrated various changes from Maxime Ripard; * reworked memory reservation to use CMA, dynamic allocation and allow DMABUF; * removed reserved memory binding since the CMA pool is the default one (and allow ENODEV in the driver, for that use case); * added SRAM controller support for the SRAM region used by the VE; * updated the device-tree bindings the for SRAM region; * added per-platform bindings; * added A13 support; * renamed VE node name and label; * fixed Florent's authorship for the MPEG2 headers; * added a MAINTAINERS entry. Changes since v1: * use the latest version of the request API for Hans Verkuil; * added media controller support and dependency * renamed v4l2 format to the more explicit V4L2_PIX_FMT_MB32_NV12; * reworked bindings documentation; * moved driver to drivers/media/platforms/sunxi/cedrus to pair with incoming CSI support ; * added a workqueue and lists to schedule buffer completion, since it cannot be done in interrupt context; * split mpeg2 support into a setup and a trigger function to avoid race condition; * split video-related ops to a dedicated sunxi_cedrus_video file; * cleaned up the included headers for each file; * used device PFN offset instead of subtracting PHYS_BASE; * used reset_control_reset instead of assert+deassert; * put the device in reset when removing driver; * changed dt bindings to use the last 96 Mib of the first 256 MiB of DRAM; * made it clear in the mpeg frame header structure that forward and backward indexes are used as reference frames for motion vectors; * lots of small cosmetic and consistency changes, including naming harmonization and headers text rework. Cheers! [0]: https://patchwork.kernel.org/patch/9299073/ [1]: https://git.linuxtv.org/hverkuil/media_tree.git/log/?h=reqv18-1 Paul Kocialkowski (9): media: videobuf2-core: Rework and rename helper for request buffer count media: v4l: Add definitions for MPEG-2 slice format and metadata media: v4l: Add definition for the Sunxi tiled NV12 format dt-bindings: media: Document bindings for the Cedrus VPU driver media: platform: Add Cedrus VPU decoder driver ARM: dts: sun5i: Add Video Engine and reserved memory nodes ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes .../devicetree/bindings/media/cedrus.txt | 54 ++ .../media/uapi/v4l/extended-controls.rst | 176 ++++++ .../media/uapi/v4l/pixfmt-compressed.rst | 16 + .../media/uapi/v4l/pixfmt-reserved.rst | 15 +- .../media/uapi/v4l/vidioc-queryctrl.rst | 14 +- .../media/videodev2.h.rst.exceptions | 2 + MAINTAINERS | 7 + arch/arm/boot/dts/sun5i.dtsi | 26 + arch/arm/boot/dts/sun7i-a20.dtsi | 26 + arch/arm/boot/dts/sun8i-a33.dtsi | 26 + arch/arm/boot/dts/sun8i-h3.dtsi | 25 + .../media/common/videobuf2/videobuf2-core.c | 18 +- .../media/common/videobuf2/videobuf2-v4l2.c | 2 +- drivers/media/v4l2-core/v4l2-ctrls.c | 63 ++ drivers/media/v4l2-core/v4l2-ioctl.c | 2 + drivers/staging/media/Kconfig | 2 + drivers/staging/media/Makefile | 1 + drivers/staging/media/sunxi/Kconfig | 15 + drivers/staging/media/sunxi/Makefile | 1 + drivers/staging/media/sunxi/cedrus/Kconfig | 14 + drivers/staging/media/sunxi/cedrus/Makefile | 3 + drivers/staging/media/sunxi/cedrus/cedrus.c | 422 ++++++++++++++ drivers/staging/media/sunxi/cedrus/cedrus.h | 165 ++++++ .../staging/media/sunxi/cedrus/cedrus_dec.c | 70 +++ .../staging/media/sunxi/cedrus/cedrus_dec.h | 27 + .../staging/media/sunxi/cedrus/cedrus_hw.c | 322 +++++++++++ .../staging/media/sunxi/cedrus/cedrus_hw.h | 30 + .../staging/media/sunxi/cedrus/cedrus_mpeg2.c | 237 ++++++++ .../staging/media/sunxi/cedrus/cedrus_regs.h | 233 ++++++++ .../staging/media/sunxi/cedrus/cedrus_video.c | 544 ++++++++++++++++++ .../staging/media/sunxi/cedrus/cedrus_video.h | 30 + include/media/v4l2-ctrls.h | 18 +- include/media/videobuf2-core.h | 4 +- include/uapi/linux/v4l2-controls.h | 65 +++ include/uapi/linux/videodev2.h | 6 + 35 files changed, 2658 insertions(+), 23 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/cedrus.txt create mode 100644 drivers/staging/media/sunxi/Kconfig create mode 100644 drivers/staging/media/sunxi/Makefile create mode 100644 drivers/staging/media/sunxi/cedrus/Kconfig create mode 100644 drivers/staging/media/sunxi/cedrus/Makefile create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.c create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus.h create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.c create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_dec.h create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.c create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_hw.h create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_regs.h create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.c create mode 100644 drivers/staging/media/sunxi/cedrus/cedrus_video.h