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[0/5] arm64: allwinner: h6: Enable AXP805 PMIC on Pine H64

Message ID 20180620051540.25617-1-wens@csie.org
Headers show
Series arm64: allwinner: h6: Enable AXP805 PMIC on Pine H64 | expand

Message

Chen-Yu Tsai June 20, 2018, 5:15 a.m. UTC
Hi everyone,

This series enables the AXP805 PMIC found on the Pine64 Pine H64 board.
The AXP805 seems to be identical to the AXP806 when comparing datasheets.
The Pine H64 uses the PMIC in stand-alone or "self-working" mode, using
the I2C interface. Neither features are currently supported. This series
adds support for them, and then adds the PMIC to the device tree.

Patch 1 adds a new device tree property to describe the self-working mode
for the AXP806.

Patch 2 adds support for the newly added property to the driver.

Patch 3 adds support for the using AXP806 with I2C.

Patch 4 converts raw clock/reset indices for the H6 R_CCU currently found
in the device tree to macros defined as part of the device tree bindings.

Patch 5 adds the PMIC and its regulators to the Pine H64 device tree.

Please have a look.

Regards
ChenYu


Chen-Yu Tsai (4):
  dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
  mfd: axp20x: Add self-working mode support for AXP806
  mfd: axp20x: Support AXP806 in I2C mode
  arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset
    indices

Icenowy Zheng (1):
  arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64

 .../devicetree/bindings/mfd/axp20x.txt        |   7 +-
 .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 109 ++++++++++++++++++
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |   9 +-
 drivers/mfd/axp20x-i2c.c                      |   2 +
 drivers/mfd/axp20x.c                          |  30 ++++-
 5 files changed, 149 insertions(+), 8 deletions(-)

Comments

Icenowy Zheng June 20, 2018, 1:11 p.m. UTC | #1
在 2018-06-20三的 13:15 +0800,Chen-Yu Tsai写道:
> Now that the device tree binding headers for the R_CCU have been
> merged,
> we can use the macros, instead of raw numbers.
> 
> Switch to R_CCU macros for clock and reset indices.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index c72da8cd9ef5..d85070f8c4a2 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -5,7 +5,9 @@
>  
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/clock/sun50i-h6-ccu.h>
> +#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
>  #include <dt-bindings/reset/sun50i-h6-ccu.h>
> +#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
>  
>  / {
>  	interrupt-parent = <&gic>;
> @@ -198,7 +200,7 @@
>  			reg = <0x07022000 0x400>;
>  			interrupts = <GIC_SPI 105
> IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 111
> IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
> +			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
> <&osc32k>;
>  			clock-names = "apb", "hosc", "losc";
>  			gpio-controller;
>  			#gpio-cells = <3>;
> @@ -208,6 +210,7 @@
>  			r_i2c_pins: r-i2c {
>  				pins = "PL0", "PL1";
>  				function = "s_i2c";
> +				bias-pull-up;

Should this be included in this patch?

>  			};
>  		};
>  
> @@ -215,8 +218,8 @@
>  			compatible = "allwinner,sun6i-a31-i2c";
>  			reg = <0x07081400 0x400>;
>  			interrupts = <GIC_SPI 107
> IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&r_ccu 8>;
> -			resets = <&r_ccu 4>;
> +			clocks = <&r_ccu CLK_R_APB2_I2C>;
> +			resets = <&r_ccu RST_R_APB2_I2C>;
>  			pinctrl-names = "default";
>  			pinctrl-0 = <&r_i2c_pins>;
>  			status = "disabled";
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Chen-Yu Tsai June 20, 2018, 1:46 p.m. UTC | #2
On Wed, Jun 20, 2018 at 9:11 PM, Icenowy Zheng <icenowy@aosc.io> wrote:
> 在 2018-06-20三的 13:15 +0800,Chen-Yu Tsai写道:
>> Now that the device tree binding headers for the R_CCU have been
>> merged,
>> we can use the macros, instead of raw numbers.
>>
>> Switch to R_CCU macros for clock and reset indices.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 ++++++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> index c72da8cd9ef5..d85070f8c4a2 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> @@ -5,7 +5,9 @@
>>
>>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>>  #include <dt-bindings/clock/sun50i-h6-ccu.h>
>> +#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
>>  #include <dt-bindings/reset/sun50i-h6-ccu.h>
>> +#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
>>
>>  / {
>>       interrupt-parent = <&gic>;
>> @@ -198,7 +200,7 @@
>>                       reg = <0x07022000 0x400>;
>>                       interrupts = <GIC_SPI 105
>> IRQ_TYPE_LEVEL_HIGH>,
>>                                    <GIC_SPI 111
>> IRQ_TYPE_LEVEL_HIGH>;
>> -                     clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
>> +                     clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
>> <&osc32k>;
>>                       clock-names = "apb", "hosc", "losc";
>>                       gpio-controller;
>>                       #gpio-cells = <3>;
>> @@ -208,6 +210,7 @@
>>                       r_i2c_pins: r-i2c {
>>                               pins = "PL0", "PL1";
>>                               function = "s_i2c";
>> +                             bias-pull-up;
>
> Should this be included in this patch?

Oops. I'll remove it either in the next version, or if everything
else checks out, when applying.

Thanks!
ChenYu

>
>>                       };
>>               };
>>
>> @@ -215,8 +218,8 @@
>>                       compatible = "allwinner,sun6i-a31-i2c";
>>                       reg = <0x07081400 0x400>;
>>                       interrupts = <GIC_SPI 107
>> IRQ_TYPE_LEVEL_HIGH>;
>> -                     clocks = <&r_ccu 8>;
>> -                     resets = <&r_ccu 4>;
>> +                     clocks = <&r_ccu CLK_R_APB2_I2C>;
>> +                     resets = <&r_ccu RST_R_APB2_I2C>;
>>                       pinctrl-names = "default";
>>                       pinctrl-0 = <&r_i2c_pins>;
>>                       status = "disabled";
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Icenowy Zheng June 26, 2018, 12:49 a.m. UTC | #3
在 2018-06-20三的 13:15 +0800,Chen-Yu Tsai写道:
> From: Icenowy Zheng <icenowy@aosc.io>
> 
> Pine H64 board has an AXP805 PMIC on it.
> 
> Enable it in the device tree.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

I suggest to mention the working mode change here.

> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 109
> ++++++++++++++++++
>  1 file changed, 109 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> index 2e97173c9204..1673636358ef 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> @@ -44,6 +44,115 @@
>  &r_i2c {
>  	status = "okay";
>  
> +	axp805: pmic@36 {
> +		compatible = "x-powers,axp805", "x-powers,axp806";
> +		reg = <0x36>;
> +		interrupt-parent = <&r_intc>;
> +		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> +		interrupt-controller;
> +		#interrupt-cells = <1>;
> +		x-powers,self-working-mode;
> +
> +		regulators {
> +			reg_aldo1: aldo1 {
> +				regulator-always-on;
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-pl";
> +			};
> +
> +			reg_aldo2: aldo2 {
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-ac200";
> +			};
> +
> +			reg_aldo3: aldo3 {
> +				/* This regulator is connected with
> CLDO1 */
> +				regulator-always-on;
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-3v3-1";
> +			};
> +
> +			reg_bldo1: bldo1 {
> +				regulator-always-on;
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-name = "vcc-bias-pll";
> +			};
> +
> +			reg_bldo2: bldo2 {
> +				regulator-always-on;
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-name = "vcc-efuse-pcie-
> hdmi-io";
> +			};
> +
> +			reg_bldo3: bldo3 {
> +				regulator-always-on;
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-name = "vcc-dcxoio";
> +			};
> +
> +			bldo4 {
> +				/* unused */
> +			};
> +
> +			reg_cldo1: cldo1 {
> +				/* This regulator is connected with
> ALDO3 */
> +				regulator-always-on;
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-3v3-2";
> +			};
> +
> +			reg_cldo2: cldo2 {
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-wifi-1";
> +			};
> +
> +			reg_cldo3: cldo3 {
> +				regulator-min-microvolt = <3300000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-name = "vcc-wifi-2";
> +			};
> +
> +			reg_dcdca: dcdca {
> +				regulator-always-on;
> +				regulator-min-microvolt = <810000>;
> +				regulator-max-microvolt = <1080000>;
> +				regulator-name = "vdd-cpu";
> +			};
> +
> +			reg_dcdcc: dcdcc {
> +				regulator-min-microvolt = <810000>;
> +				regulator-max-microvolt = <1080000>;
> +				regulator-name = "vdd-gpu";
> +			};
> +
> +			reg_dcdcd: dcdcd {
> +				regulator-always-on;
> +				regulator-min-microvolt = <960000>;
> +				regulator-max-microvolt = <960000>;
> +				regulator-name = "vdd-sys";
> +			};
> +
> +			reg_dcdce: dcdce {
> +				regulator-always-on;
> +				regulator-min-microvolt = <1200000>;
> +				regulator-max-microvolt = <1200000>;
> +				regulator-name = "vcc-dram";
> +			};
> +
> +			sw {
> +				/* unused */
> +			};
> +		};
> +	};
> +
>  	pcf8563: rtc@51 {
>  		compatible = "nxp,pcf8563";
>  		reg = <0x51>;
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Chen-Yu Tsai June 26, 2018, 3:46 a.m. UTC | #4
On Tue, Jun 26, 2018 at 8:49 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> 在 2018-06-20三的 13:15 +0800,Chen-Yu Tsai写道:
>> From: Icenowy Zheng <icenowy@aosc.io>
>>
>> Pine H64 board has an AXP805 PMIC on it.
>>
>> Enable it in the device tree.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>
> I suggest to mention the working mode change here.

Done. Thanks.
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Icenowy Zheng June 26, 2018, 5:14 a.m. UTC | #5
在 2018-06-20三的 13:15 +0800,Chen-Yu Tsai写道:
> Hi everyone,
> 
> This series enables the AXP805 PMIC found on the Pine64 Pine H64
> board.
> The AXP805 seems to be identical to the AXP806 when comparing
> datasheets.
> The Pine H64 uses the PMIC in stand-alone or "self-working" mode,
> using
> the I2C interface. Neither features are currently supported. This
> series
> adds support for them, and then adds the PMIC to the device tree.
> 
> Patch 1 adds a new device tree property to describe the self-working
> mode
> for the AXP806.
> 
> Patch 2 adds support for the newly added property to the driver.
> 
> Patch 3 adds support for the using AXP806 with I2C.
> 
> Patch 4 converts raw clock/reset indices for the H6 R_CCU currently
> found
> in the device tree to macros defined as part of the device tree
> bindings.
> 
> Patch 5 adds the PMIC and its regulators to the Pine H64 device tree.
> 
> Please have a look.
> 
> Regards
> ChenYu

For the whole series:

Tested-by: Icenowy Zheng <icenowy@aosc.io>

And, except two small inline comments,

Reviewed-by: Icenowy Zheng <icenowy@aosc.io>

> 
> 
> Chen-Yu Tsai (4):
>   dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
>   mfd: axp20x: Add self-working mode support for AXP806
>   mfd: axp20x: Support AXP806 in I2C mode
>   arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset
>     indices
> 
> Icenowy Zheng (1):
>   arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64
> 
>  .../devicetree/bindings/mfd/axp20x.txt        |   7 +-
>  .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 109
> ++++++++++++++++++
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |   9 +-
>  drivers/mfd/axp20x-i2c.c                      |   2 +
>  drivers/mfd/axp20x.c                          |  30 ++++-
>  5 files changed, 149 insertions(+), 8 deletions(-)
> 
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Lee Jones July 4, 2018, 7:33 a.m. UTC | #6
On Wed, 20 Jun 2018, Chen-Yu Tsai wrote:

> The AXP806 can operate in a standalone "self-working" mode, in which it
> is also responsible for power control of the overall system. This mode
> is similar to the master mode, but the EN/PWRON pin functions as a power
> button, instead of a level-triggered enable switch.
> 
> This patch adds code checking for the new "x-powers,self-working-mode"
> property, and a separate mfd_cell list that includes the power button
> (PEK) sub-device.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  drivers/mfd/axp20x.c | 30 +++++++++++++++++++++++++++---
>  1 file changed, 27 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index 9a2ef3d9b8f8..1988881529a9 100644
> --- a/drivers/mfd/axp20x.c
> +++ b/drivers/mfd/axp20x.c
> @@ -221,6 +221,11 @@ static const struct resource axp803_pek_resources[] = {
>  	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
>  };
>  
> +static const struct resource axp806_pek_resources[] = {
> +	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
> +	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
> +};
> +
>  static const struct resource axp809_pek_resources[] = {
>  	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
>  	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
> @@ -730,6 +735,17 @@ static const struct mfd_cell axp803_cells[] = {
>  	{	.name			= "axp20x-regulator" },
>  };
>  
> +static const struct mfd_cell axp806_self_working_cells[] = {
> +	{
> +		.name			= "axp221-pek",
> +		.num_resources		= ARRAY_SIZE(axp806_pek_resources),
> +		.resources		= axp806_pek_resources,
> +	},
> +	{
> +		.name			= "axp20x-regulator",
> +	},
> +};

Nit: Please place single line entries on a single line.  Like this:

	{   	  .name			= "axp20x-regulator", },

After you have made that change, please add my:

For my own reference:
  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
Lee Jones July 4, 2018, 7:33 a.m. UTC | #7
On Wed, 20 Jun 2018, Chen-Yu Tsai wrote:

> The Pine64 H64 board uses an AXP806 PMIC in I2C and self-working mode.
> The H64 SoC does not have the usual RSB controller.
> 
> This patch adds AXP806 to the list of devices supported in I2C mode.
> In theory, all RSB-based PMICs can also be used in I2C mode.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  drivers/mfd/axp20x-i2c.c | 2 ++
>  1 file changed, 2 insertions(+)

For my own reference:
  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>