Message ID | 1633376488-545-1-git-send-email-pmaliset@codeaurora.org |
---|---|
Headers | show |
Series | Add DT bindings and DT nodes for PCIe and PHY in SC7280 | expand |
Quoting Prasad Malisetty (2021-10-04 12:41:26) > Enable PCIe controller and PHY for sc7280 IDP board. > Add specific NVMe GPIO entries for SKU1 and SKU2 support. > > Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7280-idp.dts | 8 +++++ > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 51 ++++++++++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/sc7280-idp2.dts | 8 +++++ > 3 files changed, 67 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > index 272d5ca..b416f3d 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > @@ -462,6 +491,28 @@ > }; > > &tlmm { > + nvme_pwren_pin: nvme-pwren-pin { pin is sort of redundant but OK. It would be simpler without the pin postfix. > + function = "gpio"; > + bias-pull-up; Why is there a bias pull up on this enable pin? I'd expect to see a bias-disable as this is an output pin and there's no need for a pull. > + }; > + > + pcie1_reset_n: pcie1-reset-n { > + pins = "gpio2"; > + function = "gpio"; > + > + drive-strength = <16>; Why such a strong drive strength? > + output-low; > + bias-disable; > + }; > + > + pcie1_wake_n: pcie1-wake-n { > + pins = "gpio3"; > + function = "gpio"; > + > + drive-strength = <2>; > + bias-pull-up; > + }; > + > qup_uart7_sleep_cts: qup-uart7-sleep-cts { > pins = "gpio28"; > function = "gpio";
Quoting Prasad Malisetty (2021-10-04 12:41:25) > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 39635da..e4bbf48 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2676,6 +2787,12 @@ > gpio-ranges = <&tlmm 0 0 175>; > wakeup-parent = <&pdc>; > > + pcie1_default_state: pcie1-default-state { Maybe call the node pcie1_clkreq_n: pcie1-clkreq-n as it's now only for the clkreq function. > + pins = "gpio79"; > + function = "pcie1_clkreqn"; > + bias-pull-up; > + }; > +
Quoting Prasad Malisetty (2021-10-04 12:41:27) > @@ -1488,7 +1528,13 @@ static int qcom_pcie_probe(struct platform_device *pdev) > > pcie->pci = pci; > > - pcie->ops = of_device_get_match_data(dev); > + pcie_cfg = of_device_get_match_data(dev); > + pcie->ops = pcie_cfg->ops; > + if (!pcie->ops) { Sorry I meant check for pcie_cfg being NULL too. of_device_get_match_data() can return NULL if the match doesn't work for some reason. > + dev_err(dev, "Invalid platform data\n"); > + return -EINVAL; > + } > + pcie->pipe_clk_need_muxing = pcie_cfg->pipe_clk_need_muxing; > > pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); > if (IS_ERR(pcie->reset)) {