| Message ID | 1588197415-13747-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| Headers | show |
| Series | Add R8A7742/RZG1H board support | expand |
On Wed, Apr 29, 2020 at 10:56:41PM +0100, Lad Prabhakar wrote: > @@ -1701,6 +1709,7 @@ config DEBUG_UART_PHYS > default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0 > default 0xe6e68000 if DEBUG_RCAR_GEN2_SCIF1 > default 0xe6ee0000 if DEBUG_RCAR_GEN2_SCIF4 > + default 0xe6c60000 if DEBUG_RCAR_GEN2_SCIFA2 Hi, This is ordered by address. Please keep it so. Thanks.
Hi, Thank you for the review. On Wed, Apr 29, 2020 at 11:00 PM Russell King - ARM Linux admin <linux@armlinux.org.uk> wrote: > > On Wed, Apr 29, 2020 at 10:56:41PM +0100, Lad Prabhakar wrote: > > @@ -1701,6 +1709,7 @@ config DEBUG_UART_PHYS > > default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0 > > default 0xe6e68000 if DEBUG_RCAR_GEN2_SCIF1 > > default 0xe6ee0000 if DEBUG_RCAR_GEN2_SCIF4 > > + default 0xe6c60000 if DEBUG_RCAR_GEN2_SCIFA2 > > Hi, > > This is ordered by address. Please keep it so. > Sure will do that. Cheers, --Prabhakar > Thanks. > > -- > RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ > FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
On Wed, Apr 29, 2020 at 11:57 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Add configuration option for the RZ/G1H (R8A77420) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.8. Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:57 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Enable recently added r8a7742 (RZ/G1H) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.8. Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:57 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Enable recently added r8a7742 (RZ/G1H) SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.8. Gr{oetje,eeting}s, Geert
Hi Prabhakar, On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses > SCIFA2 for the debug console. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Thanks for your patch! > --- a/arch/arm/Kconfig.debug > +++ b/arch/arm/Kconfig.debug > @@ -976,6 +976,13 @@ choice > Say Y here if you want kernel low-level debugging support > via SCIF4 on Renesas RZ/G1E (R8A7745). > > + config DEBUG_RCAR_GEN2_SCIFA2 > + bool "Kernel low-level debugging messages via SCIFA2 on ARCH_R8A7742" R8A7742 (without "ARCH_"-prefix) I can fix that (and the sorting issue) while applying, so Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.8. Gr{oetje,eeting}s, Geert
Hi Prabhakar, Thanks for your patch! On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790). but lacks several automotive-specific peripherals. So please split the pinmux groups and functions in common and automotive parts. From a quick look, for now the latter is limited to MLB groups/functions. > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> The rest looks good to me. Gr{oetje,eeting}s, Geert
Hi Prabhakar, Thanks for your patch! On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Basic support for the RZ/G1H (R8A7742) SoC. Added placeholders > for the peripherals supported by the SoC which will be filled up > by incremental patches. Please remove the placeholders, as there is nothing that depends on their presence. > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > --- /dev/null > +++ b/arch/arm/boot/dts/r8a7742.dtsi > @@ -0,0 +1,715 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree Source for the r8a7742 SoC > + * > + * Copyright (C) 2020 Renesas Electronics Corp. > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/clock/r8a7742-cpg-mssr.h> > +#include <dt-bindings/power/r8a7742-sysc.h> > + > +/ { > + compatible = "renesas,r8a7742"; > + #address-cells = <2>; > + #size-cells = <2>; > + > + /* > + * The external audio clocks are configured as 0 Hz fixed frequency > + * clocks by default. > + * Boards that provide audio clocks should override them. > + */ > + audio_clk_a: audio_clk_a { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; > + > + audio_clk_b: audio_clk_b { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; > + > + audio_clk_c: audio_clk_c { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; > + > + /* External CAN clock */ > + can_clk: can { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + /* This value must be overridden by the board. */ > + clock-frequency = <0>; > + }; Please drop the audio and CAN clocks for now, as they are not used. > + /* External root clock */ > + extal_clk: extal { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + /* This value must be overridden by the board. */ > + clock-frequency = <0>; > + }; > + > + /* External PCIe clock - can be overridden by the board */ > + pcie_bus_clk: pcie_bus { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <0>; > + }; Please drop the PCI clock for now, as it is not used. > + > + /* External SCIF clock */ > + scif_clk: scif { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + /* This value must be overridden by the board. */ > + clock-frequency = <0>; > + }; This should be used (see below). > + > + /* External USB clock - can be overridden by the board */ > + usb_extal_clk: usb_extal { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <48000000>; > + }; > + > + cpus { Please sort nodes by unit-address (if present) per type, or alphabetically. > + soc { > + scifa2: serial@e6c60000 { > + reg = <0 0xe6c60000 0 0x40>; > + /* placeholder */ > + }; I prefer to see a real node for the serial console, so the system can at least be boot tested to a console prompt. Note that this requires adding a minimal board DTS, too. Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Describe the IRQC interrupt controller in the r8a7742 device tree. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Describe SYS-DMAC0/1 in the R8A7742 device tree. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On 2020-04-30 14:54, Geert Uytterhoeven wrote: > On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: >> Describe the IRQC interrupt controller in the r8a7742 device tree. >> >> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >> Reviewed-by: Marian-Cristian Rotariu >> <marian-cristian.rotariu.rb@bp.renesas.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Can I safely assume that the irqchip DT updates will be routed via the arm-soc tree? If so, feel free to add my Acked-by: Marc Zyngier <maz@kernel.org> to these patches. Thanks, M.
Hi Marc, On Thu, Apr 30, 2020 at 4:01 PM Marc Zyngier <maz@kernel.org> wrote: > On 2020-04-30 14:54, Geert Uytterhoeven wrote: > > On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar > > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > >> Describe the IRQC interrupt controller in the r8a7742 device tree. > >> > >> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > >> Reviewed-by: Marian-Cristian Rotariu > >> <marian-cristian.rotariu.rb@bp.renesas.com> > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Can I safely assume that the irqchip DT updates will be routed via > the arm-soc tree? If so, feel free to add my Yes they will, eventually. > Acked-by: Marc Zyngier <maz@kernel.org> > > to these patches. Thanks! Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Describe [H]SCIF{|A|B} ports in the R8A7742 device tree. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Wed, Apr 29, 2020 at 11:59 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Describe GPIO blocks in the R8A7742 device tree. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
Hi Geert, Thank you for the review. On Thu, Apr 30, 2020 at 2:17 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > Thanks for your patch! > > On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790). > > but lacks several automotive-specific peripherals. > So please split the pinmux groups and functions in common and automotive > parts. From a quick look, for now the latter is limited to MLB > groups/functions. > Yes I can confirm its just limited to MLBP, Ill split up into common and automotive parts and send v2. Cheers, --Prabhakar > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > The rest looks good to me. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Geert, Thank you for the review. On Thu, Apr 30, 2020 at 2:49 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > Thanks for your patch! > > On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Basic support for the RZ/G1H (R8A7742) SoC. Added placeholders > > for the peripherals supported by the SoC which will be filled up > > by incremental patches. > > Please remove the placeholders, as there is nothing that depends on their > presence. > Sure will drop that. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > > --- /dev/null > > +++ b/arch/arm/boot/dts/r8a7742.dtsi > > @@ -0,0 +1,715 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Device Tree Source for the r8a7742 SoC > > + * > > + * Copyright (C) 2020 Renesas Electronics Corp. > > + */ > > + > > +#include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > +#include <dt-bindings/clock/r8a7742-cpg-mssr.h> > > +#include <dt-bindings/power/r8a7742-sysc.h> > > + > > +/ { > > + compatible = "renesas,r8a7742"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + /* > > + * The external audio clocks are configured as 0 Hz fixed frequency > > + * clocks by default. > > + * Boards that provide audio clocks should override them. > > + */ > > + audio_clk_a: audio_clk_a { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <0>; > > + }; > > + > > + audio_clk_b: audio_clk_b { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <0>; > > + }; > > + > > + audio_clk_c: audio_clk_c { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <0>; > > + }; > > + > > + /* External CAN clock */ > > + can_clk: can { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + /* This value must be overridden by the board. */ > > + clock-frequency = <0>; > > + }; > > Please drop the audio and CAN clocks for now, as they are not used. > OK. > > + /* External root clock */ > > + extal_clk: extal { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + /* This value must be overridden by the board. */ > > + clock-frequency = <0>; > > + }; > > + > > + /* External PCIe clock - can be overridden by the board */ > > + pcie_bus_clk: pcie_bus { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <0>; > > + }; > > Please drop the PCI clock for now, as it is not used. > OK > > + > > + /* External SCIF clock */ > > + scif_clk: scif { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + /* This value must be overridden by the board. */ > > + clock-frequency = <0>; > > + }; > > This should be used (see below). > > > + > > + /* External USB clock - can be overridden by the board */ > > + usb_extal_clk: usb_extal { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <48000000>; > > + }; > > + > > + cpus { > > Please sort nodes by unit-address (if present) per type, or alphabetically. > Sure will take care of it. > > + soc { > > > + scifa2: serial@e6c60000 { > > + reg = <0 0xe6c60000 0 0x40>; > > + /* placeholder */ > > + }; > > I prefer to see a real node for the serial console, so the system can at > least be boot tested to a console prompt. > Note that this requires adding a minimal board DTS, too. > OK so in that case Ill enable scifa2 and SDHI interface so it can be bootable. Cheers, --Prabhakar > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Geert, On Thu, Apr 30, 2020 at 2:03 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > On Wed, Apr 29, 2020 at 11:58 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Enable low-level debugging support for RZ/G1H (R8A7742). RZ/G1H uses > > SCIFA2 for the debug console. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm/Kconfig.debug > > +++ b/arch/arm/Kconfig.debug > > @@ -976,6 +976,13 @@ choice > > Say Y here if you want kernel low-level debugging support > > via SCIF4 on Renesas RZ/G1E (R8A7745). > > > > + config DEBUG_RCAR_GEN2_SCIFA2 > > + bool "Kernel low-level debugging messages via SCIFA2 on ARCH_R8A7742" > > R8A7742 (without "ARCH_"-prefix) > > I can fix that (and the sorting issue) while applying, so > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in renesas-devel for v5.8. > Thank you for taking care of that. Cheers, --Prabhakar > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Geert, On Wed, Apr 29, 2020 at 10:57 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Hi All, > > This patch set adds initial board support for R8A7742 SoC, > enabling R8A7742 arch in defconfigs with initial dtsi. > > Cheers, > --Prabhakar > > Lad Prabhakar (18): > soc: renesas: Add Renesas R8A7742 config option > ARM: shmobile: defconfig: Enable r8a7742 SoC > ARM: multi_v7_defconfig: Enable r8a7742 SoC > ARM: debug-ll: Add support for r8a7742 > dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support > pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support > ARM: dts: r8a7742: Initial SoC device tree > dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings > ARM: dts: r8a7742: Add IRQC support > dt-bindings: rcar-dmac: Document r8a7742 support > ARM: dts: r8a7742: Add SYS-DMAC support > dt-bindings: serial: renesas,scif: Document r8a7742 bindings > dt-bindings: serial: renesas,scifa: Document r8a7742 bindings > dt-bindings: serial: renesas,scifb: Document r8a7742 bindings > dt-bindings: serial: renesas,hscif: Document r8a7742 bindings > ARM: dts: r8a7742: Add [H]SCIF{A|B} support > dt-bindings: gpio: rcar: Add r8a7742 (RZ/G1H) support > ARM: dts: r8a7742: Add GPIO support > Thank you for the review. For v2 ill post patches from 6-18 fixing your review comments and including the Acks, as patches 1-5 have been queued. Cheers, --Prabhakar > .../devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 + > .../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + > .../interrupt-controller/renesas,irqc.yaml | 1 + > .../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 + > .../devicetree/bindings/serial/renesas,hscif.yaml | 1 + > .../devicetree/bindings/serial/renesas,scif.yaml | 1 + > .../devicetree/bindings/serial/renesas,scifa.yaml | 1 + > .../devicetree/bindings/serial/renesas,scifb.yaml | 1 + > arch/arm/Kconfig.debug | 10 + > arch/arm/boot/dts/r8a7742.dtsi | 939 +++++++++++++++++++++ > arch/arm/configs/multi_v7_defconfig | 1 + > arch/arm/configs/shmobile_defconfig | 1 + > drivers/pinctrl/sh-pfc/Kconfig | 4 + > drivers/pinctrl/sh-pfc/Makefile | 1 + > drivers/pinctrl/sh-pfc/core.c | 6 + > drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 24 + > drivers/pinctrl/sh-pfc/sh_pfc.h | 1 + > drivers/soc/renesas/Kconfig | 7 + > 18 files changed, 1002 insertions(+) > create mode 100644 arch/arm/boot/dts/r8a7742.dtsi > > -- > 2.7.4 >
Hi All, This patch set adds initial board support for R8A7742 SoC, enabling R8A7742 arch in defconfigs with initial dtsi. Cheers, --Prabhakar Lad Prabhakar (18): soc: renesas: Add Renesas R8A7742 config option ARM: shmobile: defconfig: Enable r8a7742 SoC ARM: multi_v7_defconfig: Enable r8a7742 SoC ARM: debug-ll: Add support for r8a7742 dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support ARM: dts: r8a7742: Initial SoC device tree dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings ARM: dts: r8a7742: Add IRQC support dt-bindings: rcar-dmac: Document r8a7742 support ARM: dts: r8a7742: Add SYS-DMAC support dt-bindings: serial: renesas,scif: Document r8a7742 bindings dt-bindings: serial: renesas,scifa: Document r8a7742 bindings dt-bindings: serial: renesas,scifb: Document r8a7742 bindings dt-bindings: serial: renesas,hscif: Document r8a7742 bindings ARM: dts: r8a7742: Add [H]SCIF{A|B} support dt-bindings: gpio: rcar: Add r8a7742 (RZ/G1H) support ARM: dts: r8a7742: Add GPIO support .../devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 + .../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + .../interrupt-controller/renesas,irqc.yaml | 1 + .../bindings/pinctrl/renesas,pfc-pinctrl.txt | 1 + .../devicetree/bindings/serial/renesas,hscif.yaml | 1 + .../devicetree/bindings/serial/renesas,scif.yaml | 1 + .../devicetree/bindings/serial/renesas,scifa.yaml | 1 + .../devicetree/bindings/serial/renesas,scifb.yaml | 1 + arch/arm/Kconfig.debug | 10 + arch/arm/boot/dts/r8a7742.dtsi | 939 +++++++++++++++++++++ arch/arm/configs/multi_v7_defconfig | 1 + arch/arm/configs/shmobile_defconfig | 1 + drivers/pinctrl/sh-pfc/Kconfig | 4 + drivers/pinctrl/sh-pfc/Makefile | 1 + drivers/pinctrl/sh-pfc/core.c | 6 + drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 24 + drivers/pinctrl/sh-pfc/sh_pfc.h | 1 + drivers/soc/renesas/Kconfig | 7 + 18 files changed, 1002 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7742.dtsi