| Message ID | 1573812304-24074-1-git-send-email-tdas@codeaurora.org |
|---|---|
| Headers | show |
| Series | Add GPU & Video Clock controller driver for SC7180 | expand |
Quoting Taniya Das (2019-11-15 02:05:04) > diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c > new file mode 100644 > index 0000000..0c60986 > --- /dev/null > +++ b/drivers/clk/qcom/videocc-sc7180.c > @@ -0,0 +1,259 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2019, The Linux Foundation. All rights reserved. > + */ > + [...] > + > +static int video_cc_sc7180_probe(struct platform_device *pdev) > +{ > + struct regmap *regmap; > + struct alpha_pll_config video_pll0_config = {}; > + > + regmap = qcom_cc_map(pdev, &video_cc_sc7180_desc); > + if (IS_ERR(regmap)) > + return PTR_ERR(regmap); > + > + video_pll0_config.l = 0x1f; > + video_pll0_config.alpha = 0x4000; > + video_pll0_config.user_ctl_val = 0x00000001; > + video_pll0_config.user_ctl_hi_val = 0x00004805; > + > + clk_fabia_pll_configure(&video_pll0, regmap, &video_pll0_config); > + > + /* video_cc_xo_clk */ Please say what's happening to video_cc_xo_clk. > + regmap_update_bits(regmap, 0x984, 0x1, 0x1); > + > + return qcom_cc_really_probe(pdev, &video_cc_sc7180_desc, regmap); > +} > + > +static struct platform_driver video_cc_sc7180_driver = { > + .probe = video_cc_sc7180_probe, > + .driver = { > + .name = "sc7180-videocc", > + .of_match_table = video_cc_sc7180_match_table, > + }, > +};
Quoting Taniya Das (2019-11-15 02:04:56) > [v2] > * Split Fabia code cleanup and calibration code. > * Few cleanups for GPU/Video CC are > * header file inclusion, const for pll vco table. > * removal of always enabled clock from gpucc. > * compatibles added in sorted order. > * move from core_initcall to subsys_initcall(). > * cleanup clk_parent_data for clocks to be provided from DT. Can you please resend with comments addressed?
Quoting Taniya Das (2019-11-15 02:04:57) > PLL_MODE read in fabia set rate is not required, thus remove the same. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- Applied to clk-next
Quoting Taniya Das (2019-11-15 02:04:58) > In the cases where the PLL is not calibrated the PLL could fail to lock. > Add support for prepare ops which would take care of the same. > > Fabia PLL user/test control registers might required to be configured, so > add support for configuring them. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- Applied to clk-next
Hello Stephen, On 12/24/2019 8:00 AM, Stephen Boyd wrote: > Quoting Taniya Das (2019-11-15 02:05:04) clk_fabia_pll_configure(&video_pll0, regmap, &video_pll0_config); >> + >> + /* video_cc_xo_clk */ > > Please say what's happening to video_cc_xo_clk. > Updated the next patch set with comment. >> + regmap_update_bits(regmap, 0x984, 0x1, 0x1); >> +
On 12/24/2019 8:02 AM, Stephen Boyd wrote: > Quoting Taniya Das (2019-11-15 02:04:56) >> [v2] >> * Split Fabia code cleanup and calibration code. >> * Few cleanups for GPU/Video CC are >> * header file inclusion, const for pll vco table. >> * removal of always enabled clock from gpucc. >> * compatibles added in sorted order. >> * move from core_initcall to subsys_initcall(). >> * cleanup clk_parent_data for clocks to be provided from DT. > > Can you please resend with comments addressed? > Next patches are submitted for review.
[v2] * Split Fabia code cleanup and calibration code. * Few cleanups for GPU/Video CC are * header file inclusion, const for pll vco table. * removal of always enabled clock from gpucc. * compatibles added in sorted order. * move from core_initcall to subsys_initcall(). * cleanup clk_parent_data for clocks to be provided from DT. [v1] * Fabia PLLs could fail latching in the case where the PLL is not calibrated, so add support to calibrate in prepare clock ops. * Add driver support for Graphics clock controller for SC7180 and also update device tree bindings for the various clocks supported in the clock controller. * Add driver support for Video clock controller for SC7180 and also update device tree bindings for the various clocks supported in the clock controller. Taniya Das (8): clk: qcom: alpha-pll: Remove useless read from set rate clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings dt-bindings: clock: Introduce QCOM Graphics clock bindings clk: qcom: Add graphics clock controller driver for SC7180 dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings dt-bindings: clock: Introduce QCOM Video clock bindings clk: qcom: Add video clock controller driver for SC7180 .../devicetree/bindings/clock/qcom,gpucc.txt | 24 -- .../devicetree/bindings/clock/qcom,gpucc.yaml | 70 ++++++ .../devicetree/bindings/clock/qcom,videocc.txt | 18 -- .../devicetree/bindings/clock/qcom,videocc.yaml | 62 +++++ drivers/clk/qcom/Kconfig | 16 ++ drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-alpha-pll.c | 83 ++++++- drivers/clk/qcom/clk-alpha-pll.h | 4 + drivers/clk/qcom/gpucc-sc7180.c | 266 +++++++++++++++++++++ drivers/clk/qcom/videocc-sc7180.c | 259 ++++++++++++++++++++ include/dt-bindings/clock/qcom,gpucc-sc7180.h | 21 ++ include/dt-bindings/clock/qcom,videocc-sc7180.h | 23 ++ 12 files changed, 800 insertions(+), 48 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc.yaml delete mode 100644 Documentation/devicetree/bindings/clock/qcom,videocc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,videocc.yaml create mode 100644 drivers/clk/qcom/gpucc-sc7180.c create mode 100644 drivers/clk/qcom/videocc-sc7180.c create mode 100644 include/dt-bindings/clock/qcom,gpucc-sc7180.h create mode 100644 include/dt-bindings/clock/qcom,videocc-sc7180.h -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.