| Message ID | 1536103345-1919-1-git-send-email-vnkgutta@codeaurora.org |
|---|---|
| Headers | show |
| Series | Add EDAC driver for QCOM SoCs | expand |
On 9/5/2018 4:52 AM, Venkata Narendra Kumar Gutta wrote: > +static const struct of_device_id qcom_llcc_edac_match_table[] = { > + { .compatible = "qcom,llcc-edac" }, > + { }, > +}; > + > Hi Venkata, Devicetree binding for llcc is updated, but what about this compatible? Regards, Sai
On 2018-09-06 05:38, Sai Prakash Ranjan wrote: > On 9/5/2018 4:52 AM, Venkata Narendra Kumar Gutta wrote: >> +static const struct of_device_id qcom_llcc_edac_match_table[] = { >> + { .compatible = "qcom,llcc-edac" }, >> + { }, >> +}; >> + >> > Hi Venkata, > > Devicetree binding for llcc is updated, but what about this compatible? Does it need documentation too? I was not sure if I should add documentation for this or not! > > Regards, > Sai
On 9/7/2018 4:01 AM, vnkgutta@codeaurora.org wrote: > On 2018-09-06 05:38, Sai Prakash Ranjan wrote: >> On 9/5/2018 4:52 AM, Venkata Narendra Kumar Gutta wrote: >>> +static const struct of_device_id qcom_llcc_edac_match_table[] = { >>> + { .compatible = "qcom,llcc-edac" }, >>> + { }, >>> +}; >>> + >>> >> Hi Venkata, >> >> Devicetree binding for llcc is updated, but what about this compatible? > > Does it need documentation too? I was not sure if I should add > documentation for this or not! > It does not require a separate binding, what I meant was to add this compatible in the llcc binding itself, maybe as a subnode if it is correct.
On Tue, Sep 04, 2018 at 04:22:24PM -0700, Venkata Narendra Kumar Gutta wrote: > From: Channagoud Kadabi <ckadabi@codeaurora.org> > > Add error reporting driver for Single Bit Errors (SBEs) and Double Bit > Errors (DBEs). As of now, this driver supports error reporting for > Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts > are triggered when the errors happen in the cache, the driver handles > those interrupts and dumps the syndrome registers. > > Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> > Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> > Co-developed-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> > --- > MAINTAINERS | 8 + > drivers/edac/Kconfig | 14 ++ > drivers/edac/Makefile | 1 + > drivers/edac/qcom_edac.c | 420 +++++++++++++++++++++++++++++++++++++ > include/linux/soc/qcom/llcc-qcom.h | 24 +++ > 5 files changed, 467 insertions(+) > create mode 100644 drivers/edac/qcom_edac.c EDAC bits look ok now, feel free to carry it through the qualcomm tree: Acked-by: Borislav Petkov <bp@suse.de>
On 2018-09-06 22:02, Sai Prakash Ranjan wrote: > On 9/7/2018 4:01 AM, vnkgutta@codeaurora.org wrote: >> On 2018-09-06 05:38, Sai Prakash Ranjan wrote: >>> On 9/5/2018 4:52 AM, Venkata Narendra Kumar Gutta wrote: >>>> +static const struct of_device_id qcom_llcc_edac_match_table[] = { >>>> + { .compatible = "qcom,llcc-edac" }, >>>> + { }, >>>> +}; >>>> + >>>> >>> Hi Venkata, >>> >>> Devicetree binding for llcc is updated, but what about this >>> compatible? >> >> Does it need documentation too? I was not sure if I should add >> documentation for this or not! >> > > It does not require a separate binding, what I meant was to add this > compatible in the llcc binding itself, maybe as a subnode if it is > correct. Hi, We aren't really using this of_device_id structure, as this driver is being registered from LLCC through platform_register_device_data(...). This structure initialization is just dead code as this driver won't be probed based on the DT entries. Hence removing this compatible property and the corresponding struct in the next patchset. So, this doesn't need an extra binding/documentation.
On 9/11/2018 4:15 AM, vnkgutta@codeaurora.org wrote: > On 2018-09-06 22:02, Sai Prakash Ranjan wrote: >> On 9/7/2018 4:01 AM, vnkgutta@codeaurora.org wrote: >>> On 2018-09-06 05:38, Sai Prakash Ranjan wrote: >>>> On 9/5/2018 4:52 AM, Venkata Narendra Kumar Gutta wrote: >>>>> +static const struct of_device_id qcom_llcc_edac_match_table[] = { >>>>> + { .compatible = "qcom,llcc-edac" }, >>>>> + { }, >>>>> +}; >>>>> + >>>>> >>>> Hi Venkata, >>>> >>>> Devicetree binding for llcc is updated, but what about this compatible? >>> >>> Does it need documentation too? I was not sure if I should add >>> documentation for this or not! >>> >> >> It does not require a separate binding, what I meant was to add this >> compatible in the llcc binding itself, maybe as a subnode if it is >> correct. > > Hi, > > We aren't really using this of_device_id structure, as this driver is > being registered from LLCC through > platform_register_device_data(...). This structure initialization is > just dead code as this driver won't be probed based on the DT entries. > > Hence removing this compatible property and the corresponding struct in > the next patchset. > > So, this doesn't need an extra binding/documentation. Ok. Now that you have removed the compatible, it should be fine. Thanks
This series implements EDAC driver for QCOM SoCs. As of now, this driver supports EDAC for Last Level Cache Controller (LLCC). LLCC EDAC driver is to detect and report single and double bit errors on Last Level Cache Controller (LLCC) cache. Interrupts are triggered when the errors happen in the cache, the driver handles those interrupts and dumps the syndrome registers. The driver functionality is implemented in: qcom_edac.c : This platform driver registers to edac framework and handles the single and double bit errors in cache by registering interrupt handlers. llcc-slice.c: It invokes the llcc edac driver and passes platform data to it. This patchset depends on the LLCC driver, which is part of 4.19 release. Link: https://patchwork.kernel.org/patch/10422531/ Link: http://lists-archives.com/linux-kernel/29157082-dt-bindings-documentation-for-qcom-llcc.html Patch wise description given below: Patch 1 adds the broadcast base regmap for broadcast writes in llcc. Patch 2 adds the required changes to register edac driver from llcc driver. Patch 3 adds the EDAC driver support for QCOM SoCS. Patch 4 updates the dt bindings of llcc. Changes since v3: * Updated the Kconfig and addressed minor comments in the driver Changes since v2: * Modified the edac driver and Kconfig - removed unnecessary header files, typecasting and redundant comments. - Changed the initialization of reg_data datastructure to static, Also updated the llcc_edac_reg_data member names and datatypes. - Removed "EDAC_QCOM_LLCC_PANIC_ON_UE" Kconfig variable Changes since v1: * Modified the edac driver - Removed duplicate functions that are used to dump the syndrome registers, replaced that with a common function and a reg_data datastructure. - Removed structure containing function pointers. - Addressed comments on error handling to clear the interrupt status. * updated Kconfig Changes since v0: * Added EDAC_QCOM config and updated the driver * Addressed comments related to indentation and other minor ones Channagoud Kadabi (1): drivers: edac: Add EDAC driver support for QCOM SoCs Venkata Narendra Kumar Gutta (3): drivers: soc: Add broadcast base for Last Level Cache Controller (LLCC) drivers: soc: Add support to register LLCC EDAC driver dt-bindings: msm: Update documentation of qcom,llcc .../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +- MAINTAINERS | 8 + drivers/edac/Kconfig | 14 + drivers/edac/Makefile | 1 + drivers/edac/qcom_edac.c | 420 +++++++++++++++++++++ drivers/soc/qcom/llcc-slice.c | 73 ++-- include/linux/soc/qcom/llcc-qcom.h | 30 +- 7 files changed, 537 insertions(+), 28 deletions(-) create mode 100644 drivers/edac/qcom_edac.c