| Message ID | 1525967064-10760-1-git-send-email-oleksandrs@mellanox.com |
|---|---|
| Headers | show |
| Series | JTAG driver introduction | expand |
On 05/10/2018 08:44 AM, Oleksandr Shamray wrote: > Initial patch for JTAG driver > JTAG class driver provide infrastructure to support hardware/software > JTAG platform drivers. It provide user layer API interface for flashing > and debugging external devices which equipped with JTAG interface > using standard transactions. > --- > Documentation/ioctl/ioctl-number.txt | 2 + > MAINTAINERS | 10 ++ > drivers/Kconfig | 2 + > drivers/Makefile | 1 + > drivers/jtag/Kconfig | 16 ++ > drivers/jtag/Makefile | 1 + > drivers/jtag/jtag.c | 273 ++++++++++++++++++++++++++++++++++ > include/linux/jtag.h | 41 +++++ > include/uapi/linux/jtag.h | 105 +++++++++++++ > 9 files changed, 451 insertions(+), 0 deletions(-) > create mode 100644 drivers/jtag/Kconfig > create mode 100644 drivers/jtag/Makefile > create mode 100644 drivers/jtag/jtag.c > create mode 100644 include/linux/jtag.h > create mode 100644 include/uapi/linux/jtag.h > > diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig > new file mode 100644 > index 0000000..5e2c75b > --- /dev/null > +++ b/drivers/jtag/Kconfig > @@ -0,0 +1,16 @@ > +menuconfig JTAG > + tristate "JTAG support" > + help > + This provides basic core functionality support for jtag class devices JTAG class devices. > + Hardware equipped with JTAG microcontroller which can be built I'm having problems understanding the line above + first 1/2 of the line below. Maybe something like: Hardware that is equipped with a JTAG microcontroller can be supported by using this driver's interfaces. > + on top of this drivers. Driver exposes the set of IOCTL to the This driver exposes a set of IOCTLs to > + user space for: > + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); ^^^^? Instruction? > + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); ^^^^^^^^^^^? Data? > + RUNTEST (Forces IEEE 1149.1 bus to a run state for specified > + number of clocks). > + > + If you want this support, you should say Y here. > + > + To compile this driver as a module, choose M here: the module will > + be called jtag.
On 05/10/2018 08:44 AM, Oleksandr Shamray wrote: > Added document that describe the ABI for JTAG class drivrer > > Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> > Acked-by: Arnd Bergmann <arnd@arndb.de> > --- > v18-v19 > Pavel Machek <pavel@ucw.cz> > - Added JTAG doccumentation to Documentation/jtag > > v17->v18 > v16->v17 > v15->v16 > v14->v15 > v13->v14 > v12->v13 > v11->v12 > Tobias Klauser <tklauser@distanz.ch> > - rename /Documentation/ABI/testing/jatg-dev -> jtag-dev > - Typo: s/interfase/interface > v10->v11 > v9->v10 > Fixes added by Oleksandr: > - change jtag-cdev to jtag-dev in documentation > - update Kernel Version and Date in jtag-dev documentation; > v8->v9 > v7->v8 > v6->v7 > Comments pointed by Pavel Machek <pavel@ucw.cz> > - Added jtag-cdev documentation to Documentation/ABI/testing folder > --- > Documentation/ABI/testing/jtag-dev | 27 +++++++++ > Documentation/jtag/overview | 31 ++++++++++ > Documentation/jtag/transactions | 108 ++++++++++++++++++++++++++++++++++++ > 3 files changed, 166 insertions(+), 0 deletions(-) > create mode 100644 Documentation/ABI/testing/jtag-dev > create mode 100644 Documentation/jtag/overview > create mode 100644 Documentation/jtag/transactions > diff --git a/Documentation/jtag/overview b/Documentation/jtag/overview > new file mode 100644 > index 0000000..e35afc0 > --- /dev/null > +++ b/Documentation/jtag/overview > @@ -0,0 +1,31 @@ > +Linux kernel JTAG support > +========================= > + > +The JTAG (Joint Test Action Group) is an industry standard for hardware just: JTAG drop the "The" maybe: for verifying hardware designs (although that's not quite what wikipedia says) > +verifying designs and testing printed circuit boards after manufacture. > +JTAG provides access to many logic signals of a complex integrated circuit, > +including the device pins pins. Oh. Just drop the 2 lines above since they are repeated below. > + > +JTAG provides access to many logic signals of a complex integrated circuit, > +including the device pins. > + > +A JTAG interface is a special interface added to a chip. > +Depending on the version of JTAG, two, four, or five pins are added. > + > +The connector pins are: > + TDI (Test Data In) > + TDO (Test Data Out) > + TCK (Test Clock) > + TMS (Test Mode Select) > + TRST (Test Reset) optional. > + > +JTAG interface is supposed to have two parts - basic core driver and is designed > +hardware specific driver. > +The basic driver introduces general interface which is not dependent of specific introduces a general interface > +hardware. It provides communication between user space and hardware specific and a hardware specific > +driver. > +Each JTAG device is represented as char device from (jtag0, jtag1, ...). as a char device > +Access to JTAG device is performed through IOCTL call. Access to a JTAG device is performed through IOCTL calls. > + > +Call flow example: User: open /dev/jtagX > +User (IOCTL) -> /dev/jtagX -> JTAG core driver -> JTAG hw specific driver User: close /dev/jtagX > diff --git a/Documentation/jtag/transactions b/Documentation/jtag/transactions > new file mode 100644 > index 0000000..91f7f92 > --- /dev/null > +++ b/Documentation/jtag/transactions > @@ -0,0 +1,108 @@ > +The JTAG API > +============= > + > +JTAG master devices can be accessed through a character misc-device. > +Each JTAG master interface can be accessed by using /dev/jtagN > + > +JTAG system calls set: > +- SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); Why is SIR for Data Register? > +- SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); Why is SDR for Instruction Register? > +- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified > +number of clocks. > + > +open(), close() > +------- > +open() opens JTAG device. Only one open operation per JTAG device > +can be performed. Twice and more open for one device will return error Two or more opens for one device will return errors. > + > +Open/Close device: > +- open('/dev/jtag0', O_RDWR); open("/dev/jtag0", O_RDWR); > +- close(jtag_fd'); close(jtag_fd); > + > +ioctl() > +------- > +All access operations to JTAG device performed trougth ioctl interface. devices are performed through the ioctl interface. > +It support another requests: The IOCTL interface supports these requests: > + JTAG_IOCRUNTEST - Force JTAG state machine to RUN_TEST/IDLE state > + JTAG_SIOCFREQ - Set JTAG TCK frequency > + JTAG_GIOCFREQ - GET JTAG TCK frequency > + JTAG_IOCXFER - send JTAG data Xfer > + JTAG_GIOCSTATUS - get current JTAG TAP status > + JTAG_SIOCMODE - set JTAG mode flags. > + > +JTAG_SIOCFREQ, JTAG_GIOCFREQ > +------ > +Set/Get JTAG clock speed: > + unsigned int frq; > + ioctl(jtag_fd, JTAG_SIOCFREQ, &frq); > + ioctl(jtag_fd, JTAG_GIOCFREQ, &frq); > + > +JTAG_IOCRUNTEST > +------ > +Force JTAG state machine to RUN_TEST/IDLE state > + > +struct jtag_run_test_idle { > + __u8 reset; > + __u8 endstate; > + __u8 tck; > +}; > + > +reset: 0 - run IDLE/PAUSE from current state > + 1 - go through TEST_LOGIC/RESET state before IDLE/PAUSE > +end: completion flag endstate: > +tck: clock counter > + > +Example: > + struct jtag_run_test_idle runtest; > + > + runtest.endstate = JTAG_STATE_IDLE; > + runtest.reset = 0; > + runtest.tck = data_p->tck; > + usleep(25 * 1000); > + ioctl(jtag_fd, JTAG_IOCRUNTEST, &runtest); > + > +JTAG_IOCXFER > +------ > +Send SDR/SIR transaction > + > +struct jtag_xfer { > + __u8 type; > + __u8 direction; > + __u8 endstate; > + __u8 padding; > + __u32 length; > + __u64 tdio; > +}; > + > +type: transfer type - JTAG_SIR_XFER/JTAG_SDR_XFER > +direction: xfer direction - JTAG_SIR_XFER/JTAG_SDR_XFER, > +length: xfer data len in bits > +tdio : xfer data array > +endir: xfer end state after transaction finish endstate: > + can be: JTAG_STATE_IDLE/JTAG_STATE_PAUSEIR/JTAG_STATE_PAUSEDR > + > +Example: > + struct jtag_xfer xfer; > + static char buf[64]; > + static unsigned int buf_len = 0; > + [...] > + xfer.type = JTAG_SDR_XFER; > + xfer.tdio = (__u64)buf; > + xfer.length = buf_len; > + xfer.endstate = JTAG_STATE_IDLE; > + > + if (is_read) > + xfer.direction = JTAG_READ_XFER; > + else > + xfer.direction = JTAG_WRITE_XFER; > + > + ioctl(jtag_fd, JTAG_IOCXFER, &xfer); > + > +JTAG_SIOCMODE > +------ > +If hw driver can support different running modes you can change it. > + > +Example: > + int mode; +#define JTAG_SIOCMODE _IOW(__JTAG_IOCTL_MAGIC, 5, unsigned int) so: unsigned int mode; > + mode = JTAG_XFER_HW_MODE; > + ioctl(jtag_fd, JTAG_SIOCMODE, &mode); >
When a need raise up to use JTAG interface for system's devices programming or CPU debugging, usually the user layer application implements jtag protocol by bit-bang or using a proprietary connection to vendor hardware. This method can be slow and not generic. We propose to implement general JTAG interface and infrastructure to communicate with user layer application. In such way, we can have the standard JTAG interface core part and separation from specific HW implementation. This allow new capability to debug the CPU or program system's device via BMC without additional devices nor cost. This patch purpose is to add JTAG master core infrastructure by defining new JTAG class and provide generic JTAG interface to allow hardware specific drivers to connect this interface. This will enable all JTAG drivers to use the common interface part and will have separate for hardware implementation. The JTAG (Joint Test Action Group) core driver provides minimal generic JTAG interface, which can be used by hardware specific JTAG master controllers. By providing common interface for the JTAG controllers, user space device programing is hardware independent. Modern SoC which in use for embedded system' equipped with internal JTAG master interface. This interface is used for programming and debugging system's hardware components, like CPLD, FPGA, CPU, voltage and industrial controllers. Firmware for such devices can be upgraded through JTAG interface during Runtime. The JTAG standard support for multiple devices programming, is in case their lines are daisy-chained together. For example, systems which equipped with host CPU, BMC SoC or/and number of programmable devices are capable to connect a pin and select system components dynamically for programming and debugging, This is using by the BMC which is equipped with internal SoC master controller. For example: BMC JTAG master --> pin selected to CPLDs chain for programming (filed upgrade, production) BMC JTAG master --> pin selected to voltage monitors for programming (field upgrade, production) BMC JTAG master --> pin selected to host CPU (on-site debugging and developers debugging) For example, we can have application in user space which using calls to JTAG driver executes CPLD programming directly from SVF file The JTAG standard (IEEE 1149.1) defines the next connector pins: - TDI (Test Data In); - TDO (Test Data Out); - TCK (Test Clock); - TMS (Test Mode Select); - TRST (Test Reset) (Optional); The SoC equipped with JTAG master controller, performs device programming on command or vector level. For example a file in a standard SVF (Serial Vector Format) that contains boundary scan vectors, can be used by sending each vector to the JTAG interface and the JTAG controller will execute the programming. Initial version provides the system calls set for: - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified number of clocks. SoC which are not equipped with JTAG master interface, can be built on top of JTAG core driver infrastructure, by applying bit-banging of TDI, TDO, TCK and TMS pins within the hardware specific driver. Oleksandr Shamray (4): drivers: jtag: Add JTAG core driver drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master driver Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx families JTAG master driver Documentation: jtag: Add ABI documentation Documentation/ABI/testing/jtag-dev | 27 + .../devicetree/bindings/jtag/aspeed-jtag.txt | 22 + Documentation/ioctl/ioctl-number.txt | 2 + Documentation/jtag/overview | 31 + Documentation/jtag/transactions | 108 +++ MAINTAINERS | 10 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/jtag/Kconfig | 30 + drivers/jtag/Makefile | 2 + drivers/jtag/jtag-aspeed.c | 786 ++++++++++++++++++++ drivers/jtag/jtag.c | 273 +++++++ include/linux/jtag.h | 41 + include/uapi/linux/jtag.h | 105 +++ 14 files changed, 1440 insertions(+), 0 deletions(-) create mode 100644 Documentation/ABI/testing/jtag-dev create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt create mode 100644 Documentation/jtag/overview create mode 100644 Documentation/jtag/transactions create mode 100644 drivers/jtag/Kconfig create mode 100644 drivers/jtag/Makefile create mode 100644 drivers/jtag/jtag-aspeed.c create mode 100644 drivers/jtag/jtag.c create mode 100644 include/linux/jtag.h create mode 100644 include/uapi/linux/jtag.h -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html