From patchwork Mon Oct 30 15:15:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 832088 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yQdNv3ybMz9t1G for ; Tue, 31 Oct 2017 02:16:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752532AbdJ3PQa (ORCPT ); Mon, 30 Oct 2017 11:16:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:39892 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751663AbdJ3PQ3 (ORCPT ); Mon, 30 Oct 2017 11:16:29 -0400 Received: from localhost.localdomain (unknown [104.237.91.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 942382192A; Mon, 30 Oct 2017 15:16:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 942382192A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=shawnguo@kernel.org From: Shawn Guo To: Kishon Vijay Abraham I Cc: Rob Herring , Jianguo Sun , Jiancheng Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shawn Guo Subject: [PATCH v5 0/3] Add Combo PHY driver for HiSilicon STB SoCs Date: Mon, 30 Oct 2017 23:15:54 +0800 Message-Id: <1509376557-7187-1-git-send-email-shawnguo@kernel.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Shawn Guo It adds device tree bindings and driver support for Combo PHY device which can be found on HiSilicon STB SoCs. Changes for v5: - Add bindings doc for Hi3798CV200 peripheral controller, and refer to the bindings of this parent node in combphy bindings doc. Changes for v4: - Instead of relying on device id, add a new property hisilicon,fixed-mode for combphy device that doesn't support mode select but a fixed phy mode. - Move combphy mode select register bits definition to device tree, as it may vary from one device to another. Changes for v3: - Make combphy device be child of peripheral controller and use 'reg' property for mapping combphy configuration registers. - Kill "hisilicon,peripheral-syscon" property, since parent node is just the syscon controller now. - Check combphy id to handle the quirk that combphy0 can not configure mode but always works in USB3 mode. - Unify phy .init and .exit hooks for different combphy instances and work modes, as the only quirk we need to handle is that combphy0 can only work in USB3 mode. - Better naming for clock and reset, 'ref' to 'ref_clk', 'por' to 'por_rst'. Changes for v2: - Move DT bindings into a separate patch. - Drop the spurious newline from drivers/phy/Makefile. - Use the phy type defines in dt-bindings/phy/phy.h. - Use PTR_ERR_OR_ZERO() for checking return from devm_of_phy_provider_register(). - Add USB3 phy support. Jianguo Sun (2): dt-bindings: add bindings doc for hi3798cv200 combphy phy: add combo phy driver for HiSilicon STB SoCs Shawn Guo (1): dt-bindings: hisilicon: add doc for Hi3798CV200 peripheral controller .../bindings/arm/hisilicon/hisilicon.txt | 23 ++ .../bindings/phy/phy-hi3798cv200-combphy.txt | 59 +++++ drivers/phy/hisilicon/Kconfig | 9 + drivers/phy/hisilicon/Makefile | 1 + drivers/phy/hisilicon/phy-histb-combphy.c | 289 +++++++++++++++++++++ 5 files changed, 381 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt create mode 100644 drivers/phy/hisilicon/phy-histb-combphy.c