| Message ID | 20220704085552.3499243-1-abel@x-silicon.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] package/llvm: Support for RISC-V on the LLVM package | expand |
Hello Abel, Le 04/07/2022 à 10:55, Abel Bernabeu a écrit : > The initial support for the LLVM package did not include RISC-V, and > needed to be added. Indeed, at the time LLVM package was added to Buildroot there was no RISC-V support yet. > > There is a new configuration parameter added > (BR2_PACKAGE_LLVM_TARGETS_TO_BUILD) for dealing with the fact that > the LLVM target and the architecture have different naming for RISC-V. > While the target for RISC-V is "RISCV" irrespective of the ISA being > 32 or 64 bits, the architecture does contain the number of bits > leading to "riscv32" and "riscv64". > > For previously supported architectures the naming for target and > architecture matched and thus this parameter had not been needed, but > it is now needed for RISC-V. > > Signed-off-by: Abel Bernabeu <abel@x-silicon.com> > --- > package/llvm/Config.in | 10 ++++++++++ > package/llvm/llvm.mk | 2 +- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/package/llvm/Config.in b/package/llvm/Config.in > index c1887e36dd..5f2864b802 100644 > --- a/package/llvm/Config.in > +++ b/package/llvm/Config.in > @@ -4,12 +4,22 @@ config BR2_PACKAGE_LLVM_ARCH_SUPPORTS > default y if BR2_x86_64 > default y if BR2_aarch64 > default y if BR2_arm || BR2_armeb > + default y if BR2_riscv > > config BR2_PACKAGE_LLVM_TARGET_ARCH > string > default "AArch64" if BR2_aarch64 > default "ARM" if BR2_arm || BR2_armeb > default "X86" if BR2_i386 || BR2_x86_64 > + default "riscv32" if BR2_riscv && !BR2_ARCH_IS_64 > + default "riscv64" if BR2_riscv && BR2_ARCH_IS_64 Indentation issue, please use one tab. > + > +config BR2_PACKAGE_LLVM_TARGETS_TO_BUILD > + string > + default "AArch64" if BR2_aarch64 > + default "ARM" if BR2_arm || BR2_armeb > + default "X86" if BR2_i386 || BR2_x86_64 > + default "RISCV" if BR2_riscv Having to duplicate BR2_PACKAGE_LLVM_TARGET_ARCH for the sake of one architecture is a pity. Maybe we can try to use $(subst ...) to replace riscv32|64 by RISCV but it's not really a clean solution either.... Reviewed-by: Romain Naour <romain.naour@smile.fr> Best regards, Romain > > config BR2_PACKAGE_LLVM > bool "llvm" > diff --git a/package/llvm/llvm.mk b/package/llvm/llvm.mk > index 4670773ca3..dbf1f7b813 100644 > --- a/package/llvm/llvm.mk > +++ b/package/llvm/llvm.mk > @@ -42,7 +42,7 @@ HOST_LLVM_CONF_OPTS += -DCMAKE_INSTALL_RPATH="$(HOST_DIR)/lib" > LLVM_TARGET_ARCH = $(call qstrip,$(BR2_PACKAGE_LLVM_TARGET_ARCH)) > > # Build backend for target architecture. This include backends like AMDGPU. > -LLVM_TARGETS_TO_BUILD = $(LLVM_TARGET_ARCH) > +LLVM_TARGETS_TO_BUILD = $(BR2_PACKAGE_LLVM_TARGETS_TO_BUILD) > HOST_LLVM_CONF_OPTS += -DLLVM_TARGETS_TO_BUILD="$(subst $(space),;,$(LLVM_TARGETS_TO_BUILD))" > LLVM_CONF_OPTS += -DLLVM_TARGETS_TO_BUILD="$(subst $(space),;,$(LLVM_TARGETS_TO_BUILD))" >
diff --git a/package/llvm/Config.in b/package/llvm/Config.in index c1887e36dd..5f2864b802 100644 --- a/package/llvm/Config.in +++ b/package/llvm/Config.in @@ -4,12 +4,22 @@ config BR2_PACKAGE_LLVM_ARCH_SUPPORTS default y if BR2_x86_64 default y if BR2_aarch64 default y if BR2_arm || BR2_armeb + default y if BR2_riscv config BR2_PACKAGE_LLVM_TARGET_ARCH string default "AArch64" if BR2_aarch64 default "ARM" if BR2_arm || BR2_armeb default "X86" if BR2_i386 || BR2_x86_64 + default "riscv32" if BR2_riscv && !BR2_ARCH_IS_64 + default "riscv64" if BR2_riscv && BR2_ARCH_IS_64 + +config BR2_PACKAGE_LLVM_TARGETS_TO_BUILD + string + default "AArch64" if BR2_aarch64 + default "ARM" if BR2_arm || BR2_armeb + default "X86" if BR2_i386 || BR2_x86_64 + default "RISCV" if BR2_riscv config BR2_PACKAGE_LLVM bool "llvm" diff --git a/package/llvm/llvm.mk b/package/llvm/llvm.mk index 4670773ca3..dbf1f7b813 100644 --- a/package/llvm/llvm.mk +++ b/package/llvm/llvm.mk @@ -42,7 +42,7 @@ HOST_LLVM_CONF_OPTS += -DCMAKE_INSTALL_RPATH="$(HOST_DIR)/lib" LLVM_TARGET_ARCH = $(call qstrip,$(BR2_PACKAGE_LLVM_TARGET_ARCH)) # Build backend for target architecture. This include backends like AMDGPU. -LLVM_TARGETS_TO_BUILD = $(LLVM_TARGET_ARCH) +LLVM_TARGETS_TO_BUILD = $(BR2_PACKAGE_LLVM_TARGETS_TO_BUILD) HOST_LLVM_CONF_OPTS += -DLLVM_TARGETS_TO_BUILD="$(subst $(space),;,$(LLVM_TARGETS_TO_BUILD))" LLVM_CONF_OPTS += -DLLVM_TARGETS_TO_BUILD="$(subst $(space),;,$(LLVM_TARGETS_TO_BUILD))"
The initial support for the LLVM package did not include RISC-V, and needed to be added. There is a new configuration parameter added (BR2_PACKAGE_LLVM_TARGETS_TO_BUILD) for dealing with the fact that the LLVM target and the architecture have different naming for RISC-V. While the target for RISC-V is "RISCV" irrespective of the ISA being 32 or 64 bits, the architecture does contain the number of bits leading to "riscv32" and "riscv64". For previously supported architectures the naming for target and architecture matched and thus this parameter had not been needed, but it is now needed for RISC-V. Signed-off-by: Abel Bernabeu <abel@x-silicon.com> --- package/llvm/Config.in | 10 ++++++++++ package/llvm/llvm.mk | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-)