diff mbox series

[01/28] configs/acmesystems_acqua_a5_256mb_defconfig: enable NEON/VFPV4 FPU strategy

Message ID 20220118104338.2081259-2-giulio.benetti@benettiengineering.com
State Rejected
Headers show
Series Use the best FPU strategies on 32-bits Arm Cortex | expand

Commit Message

Giulio Benetti Jan. 18, 2022, 10:43 a.m. UTC
As pointed by SAMA5D2 Datasheet[1]:
```
The Cortex-A5 NEON Media Processing Engine (MPE) extends the Cortex-A5
functionality to provide support for the ARM v7 Advanced SIMD v2 and
Vector Floating-Point v4 (VFPv4) instruction sets.
```

So let's enable VFPV4/NEON FPU strategy instead of the default VFPV4-D16.

[1]: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA5D2-Series-Data-sheet-ds60001476G.pdf

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
 configs/acmesystems_acqua_a5_256mb_defconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Giulio Benetti Jan. 18, 2022, 5:33 p.m. UTC | #1
Hi All,

On 18/01/22 11:43, Giulio Benetti wrote:
> As pointed by SAMA5D2 Datasheet[1]:

As pointed by Edgar on Patch 02/28 Acqua A5 doesn't have a SAMA5D2 but a 
SAMA5D3 that doesn't have VFPV4+NEON, but a VFPv4-D16 and NEON, so this 
can't work.

I've marked it as Rejected in Patchwork as patch 01/28 and please drop it.

Thank you and sorry for the noise.

Best regards
diff mbox series

Patch

diff --git a/configs/acmesystems_acqua_a5_256mb_defconfig b/configs/acmesystems_acqua_a5_256mb_defconfig
index f8129f3780..991de4c1be 100644
--- a/configs/acmesystems_acqua_a5_256mb_defconfig
+++ b/configs/acmesystems_acqua_a5_256mb_defconfig
@@ -1,5 +1,6 @@ 
 BR2_arm=y
 BR2_cortex_a5=y
+BR2_ARM_FPU_NEON_VFPV4=y
 BR2_ARM_ENABLE_VFP=y
 BR2_ARM_INSTRUCTIONS_THUMB2=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y