From patchwork Thu Jul 16 19:04:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Brodkin X-Patchwork-Id: 496845 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137]) by ozlabs.org (Postfix) with ESMTP id B5E70140773 for ; Fri, 17 Jul 2015 05:45:29 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by fraxinus.osuosl.org (Postfix) with ESMTP id 07B79A2F51; Thu, 16 Jul 2015 19:45:29 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from fraxinus.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VDpyi5BPi_1q; Thu, 16 Jul 2015 19:45:26 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by fraxinus.osuosl.org (Postfix) with ESMTP id C487BA3946; Thu, 16 Jul 2015 19:39:51 +0000 (UTC) X-Original-To: buildroot@lists.busybox.net Delivered-To: buildroot@osuosl.org Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by ash.osuosl.org (Postfix) with ESMTP id 9B5341CE70A for ; Thu, 16 Jul 2015 19:04:08 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 96B3E8D128 for ; Thu, 16 Jul 2015 19:04:08 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GeI-a8iUuBxi for ; Thu, 16 Jul 2015 19:04:08 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from smtprelay.synopsys.com (unknown [198.182.60.111]) by whitealder.osuosl.org (Postfix) with ESMTPS id F05BF8D10A for ; Thu, 16 Jul 2015 19:04:07 +0000 (UTC) Received: from us02secmta1.synopsys.com (us02secmta1.synopsys.com [10.12.235.96]) by smtprelay.synopsys.com (Postfix) with ESMTP id 2571B10C01A8; Thu, 16 Jul 2015 12:04:06 -0700 (PDT) Received: from us02secmta1.internal.synopsys.com (us02secmta1.internal.synopsys.com [127.0.0.1]) by us02secmta1.internal.synopsys.com (Service) with ESMTP id E8AE04E213; Thu, 16 Jul 2015 12:04:05 -0700 (PDT) Received: from mailhost.synopsys.com (unknown [10.13.184.66]) by us02secmta1.internal.synopsys.com (Service) with ESMTP id C4E804E202; Thu, 16 Jul 2015 12:04:05 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id B47741302; Thu, 16 Jul 2015 12:04:05 -0700 (PDT) Received: from abrodkin-e7440l.internal.synopsys.com (unknown [10.225.15.67]) by mailhost.synopsys.com (Postfix) with ESMTP id 1A5BB12EE; Thu, 16 Jul 2015 12:04:03 -0700 (PDT) From: Alexey Brodkin To: buildroot@busybox.net Date: Thu, 16 Jul 2015 22:04:01 +0300 Message-Id: <1437073441-11321-1-git-send-email-abrodkin@synopsys.com> X-Mailer: git-send-email 2.4.3 Cc: Thomas Petazzoni , Alexey Brodkin Subject: [Buildroot] [PATCH] ARC: allow selection of MMU page size X-BeenThere: buildroot@busybox.net X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: buildroot-bounces@busybox.net Sender: "buildroot" Modern ARC cores (those sporting MMU of version 3 and 4) allow selection of different page sizes (4, 8 or 16 kB) during ASIC design creation. And it's important to build a toolchain with page size setting that matches hardware. Otherwise user-space applications will fail on execution due to unexpected data layout/alignment etc. Signed-off-by: Alexey Brodkin c: Anton Kolesov Cc: Thomas Petazzoni --- arch/Config.in.arc | 30 ++++++++++++++++++++++++++++++ package/uclibc/uclibc.mk | 8 ++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/Config.in.arc b/arch/Config.in.arc index b48a90f..e960eb8 100644 --- a/arch/Config.in.arc +++ b/arch/Config.in.arc @@ -40,3 +40,33 @@ config BR2_GCC_TARGET_CPU default "arc700" if BR2_arc750d default "arc700" if BR2_arc770d default "archs" if BR2_archs38 + +choice + prompt "MMU Page Size" + default BR2_arc_page_size_8k + help + MMU starting from version 3 (could be found in ARC 770) and now + version 4 (could be found in ARC HS38) allows selection of page + size during ASIC design creation. And it's important to build + a toolchain with page size setting that matches hardware. + Otherwise user-space applications will fail on execution due to + unexpected data layout/alignment. + +config BR2_arc_page_size_4k + bool "4KB" + depends on BR2_arc770d || BR2_archs38 + +config BR2_arc_page_size_8k + bool "8KB" + +config BR2_arc_page_size_16k + bool "16KB" + depends on BR2_arc770d || BR2_archs38 + +endchoice + +config BR2_ARC_PAGE_SIZE + string + default "4K" if BR2_arc_page_size_4k + default "8K" if BR2_arc_page_size_8k + default "16K" if BR2_arc_page_size_16k diff --git a/package/uclibc/uclibc.mk b/package/uclibc/uclibc.mk index 9dfafad..a2ba230 100644 --- a/package/uclibc/uclibc.mk +++ b/package/uclibc/uclibc.mk @@ -70,6 +70,13 @@ UCLIBC_ARC_TYPE = CONFIG_$(call qstrip,$(BR2_UCLIBC_ARC_TYPE)) define UCLIBC_ARC_TYPE_CONFIG $(call KCONFIG_ENABLE_OPT,$(UCLIBC_ARC_TYPE),$(@D)/.config) endef + +UCLIBC_ARC_PAGE_SIZE = CONFIG_ARC_PAGE_SIZE_$(call qstrip,$(BR2_ARC_PAGE_SIZE)) +define UCLIBC_ARC_PAGE_SIZE_CONFIG + $(SED) '/CONFIG_ARC_PAGE_SIZE_*/d' $(@D)/.config + $(call KCONFIG_ENABLE_OPT,$(UCLIBC_ARC_PAGE_SIZE),$(@D)/.config) +endef + endif # arc # @@ -367,6 +374,7 @@ define UCLIBC_KCONFIG_FIXUP_CMDS $(call KCONFIG_SET_OPT,SHARED_LIB_LOADER_PREFIX,"/lib",$(@D)/.config) $(UCLIBC_MMU_CONFIG) $(UCLIBC_ARC_TYPE_CONFIG) + $(UCLIBC_ARC_PAGE_SIZE_CONFIG) $(UCLIBC_ARM_ABI_CONFIG) $(UCLIBC_ARM_BX_CONFIG) $(UCLIBC_MIPS_ABI_CONFIG)