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[1/4] arm: conditionally support regular ARM instructions

Message ID 1421951608-31233-2-git-send-email-ezequiel@vanguardiasur.com.ar
State Accepted
Headers show

Commit Message

Ezequiel Garcia Jan. 22, 2015, 6:33 p.m. UTC 
From: Guido Martínez <guido@vanguardiasur.com.ar>

Until now, all ARM processors supported the original ARM instructions.
However, the Cortex-M variants don't support them, and support only
Thumb/Thumb2 modes.

So, make a Kconfig option for ARM support and use it.

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
---
 arch/Config.in.arm | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

Comments

Romain Naour Feb. 2, 2015, 4:17 p.m. UTC | #1 
Hi Ezequiel,

Le 22/01/2015 19:33, Ezequiel Garcia a écrit :
> From: Guido Martínez <guido@vanguardiasur.com.ar>
> 
> Until now, all ARM processors supported the original ARM instructions.
> However, the Cortex-M variants don't support them, and support only
> Thumb/Thumb2 modes.
> 
> So, make a Kconfig option for ARM support and use it.
> 
> Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
> ---

[...]

>  choice
>  	prompt "ARM instruction set"
> -	depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
> +	depends on BR2_ARM_CPU_HAS_ARM || BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2

This prompt is now always displayed, so the depends on can be removed.

>  
>  config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
>  	bool "ARM"
> +	depends on BR2_ARM_CPU_HAS_ARM
>  	help
>  	  This option instructs the compiler to generate regular ARM
>  	  instructions, that are all 32 bits wide.
> 

Best regards,
Romain Naour
Thomas Petazzoni Feb. 2, 2015, 8:18 p.m. UTC | #2 
Dear Ezequiel Garcia,

On Thu, 22 Jan 2015 15:33:25 -0300, Ezequiel Garcia wrote:
> From: Guido Martínez <guido@vanguardiasur.com.ar>
> 
> Until now, all ARM processors supported the original ARM instructions.
> However, the Cortex-M variants don't support them, and support only
> Thumb/Thumb2 modes.
> 
> So, make a Kconfig option for ARM support and use it.
> 
> Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
> ---
>  arch/Config.in.arm | 23 ++++++++++++++++++++++-
>  1 file changed, 22 insertions(+), 1 deletion(-)

I've applied this patch, after taking into account Romain's comment,
and also after renaming BR2_ARM_INSTRUCTIONS_ARM_CHOICE to
BR2_ARM_INSTRUCTIONS_ARM and removing the hidden option
BR2_ARM_INSTRUCTIONS_ARM outside the choice.

From the commit log:

[Thomas:
  - Remove the dependency in the choice between ARM/Thumb/Thumb-2,
    because basically the choice is now always visible.
  - Replace the BR2_ARM_INSTRUCTIONS_ARM_CHOICE choice option directly
    by BR2_ARM_INSTRUCTIONS_ARM, instead of having this blind option
    defined separately. This means the choice is now always visible,
    even when only the ARM instruction set is supported.]


Thanks!

Thomas
diff mbox

Patch

diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 162191b..a2d113a 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -31,6 +31,9 @@  config BR2_ARM_CPU_HAS_VFPV4
 	bool
 	select BR2_ARM_CPU_HAS_VFPV3
 
+config BR2_ARM_CPU_HAS_ARM
+	bool
+
 config BR2_ARM_CPU_HAS_THUMB
 	bool
 
@@ -58,83 +61,100 @@  choice
 
 config BR2_arm920t
 	bool "arm920t"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 config BR2_arm922t
 	bool "arm922t"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 config BR2_arm926t
 	bool "arm926t"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 config BR2_cortex_a5
 	bool "cortex-A5"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_NEON
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_cortex_a7
 	bool "cortex-A7"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_cortex_a8
 	bool "cortex-A8"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_cortex_a9
 	bool "cortex-A9"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_NEON
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_cortex_a12
 	bool "cortex-A12"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_cortex_a15
 	bool "cortex-A15"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_NEON
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 config BR2_fa526
 	bool "fa526/626"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 config BR2_pj4
 	bool "pj4"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 config BR2_xscale
 	bool "xscale"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 config BR2_iwmmxt
 	bool "iwmmxt"
+	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV5
 endchoice
 
@@ -318,10 +338,11 @@  endchoice
 
 choice
 	prompt "ARM instruction set"
-	depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
+	depends on BR2_ARM_CPU_HAS_ARM || BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
 
 config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
 	bool "ARM"
+	depends on BR2_ARM_CPU_HAS_ARM
 	help
 	  This option instructs the compiler to generate regular ARM
 	  instructions, that are all 32 bits wide.