From patchwork Wed Nov 13 21:28:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Spenser Gilliland X-Patchwork-Id: 291046 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from hemlock.osuosl.org (hemlock.osuosl.org [140.211.166.133]) by ozlabs.org (Postfix) with ESMTP id D7B9B2C00A1 for ; Thu, 14 Nov 2013 08:29:12 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id 2ACCF9360B; Wed, 13 Nov 2013 21:29:12 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8gqmRT3mJRmT; Wed, 13 Nov 2013 21:29:11 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by hemlock.osuosl.org (Postfix) with ESMTP id 799C3931DD; Wed, 13 Nov 2013 21:29:11 +0000 (UTC) X-Original-To: buildroot@lists.busybox.net Delivered-To: buildroot@osuosl.org Received: from whitealder.osuosl.org (whitealder.osuosl.org [140.211.166.138]) by ash.osuosl.org (Postfix) with ESMTP id 881691BF838 for ; Wed, 13 Nov 2013 21:29:10 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 8193A848E4 for ; Wed, 13 Nov 2013 21:29:10 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ILDnqtz5HU1i for ; Wed, 13 Nov 2013 21:29:09 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from mail-ie0-f169.google.com (mail-ie0-f169.google.com [209.85.223.169]) by whitealder.osuosl.org (Postfix) with ESMTPS id E1A6B84785 for ; Wed, 13 Nov 2013 21:29:08 +0000 (UTC) Received: by mail-ie0-f169.google.com with SMTP id tp5so1441486ieb.14 for ; Wed, 13 Nov 2013 13:29:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YW4ucK7brZMjiQZEdapcbhnpF0RF8Ez961cdPncbQPA=; b=TI4FG1+GtAUhltmPp7c9YX3JEypyJFs0F4Wo+oVsygeWIcpMgy087BjE1WbyhssfCY Kpjamr6TGCM7s1hJSlasrz2GFhHuAv2f2nIpypaDoi9rrpsT76I6vfzz1HLVSdFlU9dl 0QveFM7cP9tKRNHNeFjIOA3dnRwAzroYl31EVxIEOr/5earOz7tbdGSDK9VFhmlgcVNr HDftm+NFXHhiITSn8OmxlXBHb+Hxox491ecRO3Z2fcYBA3/kBJ+lUwR1RuIFTPrCSmko z8NbBlroVqKAsJWCt5MSIVWValuGP3J//bxaKX0Pd80ceQweK/w05iFE12Tm/09CKTse aJCg== X-Gm-Message-State: ALoCoQmPqttNufxHxA0tLNgHRJyk4xeq3iZY2lIlacNRHQCUmFK1Y4qRgrMR7pNdKcrnemztzkRT X-Received: by 10.50.13.9 with SMTP id d9mr19957658igc.25.1384378148376; Wed, 13 Nov 2013 13:29:08 -0800 (PST) Received: from localhost.localdomain (dhcp57.hum.iit.edu. [216.47.158.57]) by mx.google.com with ESMTPSA id x6sm32266496igb.3.2013.11.13.13.29.04 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 13 Nov 2013 13:29:05 -0800 (PST) From: Spenser Gilliland To: buildroot@busybox.net Date: Wed, 13 Nov 2013 15:28:45 -0600 Message-Id: <1384378130-8599-3-git-send-email-spenser@gillilanding.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1384378130-8599-1-git-send-email-spenser@gillilanding.com> References: <1384378130-8599-1-git-send-email-spenser@gillilanding.com> Cc: thomas.petazzoni@free-electrons.com, Mischa.Jonker@synopsys.com Subject: [Buildroot] [PATCH v3 2/7] gcc: add microblaze internal toolchain X-BeenThere: buildroot@busybox.net X-Mailman-Version: 2.1.14 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: buildroot-bounces@busybox.net Sender: buildroot-bounces@busybox.net Signed-off-by: Spenser Gilliland --- package/gcc/Config.in.host | 23 +++++++++++++++-------- package/gcc/gcc.mk | 3 +++ 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/package/gcc/Config.in.host b/package/gcc/Config.in.host index 2f04457..186ba80 100644 --- a/package/gcc/Config.in.host +++ b/package/gcc/Config.in.host @@ -8,6 +8,7 @@ choice default BR2_GCC_VERSION_4_4_X if BR2_sparc_sparchfleon || BR2_sparc_sparchfleonv8 || BR2_sparc_sparcsfleon || BR2_sparc_sparcsfleonv8 default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32 default BR2_GCC_VERSION_4_8_ARC if BR2_arc + default BR2_GCC_VERSION_4_9_MICROBLAZE if BR2_microblaze default BR2_GCC_VERSION_4_5_X if BR2_bfin default BR2_GCC_VERSION_4_7_X help @@ -18,12 +19,12 @@ choice bool "gcc 4.2.2-avr32-2.1.5" config BR2_GCC_VERSION_4_3_X - depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 depends on !BR2_ARM_EABIHF bool "gcc 4.3.x" config BR2_GCC_VERSION_4_4_X - depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 bool "gcc 4.4.x" # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF @@ -31,24 +32,24 @@ choice depends on !BR2_ARM_FPU_VFPV4 && !BR2_ARM_FPU_VFPV4D16 config BR2_GCC_VERSION_4_5_X - depends on !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 select BR2_GCC_NEEDS_MPC # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF bool "gcc 4.5.x" config BR2_GCC_VERSION_4_6_X - depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 select BR2_GCC_NEEDS_MPC bool "gcc 4.6.x" config BR2_GCC_VERSION_4_7_X - depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 select BR2_GCC_NEEDS_MPC bool "gcc 4.7.x" config BR2_GCC_VERSION_4_8_X - depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 select BR2_GCC_NEEDS_MPC bool "gcc 4.8.x" @@ -57,8 +58,13 @@ choice select BR2_GCC_NEEDS_MPC bool "gcc 4.8-arc" + config BR2_GCC_VERSION_4_9_MICROBLAZE + depends on BR2_microblaze + select BR2_GCC_NEEDS_MPC + bool "gcc 4.9-microblaze" + config BR2_GCC_VERSION_SNAP - depends on !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 select BR2_GCC_NEEDS_MPC bool "gcc snapshot" endchoice @@ -91,6 +97,7 @@ config BR2_GCC_VERSION default "4.7.3" if BR2_GCC_VERSION_4_7_X default "4.8.2" if BR2_GCC_VERSION_4_8_X default "7466697995233cc3aab5b9427bf843e3c7fabd80" if BR2_GCC_VERSION_4_8_ARC + default "b93bb009e021aba64dd4b8cdb0bbc5a176c55543" if BR2_GCC_VERSION_4_9_MICROBLAZE default BR2_GCC_SNAP_DATE if BR2_GCC_VERSION_SNAP config BR2_EXTRA_GCC_CONFIG_OPTIONS @@ -143,7 +150,7 @@ config BR2_GCC_ENABLE_TLS config BR2_GCC_ENABLE_OPENMP bool "Enable compiler OpenMP support" - depends on !BR2_PTHREADS_NONE && !BR2_avr32 && !BR2_arc + depends on !BR2_PTHREADS_NONE && !BR2_avr32 && !BR2_arc && !BR2_microblaze help Enable OpenMP support for the compiler diff --git a/package/gcc/gcc.mk b/package/gcc/gcc.mk index e8f5ee1..236297d 100644 --- a/package/gcc/gcc.mk +++ b/package/gcc/gcc.mk @@ -22,6 +22,9 @@ GCC_SITE = ftp://www.at91.com/pub/buildroot/ else ifeq ($(BR2_arc),y) GCC_SITE = $(call github,foss-for-synopsys-dwc-arc-processors,gcc,$(GCC_VERSION)) GCC_SOURCE = gcc-$(GCC_VERSION).tar.gz +else ifeq ($(BR2_microblaze),y) +GCC_SITE = $(call github,Xilinx,gcc,$(GCC_VERSION)) +GCC_SOURCE = gcc-$(GCC_VERSION).tar.gz else GCC_SITE = $(BR2_GNU_MIRROR:/=)/gcc/gcc-$(GCC_VERSION) endif