diff mbox series

[RFC,4/7] asm/head: use HSRR exception registers in FIXUP_ENDIAN

Message ID 20180921080511.22026-5-npiggin@gmail.com
State Superseded
Headers show
Series virtual memory patches | expand

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Commit Message

Nicholas Piggin Sept. 21, 2018, 8:05 a.m. UTC
Taken from the Linux FIXUP_ENDIAN_HV macro, use the HSRR registers in
FIXUP_ENDIAN. This allows the 0x100 exception handler (the single user
of the macro) to preserve SRR registers and potentially recover, debug,
or do something useful with them.

This also allows the maco to be used in code with MSR[RI]=1, if the need
arises.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 asm/head.S | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/asm/head.S b/asm/head.S
index 8b9c0483..b7569d24 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -472,17 +472,18 @@  call_relocate:
 1:	/* Fatal relocate failure */
 	attn
 
-#define FIXUP_ENDIAN                                              \
-       tdi   0,0,0x48;   /* Reverse endian of b . + 8          */ \
-       b     $+36;       /* Skip trampoline if endian is good  */ \
-       .long 0x05009f42; /* bcl 20,31,$+4                      */ \
-       .long 0xa602487d; /* mflr r10                           */ \
-       .long 0x1c004a39; /* addi r10,r10,28                    */ \
-       .long 0xa600607d; /* mfmsr r11                          */ \
-       .long 0x01006b69; /* xori r11,r11,1                     */ \
-       .long 0xa6035a7d; /* mtsrr0 r10                         */ \
-       .long 0xa6037b7d; /* mtsrr1 r11                         */ \
-       .long 0x2400004c  /* rfid                               */
+#define FIXUP_ENDIAN						   \
+	tdi   0,0,0x48;	  /* Reverse endian of b . + 8		*/ \
+	b     191f;	  /* Skip trampoline if endian is good	*/ \
+	.long 0xa600607d; /* mfmsr r11				*/ \
+	.long 0x01006b69; /* xori r11,r11,1			*/ \
+	.long 0x05009f42; /* bcl 20,31,$+4			*/ \
+	.long 0xa602487d; /* mflr r10				*/ \
+	.long 0x14004a39; /* addi r10,r10,20			*/ \
+	.long 0xa64b5a7d; /* mthsrr0 r10			*/ \
+	.long 0xa64b7b7d; /* mthsrr1 r11			*/ \
+	.long 0x2402004c; /* hrfid				*/ \
+191:
 
 /* This is a little piece of code that is copied down to
  * 0x100 for handling power management wakeups