| Message ID | 20180828165059.55223-1-mika.westerberg@linux.intel.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash | expand |
On 08/28/2018 06:50 PM, Mika Westerberg wrote: > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > ID to the driver list of supported devices. > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> This should probably go through trivial patches ML, no ? Also, CC Stable. > --- > drivers/mtd/spi-nor/intel-spi-pci.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c > index c0976f2e3dd1..872b40922608 100644 > --- a/drivers/mtd/spi-nor/intel-spi-pci.c > +++ b/drivers/mtd/spi-nor/intel-spi-pci.c > @@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) > static const struct pci_device_id intel_spi_pci_ids[] = { > { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, > { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, > { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, > { }, >
On Tue, Aug 28, 2018 at 06:56:38PM +0200, Marek Vasut wrote: > On 08/28/2018 06:50 PM, Mika Westerberg wrote: > > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > > ID to the driver list of supported devices. > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > This should probably go through trivial patches ML, no ? Hmm, what do you mean? This is not a typo fix or similar but adds a new PCI ID to the driver. > Also, CC Stable. OK. > > --- > > drivers/mtd/spi-nor/intel-spi-pci.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c > > index c0976f2e3dd1..872b40922608 100644 > > --- a/drivers/mtd/spi-nor/intel-spi-pci.c > > +++ b/drivers/mtd/spi-nor/intel-spi-pci.c > > @@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) > > static const struct pci_device_id intel_spi_pci_ids[] = { > > { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, > > + { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, > > { }, > > > > > -- > Best regards, > Marek Vasut
On 08/28/2018 06:59 PM, Mika Westerberg wrote: > On Tue, Aug 28, 2018 at 06:56:38PM +0200, Marek Vasut wrote: >> On 08/28/2018 06:50 PM, Mika Westerberg wrote: >>> Intel Ice Lake exposes the SPI serial flash controller as a PCI device >>> in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI >>> ID to the driver list of supported devices. >>> >>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> >> >> This should probably go through trivial patches ML, no ? > > Hmm, what do you mean? This is not a typo fix or similar but adds a new > PCI ID to the driver. I mean, adding PCI IDs might be considered trivial. But if you want it to go through MTD, fine: Acked-by: Marek Vasut <marek.vasut@gmail.com> >> Also, CC Stable. > > OK. > >>> --- >>> drivers/mtd/spi-nor/intel-spi-pci.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c >>> index c0976f2e3dd1..872b40922608 100644 >>> --- a/drivers/mtd/spi-nor/intel-spi-pci.c >>> +++ b/drivers/mtd/spi-nor/intel-spi-pci.c >>> @@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) >>> static const struct pci_device_id intel_spi_pci_ids[] = { >>> { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, >>> { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, >>> + { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, >>> { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, >>> { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, >>> { }, >>> >> >> >> -- >> Best regards, >> Marek Vasut
On Tue, Aug 28, 2018 at 09:20:17PM +0200, Marek Vasut wrote: > On 08/28/2018 06:59 PM, Mika Westerberg wrote: > > On Tue, Aug 28, 2018 at 06:56:38PM +0200, Marek Vasut wrote: > >> On 08/28/2018 06:50 PM, Mika Westerberg wrote: > >>> Intel Ice Lake exposes the SPI serial flash controller as a PCI device > >>> in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > >>> ID to the driver list of supported devices. > >>> > >>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > >> > >> This should probably go through trivial patches ML, no ? > > > > Hmm, what do you mean? This is not a typo fix or similar but adds a new > > PCI ID to the driver. > > I mean, adding PCI IDs might be considered trivial. But if you want it > to go through MTD, fine: > > Acked-by: Marek Vasut <marek.vasut@gmail.com> Thanks!
Hi Marek, On Tue, 28 Aug 2018 18:56:38 +0200 Marek Vasut <marek.vasut@gmail.com> wrote: > On 08/28/2018 06:50 PM, Mika Westerberg wrote: > > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > > ID to the driver list of supported devices. > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > This should probably go through trivial patches ML, no ? Nope, it should go through the spi-nor tree. Actually, even for trivial fixes like typos, I prefer to take them directly to avoid possible future conflicts in case something changes near the typo. > Also, CC Stable. Why? It's adding a new entry in pci_ids[] table, it looks like supporting new HW to me, not fixing a bug. Regards, Boris > > > --- > > drivers/mtd/spi-nor/intel-spi-pci.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c > > index c0976f2e3dd1..872b40922608 100644 > > --- a/drivers/mtd/spi-nor/intel-spi-pci.c > > +++ b/drivers/mtd/spi-nor/intel-spi-pci.c > > @@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) > > static const struct pci_device_id intel_spi_pci_ids[] = { > > { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, > > + { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, > > { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, > > { }, > > > >
On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > Hi Marek, > > On Tue, 28 Aug 2018 18:56:38 +0200 > Marek Vasut <marek.vasut@gmail.com> wrote: > > > On 08/28/2018 06:50 PM, Mika Westerberg wrote: > > > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > > > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > > > ID to the driver list of supported devices. > > > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > > > This should probably go through trivial patches ML, no ? > > Nope, it should go through the spi-nor tree. Actually, even for trivial > fixes like typos, I prefer to take them directly to avoid possible > future conflicts in case something changes near the typo. > > > Also, CC Stable. > > Why? It's adding a new entry in pci_ids[] table, it looks like > supporting new HW to me, not fixing a bug. So you can boot/use new HW with stable kernels. Stable kernels would become useless fairly quickly otherwise. HW enablement patches are OK when they don't affect existing HW by much. Jocke
On Wed, 29 Aug 2018 10:28:05 +0000 Joakim Tjernlund <Joakim.Tjernlund@infinera.com> wrote: > On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: > > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > > > > Hi Marek, > > > > On Tue, 28 Aug 2018 18:56:38 +0200 > > Marek Vasut <marek.vasut@gmail.com> wrote: > > > > > On 08/28/2018 06:50 PM, Mika Westerberg wrote: > > > > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > > > > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > > > > ID to the driver list of supported devices. > > > > > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > > > > > This should probably go through trivial patches ML, no ? > > > > Nope, it should go through the spi-nor tree. Actually, even for trivial > > fixes like typos, I prefer to take them directly to avoid possible > > future conflicts in case something changes near the typo. > > > > > Also, CC Stable. > > > > Why? It's adding a new entry in pci_ids[] table, it looks like > > supporting new HW to me, not fixing a bug. > > So you can boot/use new HW with stable kernels. Stable kernels would become > useless fairly quickly otherwise. > HW enablement patches are OK when they don't affect existing HW by much. Where did you get that from? I've always been told that Cc-ing stable was reserved for bug fixes.
On 08/29/2018 12:33 PM, Boris Brezillon wrote: > On Wed, 29 Aug 2018 10:28:05 +0000 > Joakim Tjernlund <Joakim.Tjernlund@infinera.com> wrote: > >> On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: >>> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. >>> >>> >>> Hi Marek, >>> >>> On Tue, 28 Aug 2018 18:56:38 +0200 >>> Marek Vasut <marek.vasut@gmail.com> wrote: >>> >>>> On 08/28/2018 06:50 PM, Mika Westerberg wrote: >>>>> Intel Ice Lake exposes the SPI serial flash controller as a PCI device >>>>> in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI >>>>> ID to the driver list of supported devices. >>>>> >>>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> >>>> >>>> This should probably go through trivial patches ML, no ? >>> >>> Nope, it should go through the spi-nor tree. Actually, even for trivial >>> fixes like typos, I prefer to take them directly to avoid possible >>> future conflicts in case something changes near the typo. >>> >>>> Also, CC Stable. >>> >>> Why? It's adding a new entry in pci_ids[] table, it looks like >>> supporting new HW to me, not fixing a bug. >> >> So you can boot/use new HW with stable kernels. Stable kernels would become >> useless fairly quickly otherwise. >> HW enablement patches are OK when they don't affect existing HW by much. > > Where did you get that from? I've always been told that Cc-ing stable > was reserved for bug fixes. Same rule applies to new USB IDs , it's an exception.
On Wed, 2018-08-29 at 12:33 +0200, Boris Brezillon wrote: > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > On Wed, 29 Aug 2018 10:28:05 +0000 > Joakim Tjernlund <Joakim.Tjernlund@infinera.com> wrote: > > > On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: > > > CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > > > > > > > > > Hi Marek, > > > > > > On Tue, 28 Aug 2018 18:56:38 +0200 > > > Marek Vasut <marek.vasut@gmail.com> wrote: > > > > > > > On 08/28/2018 06:50 PM, Mika Westerberg wrote: > > > > > Intel Ice Lake exposes the SPI serial flash controller as a PCI device > > > > > in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > > > > > ID to the driver list of supported devices. > > > > > > > > > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > > > > > > > This should probably go through trivial patches ML, no ? > > > > > > Nope, it should go through the spi-nor tree. Actually, even for trivial > > > fixes like typos, I prefer to take them directly to avoid possible > > > future conflicts in case something changes near the typo. > > > > > > > Also, CC Stable. > > > > > > Why? It's adding a new entry in pci_ids[] table, it looks like > > > supporting new HW to me, not fixing a bug. > > > > So you can boot/use new HW with stable kernels. Stable kernels would become > > useless fairly quickly otherwise. > > HW enablement patches are OK when they don't affect existing HW by much. > > Where did you get that from? I've always been told that Cc-ing stable > was reserved for bug fixes. From following linux dev lists. I don't have a reference, sorry. If you look at the commit log for stable kernels you will see that a lot more than pure bug fixes. Sometimes backport of new infra structure to allow for easy backporting of fixes too. Jocke
On 08/29/2018 12:44 PM, Joakim Tjernlund wrote: > On Wed, 2018-08-29 at 12:33 +0200, Boris Brezillon wrote: >> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. >> >> >> On Wed, 29 Aug 2018 10:28:05 +0000 >> Joakim Tjernlund <Joakim.Tjernlund@infinera.com> wrote: >> >>> On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: >>>> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. >>>> >>>> >>>> Hi Marek, >>>> >>>> On Tue, 28 Aug 2018 18:56:38 +0200 >>>> Marek Vasut <marek.vasut@gmail.com> wrote: >>>> >>>>> On 08/28/2018 06:50 PM, Mika Westerberg wrote: >>>>>> Intel Ice Lake exposes the SPI serial flash controller as a PCI device >>>>>> in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI >>>>>> ID to the driver list of supported devices. >>>>>> >>>>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> >>>>> >>>>> This should probably go through trivial patches ML, no ? >>>> >>>> Nope, it should go through the spi-nor tree. Actually, even for trivial >>>> fixes like typos, I prefer to take them directly to avoid possible >>>> future conflicts in case something changes near the typo. >>>> >>>>> Also, CC Stable. >>>> >>>> Why? It's adding a new entry in pci_ids[] table, it looks like >>>> supporting new HW to me, not fixing a bug. >>> >>> So you can boot/use new HW with stable kernels. Stable kernels would become >>> useless fairly quickly otherwise. >>> HW enablement patches are OK when they don't affect existing HW by much. >> >> Where did you get that from? I've always been told that Cc-ing stable >> was reserved for bug fixes. > > From following linux dev lists. I don't have a reference, sorry. > > If you look at the commit log for stable kernels you will see that a lot more > than pure bug fixes. Sometimes backport of new infra structure to > allow for easy backporting of fixes too. Documentation/process/stable-kernel-rules.rst 24 - New device IDs and quirks are also accepted.
On Wed, 29 Aug 2018 12:54:22 +0200 Marek Vasut <marek.vasut@gmail.com> wrote: > On 08/29/2018 12:44 PM, Joakim Tjernlund wrote: > > On Wed, 2018-08-29 at 12:33 +0200, Boris Brezillon wrote: > >> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > >> > >> > >> On Wed, 29 Aug 2018 10:28:05 +0000 > >> Joakim Tjernlund <Joakim.Tjernlund@infinera.com> wrote: > >> > >>> On Wed, 2018-08-29 at 11:17 +0200, Boris Brezillon wrote: > >>>> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe. > >>>> > >>>> > >>>> Hi Marek, > >>>> > >>>> On Tue, 28 Aug 2018 18:56:38 +0200 > >>>> Marek Vasut <marek.vasut@gmail.com> wrote: > >>>> > >>>>> On 08/28/2018 06:50 PM, Mika Westerberg wrote: > >>>>>> Intel Ice Lake exposes the SPI serial flash controller as a PCI device > >>>>>> in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI > >>>>>> ID to the driver list of supported devices. > >>>>>> > >>>>>> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > >>>>> > >>>>> This should probably go through trivial patches ML, no ? > >>>> > >>>> Nope, it should go through the spi-nor tree. Actually, even for trivial > >>>> fixes like typos, I prefer to take them directly to avoid possible > >>>> future conflicts in case something changes near the typo. > >>>> > >>>>> Also, CC Stable. > >>>> > >>>> Why? It's adding a new entry in pci_ids[] table, it looks like > >>>> supporting new HW to me, not fixing a bug. > >>> > >>> So you can boot/use new HW with stable kernels. Stable kernels would become > >>> useless fairly quickly otherwise. > >>> HW enablement patches are OK when they don't affect existing HW by much. > >> > >> Where did you get that from? I've always been told that Cc-ing stable > >> was reserved for bug fixes. > > > > From following linux dev lists. I don't have a reference, sorry. > > > > If you look at the commit log for stable kernels you will see that a lot more > > than pure bug fixes. Sometimes backport of new infra structure to > > allow for easy backporting of fixes too. > > Documentation/process/stable-kernel-rules.rst > 24 - New device IDs and quirks are also accepted. > > Okay. I didn't know that. Thanks, Boris
diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c b/drivers/mtd/spi-nor/intel-spi-pci.c index c0976f2e3dd1..872b40922608 100644 --- a/drivers/mtd/spi-nor/intel-spi-pci.c +++ b/drivers/mtd/spi-nor/intel-spi-pci.c @@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) static const struct pci_device_id intel_spi_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, { },
Intel Ice Lake exposes the SPI serial flash controller as a PCI device in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> --- drivers/mtd/spi-nor/intel-spi-pci.c | 1 + 1 file changed, 1 insertion(+)