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[v12,1/5] dt-bindings: media: extend interface documentation for DSI and DP

Message ID 1529584329-632-2-git-send-email-spanda@codeaurora.org
State Not Applicable, archived
Headers show
Series Add suppport for sn65dsi86 bridge chip and Innolux 2k edp panel | expand

Commit Message

Sandeep Panda June 21, 2018, 12:32 p.m. UTC
Properties like data-lanes, clock-noncontinuous and lane-polarities
are applicable to DSI and DisplayPort interface also. So update the
documentation to mention the same.

Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/media/video-interfaces.txt | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)
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Patch

diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index 852041a7480c..f53d8e49f489 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -99,15 +99,16 @@  Optional endpoint properties
   determines the logical lane number, while the value of an entry indicates
   physical lane, e.g. for 2-lane MIPI CSI-2 bus we could have
   "data-lanes = <1 2>;", assuming the clock lane is on hardware lane 0.
-  This property is valid for serial busses only (e.g. MIPI CSI-2).
+  This property is valid for serial busses only (e.g. MIPI CSI-2, MIPI DSI,
+  DisplayPort).
 - clock-lanes: an array of physical clock lane indexes. Position of an entry
   determines the logical lane number, while the value of an entry indicates
   physical lane, e.g. for a MIPI CSI-2 bus we could have "clock-lanes = <0>;",
   which places the clock lane on hardware lane 0. This property is valid for
   serial busses only (e.g. MIPI CSI-2). Note that for the MIPI CSI-2 bus this
   array contains only one entry.
-- clock-noncontinuous: a boolean property to allow MIPI CSI-2 non-continuous
-  clock mode.
+- clock-noncontinuous: a boolean property to allow non-continuous clock mode.
+  This property is valid for serial busses (e.g. MIPI CSI-2, MIPI DSI and DisplayPort).
 - link-frequencies: Allowed data bus frequencies. For MIPI CSI-2, for
   instance, this is the actual frequency of the bus, not bits per clock per
   lane value. An array of 64-bit unsigned integers.
@@ -116,7 +117,8 @@  Optional endpoint properties
   Valid values are 0 (normal) and 1 (inverted). The length of the array
   should be the combined length of data-lanes and clock-lanes properties.
   If the lane-polarities property is omitted, the value must be interpreted
-  as 0 (normal). This property is valid for serial busses only.
+  as 0 (normal). This property is valid for serial busses only (e.g. MIPI CSI-2,
+  MIPI DSI, DisplayPort).
 - strobe: Whether the clock signal is used as clock (0) or strobe (1). Used
   with CCP2, for instance.