diff mbox series

[i386] : Fix PR 85073: extra check after BLSR

Message ID CAFULd4a=goKN=AdL+si2sPxbD1=C6SjwXRX8ogKoRakDqejtRQ@mail.gmail.com
State New
Headers show
Series [i386] : Fix PR 85073: extra check after BLSR | expand

Commit Message

Uros Bizjak March 26, 2018, 7:30 p.m. UTC 
2018-03-26  Uros Bizjak  <ubizjak@gmail.com>

    PR target/85073
    * config/i386/i386.md (*bmi_blsr_<mode>_cmp): New insn pattern.
    (*bmi_blsr_<mode>_ccz): Ditto.

testsuite/ChangeLog:

2018-03-26  Uros Bizjak  <ubizjak@gmail.com>

    PR target/85073
    * gcc.target/i386/pr85073.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.

Uros.
diff mbox series

Patch

Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 258856)
+++ config/i386/i386.md	(working copy)
@@ -13774,6 +13774,43 @@ 
    (set_attr "btver2_decode" "double")
    (set_attr "mode" "<MODE>")])
 
+(define_insn "*bmi_blsr_<mode>_cmp"
+  [(set (reg:CCZ FLAGS_REG)
+	(compare:CCZ
+	  (and:SWI48
+	    (plus:SWI48
+	      (match_operand:SWI48 1 "nonimmediate_operand" "rm")
+	      (const_int -1))
+	    (match_dup 1))
+	  (const_int 0)))
+   (set (match_operand:SWI48 0 "register_operand" "=r")
+	(and:SWI48
+	  (plus:SWI48
+	    (match_dup 1)
+	    (const_int -1))
+	  (match_dup 1)))]
+   "TARGET_BMI"
+   "blsr\t{%1, %0|%0, %1}"
+  [(set_attr "type" "bitmanip")
+   (set_attr "btver2_decode" "double")
+   (set_attr "mode" "<MODE>")])
+
+(define_insn "*bmi_blsr_<mode>_ccz"
+  [(set (reg:CCZ FLAGS_REG)
+	(compare:CCZ
+	  (and:SWI48
+	    (plus:SWI48
+	      (match_operand:SWI48 1 "nonimmediate_operand" "rm")
+	      (const_int -1))
+	    (match_dup 1))
+	  (const_int 0)))
+   (clobber (match_scratch:SWI48 0 "=r"))]
+   "TARGET_BMI"
+   "blsr\t{%1, %0|%0, %1}"
+  [(set_attr "type" "bitmanip")
+   (set_attr "btver2_decode" "double")
+   (set_attr "mode" "<MODE>")])
+
 ;; BMI2 instructions.
 (define_expand "bmi2_bzhi_<mode>3"
   [(parallel
Index: testsuite/gcc.target/i386/pr85073.c
===================================================================
--- testsuite/gcc.target/i386/pr85073.c	(nonexistent)
+++ testsuite/gcc.target/i386/pr85073.c	(working copy)
@@ -0,0 +1,18 @@ 
+/* PR target/85073 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mbmi" } */
+
+int
+foo (unsigned x)
+{
+  int c = 0;
+  while (x)
+    {
+      c += 1;
+      x = (x - 1) & x;
+    }
+
+  return c;
+}
+
+/* { dg-final { scan-assembler-times "test" 1 } } */