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[U-Boot,v2,04/20] ARC: introduce is_isa_X functions

Message ID	20180321125905.14897-5-Eugeniy.Paltsev@synopsys.com
State	Accepted, archived
Delegated to:	Alexey Brodkin
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> To: uboot-snps-arc@synopsys.com Date: Wed, 21 Mar 2018 15:58:49 +0300 Message-Id: <20180321125905.14897-5-Eugeniy.Paltsev@synopsys.com> In-Reply-To: <20180321125905.14897-1-Eugeniy.Paltsev@synopsys.com> References: <20180321125905.14897-1-Eugeniy.Paltsev@synopsys.com> Cc: u-boot@lists.denx.de, Alexey Brodkin <Alexey.Brodkin@synopsys.com>, Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Subject: [U-Boot] [PATCH v2 04/20] ARC: introduce is_isa_X functions Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	ARC: cache subsystem improvement/refactoring \| expand [U-Boot,v2,00/20] ARC: cache subsystem improvement/refactoring [U-Boot,v2,01/20] ARC: cache: move i$ entire operation to separate function [U-Boot,v2,02/20] ARC: cache: remove per-line I$ operations as unused [U-Boot,v2,03/20] ARC: cache: Add support of FLUSH_N_INV d$ operations [U-Boot,v2,04/20] ARC: introduce is_isa_X functions [U-Boot,v2,05/20] ARC: flush & invalidate D$ with a single command [U-Boot,v2,06/20] ARC: cache: move IOC initialization to separate function [U-Boot,v2,07/20] ARC: move BCR encodings to separate header file [U-Boot,v2,08/20] ARC: cache: allways check dcache status before entire/line operations [U-Boot,v2,09/20] ARC: cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef [U-Boot,v2,10/20] ARC: cache: move slc status check into slc_entire_op and slc_rgn_op [U-Boot,v2,11/20] ARC: cache: get rid of [slc, pae, icache, dcache]_exists global variables [U-Boot,v2,12/20] ARC: move cache global variables to global data struct [U-Boot,v2,13/20] ARC: cache: move pae exists check into slc_upper_region_init [U-Boot,v2,14/20] ARC: move IOC enabling to compile time options [U-Boot,v2,15/20] ARC: cache: implement [i, d]cache_enabled as separate functions [U-Boot,v2,16/20] ARC: cache: fix SLC operations when SLC is bypassed for data [U-Boot,v2,17/20] ARC: implement function to sync and cleanup caches [U-Boot,v2,18/20] ARC: cache: add additional configuration checks [U-Boot,v2,19/20] ARC: cache: add missing cache cleanup before cache disable [U-Boot,v2,20/20] ARC: cache: refactor arc_ioc_setup function

Commit Message

Eugeniy Paltsev March 21, 2018, 12:58 p.m. UTC

Introduce is_isa_arcv2 and is_isa_arcompact functions.
As this functions only check configuration options and return
compile-time constant they can be used instead of #ifdef's to
to write clear code.

So we can write
-------------->8---------------
if (is_isa_arcv2())
	ioc_configure();
-------------->8---------------
instead of
-------------->8---------------
ifdef CONFIG_ISA_ARCV2
	ioc_configure();
endif
-------------->8---------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
 arch/arc/include/asm/arcregs.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

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Patch

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 67f416305d..3a513149f5 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -8,6 +8,7 @@ 
 #define _ASM_ARC_ARCREGS_H
 
 #include <asm/cache.h>
+#include <config.h>
 
 /*
  * ARC architecture has additional address space - auxiliary registers.
@@ -88,6 +89,16 @@ 
 
 /* ARCNUM [15:8] - field to identify each core in a multi-core system */
 #define CPU_ID_GET()	((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
+
+static const inline int is_isa_arcv2(void)
+{
+	return IS_ENABLED(CONFIG_ISA_ARCV2);
+}
+
+static const inline int is_isa_arcompact(void)
+{
+	return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
+}
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_ARC_ARCREGS_H */