| Message ID | 1521342853-2941-1-git-send-email-Anson.Huang@nxp.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [1/2] clk: imx6sx: add missing lvds2 clock to the clock tree | expand |
On Sun, Mar 18, 2018 at 12:14 AM, Anson Huang <Anson.Huang@nxp.com> wrote: > diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts > index 72da5ac..83f7cac 100644 > --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts > +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts > @@ -18,6 +18,14 @@ > reg = <0x80000000 0x80000000>; > }; > > + clocks { > + codec_osc: anaclk2 { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <24576000>; > + }; > + }; The clocks container should be removed and the clock node could be put directly into the root node. Also, I do not see 'codec_osc' being used in this dts. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, Fabio Anson Huang Best Regards! > -----Original Message----- > From: Fabio Estevam [mailto:festevam@gmail.com] > Sent: Sunday, March 18, 2018 9:04 PM > To: Anson Huang <anson.huang@nxp.com> > Cc: Shawn Guo <shawnguo@kernel.org>; Sascha Hauer > <kernel@pengutronix.de>; Fabio Estevam <fabio.estevam@nxp.com>; Rob > Herring <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>; > Russell King - ARM Linux <linux@armlinux.org.uk>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; S.j. Wang > <shengjiu.wang@nxp.com>; dl-linux-imx <linux-imx@nxp.com>; moderated > list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE > <linux-arm-kernel@lists.infradead.org>; open list:OPEN FIRMWARE AND > FLATTENED DEVICE TREE BINDINGS <devicetree@vger.kernel.org>; linux-kernel > <linux-kernel@vger.kernel.org>; linux-clk <linux-clk@vger.kernel.org> > Subject: Re: [PATCH 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock > source > > On Sun, Mar 18, 2018 at 12:14 AM, Anson Huang <Anson.Huang@nxp.com> > wrote: > > > diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts > > b/arch/arm/boot/dts/imx6sx-sabreauto.dts > > index 72da5ac..83f7cac 100644 > > --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts > > +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts > > @@ -18,6 +18,14 @@ > > reg = <0x80000000 0x80000000>; > > }; > > > > + clocks { > > + codec_osc: anaclk2 { > > + #clock-cells = <0>; > > + compatible = "fixed-clock"; > > + clock-frequency = <24576000>; > > + }; > > + }; > > The clocks container should be removed and the clock node could be put directly > into the root node. > > Also, I do not see 'codec_osc' being used in this dts. This clock will be used by cs42888 codec, this patch is only to add basic clock source to complete the clock tree. Thanks. Anson.
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c index e6d389e..d180797 100644 --- a/drivers/clk/imx/clk-imx6sx.c +++ b/drivers/clk/imx/clk-imx6sx.c @@ -80,7 +80,7 @@ static const char *lvds_sels[] = { "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div", "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2", }; -static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", }; +static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", }; static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", }; static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", }; static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", }; @@ -160,6 +160,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) /* Clock source from external clock via CLK1 PAD */ clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0); + clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0); np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); base = of_iomap(np, 0); @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19); clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12)); + clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out", "lvds2_sel", base + 0x160, 11, BIT(13)); clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10)); + clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11)); clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, base + 0xe0, 0, 2, 0, clk_enet_ref_table, @@ -270,6 +273,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) /* name reg shift width parent_names num_parents */ clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); + clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); np = ccm_node; base = of_iomap(np, 0); diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h index 36f0324..cd2d6c5 100644 --- a/include/dt-bindings/clock/imx6sx-clock.h +++ b/include/dt-bindings/clock/imx6sx-clock.h @@ -275,6 +275,10 @@ #define IMX6SX_PLL6_BYPASS 262 #define IMX6SX_PLL7_BYPASS 263 #define IMX6SX_CLK_SPDIF_GCLK 264 -#define IMX6SX_CLK_CLK_END 265 +#define IMX6SX_CLK_LVDS2_SEL 265 +#define IMX6SX_CLK_LVDS2_OUT 266 +#define IMX6SX_CLK_LVDS2_IN 267 +#define IMX6SX_CLK_ANACLK2 268 +#define IMX6SX_CLK_CLK_END 269 #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */