| Message ID | 1520864802-10948-1-git-send-email-geert+renesas@glider.be |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group | expand |
On Mon, Mar 12, 2018 at 03:26:42PM +0100, Geert Uytterhoeven wrote: > The pin controller drivers for all R-Car Gen2 SoCs have entries for the > EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2. > > Add the missing pin to restore consistency. > > Note that technically TX_ER is an optional signal in the MII bus, and > thus could have its own group, but this is currently not supported by > any R-Car Gen2 pin controller driver. > > Fixes: 19ef697d1eb7be06 ("sh-pfc: r8a7790: add EtherAVB pin groups") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > There are no upstream users of EtherAVB MII. > > To be queued im sh-pfc-for-v4.17. I'm not sure this warrants a fixes tag, but in any case: Reviewed-by: Simon Horman <horms+renesas@verge.net.au> -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index b769c05480da681e..f6332f247368fcb8 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -1835,8 +1835,8 @@ static const unsigned int avb_mii_pins[] = { RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), - RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 10), - RCAR_GP_PIN(3, 12), + RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 12), }; static const unsigned int avb_mii_mux[] = { AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, @@ -1846,8 +1846,8 @@ static const unsigned int avb_mii_mux[] = { AVB_RXD3_MARK, AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, - AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_CLK_MARK, - AVB_COL_MARK, + AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK, + AVB_TX_CLK_MARK, AVB_COL_MARK, }; static const unsigned int avb_gmii_pins[] = { RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
The pin controller drivers for all R-Car Gen2 SoCs have entries for the EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2. Add the missing pin to restore consistency. Note that technically TX_ER is an optional signal in the MII bus, and thus could have its own group, but this is currently not supported by any R-Car Gen2 pin controller driver. Fixes: 19ef697d1eb7be06 ("sh-pfc: r8a7790: add EtherAVB pin groups") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- There are no upstream users of EtherAVB MII. To be queued im sh-pfc-for-v4.17. --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)