Message ID | 1518456406-21564-3-git-send-email-pchandru@nvidia.com |
---|---|
State | Deferred |
Headers | show |
Series | Refactor and add AHCI support for tegra210 | expand |
On Mon, Feb 12, 2018 at 10:56:41PM +0530, Preetham Chandru Ramchandra wrote: > From: Preetham Ramchandra <pchandru@nvidia.com> > > Add sata node to the Tegra210 device tree, and > enable the device and assign board-specific > properties on Jetson TX1. > Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Tags such as Signed-off-by: should be in a separate paragraph, so the above is missing a blank line before the Signed-off-by:. > --- > v7: > * Change commit message to reflect accordingly > v4: > * Fixed missing space after 'AUX' > --- > arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 6 ++++++ > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 16 ++++++++++++++++ > 2 files changed, 22 insertions(+) I prefer these to be two separate patches, one for the SoC .dtsi and another for the P2597 carrier. > diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi > index d67ef4319f3b..2aa2979cd6b5 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi > @@ -1325,6 +1325,12 @@ > status = "okay"; > }; > > + sata@70020000 { > + status = "okay"; > + phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>; > + phy-names = "sata-0"; > + }; > + > padctl@7009f000 { > status = "okay"; > > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > index 9c2402108772..bf72db5386a5 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > @@ -798,6 +798,22 @@ > #iommu-cells = <1>; > }; > > + sata@70020000 { > + compatible = "nvidia,tegra210-ahci"; > + reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ > + <0x0 0x70020000 0x0 0x7000>, /* SATA */ > + <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ > + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA210_CLK_SATA>, > + <&tegra_car TEGRA210_CLK_SATA_OOB>; Nit: these are not properly aligned. Thierry
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi index d67ef4319f3b..2aa2979cd6b5 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi @@ -1325,6 +1325,12 @@ status = "okay"; }; + sata@70020000 { + status = "okay"; + phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>; + phy-names = "sata-0"; + }; + padctl@7009f000 { status = "okay"; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 9c2402108772..bf72db5386a5 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -798,6 +798,22 @@ #iommu-cells = <1>; }; + sata@70020000 { + compatible = "nvidia,tegra210-ahci"; + reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ + <0x0 0x70020000 0x0 0x7000>, /* SATA */ + <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA210_CLK_SATA>, + <&tegra_car TEGRA210_CLK_SATA_OOB>; + clock-names = "sata", "sata-oob"; + resets = <&tegra_car 124>, + <&tegra_car 123>, + <&tegra_car 129>; + reset-names = "sata", "sata-oob", "sata-cold"; + status = "disabled"; + }; + hda@70030000 { compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; reg = <0x0 0x70030000 0x0 0x10000>;