[LEDE-DEV,3/3] mvebu: Make kernel 4.14 patches apply

Message ID 20180107175649.4914-4-hauke@hauke-m.de
State Superseded
Delegated to: Hauke Mehrtens
Headers show
Series
  • mvebu: add kernel 4.14 support
Related show

Commit Message

Hauke Mehrtens Jan. 7, 2018, 5:56 p.m.
This modifies the patches to make them apply with kernel 4.14
This also replaces the old sfp and phylink patches with new versions
from Russell's clearfog-4.13 branch
http://git.arm.linux.org.uk/cgit/linux-arm.git/log/?h=clearfog-4.13

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 target/linux/mvebu/config-4.14                     |   61 +-
 .../mvebu/patches-4.14/002-add_powertables.patch   | 1470 +++++++++----------
 .../mvebu/patches-4.14/003-add_switch_nodes.patch  |   10 +-
 .../004-add_sata_disk_activity_trigger.patch       |   28 +-
 .../mvebu/patches-4.14/010-build_new_dtbs.patch    |   11 -
 .../mvebu/patches-4.14/100-find_active_root.patch  |    2 +-
 .../mvebu/patches-4.14/102-revert_i2c_delay.patch  |   20 +-
 .../104-linksys_mamba_disable_keep_config.patch    |    2 +-
 .../106-enable-bm-on-linksys-devices.patch         |  107 --
 .../110-pxa3xxx_revert_irq_thread.patch            |    4 +-
 .../120-net-mvneta-add-BQL-support.patch           |   83 --
 .../130-irqchip-armada-xp-backport.patch           |   17 -
 .../200-gpio_mvebu_add_limited_pwm_support.patch   |  433 ------
 ..._extend_mvebu_gpio_documentation_with_pwm.patch |   52 -
 ...mvebu_xp_add_pwm_properties_to_dtsi_files.patch |  149 --
 .../203-arm_mvebu_enable_pwm_in_defconfig.patch    |   18 -
 ...rt1900ac_use_pwm-fan_rather_than_gpio-fan.patch |   28 -
 .../patches-4.14/210-clearfog_switch_node.patch    |    2 +-
 ...armada388-clearfog-add-SFP-module-support.patch |   84 --
 .../300-mvneta-tx-queue-workaround.patch           |    9 +-
 ...bu-indicate-failure-to-enter-deeper-sleep.patch |   40 +
 ...ovide-a-hook-for-link-up-link-down-events.patch |  177 ---
 ...-phy-move-phy-MMD-accessors-to-phy-core.c.patch |  292 ----
 .../401-pci-mvebu-time-out-reset-on-link-up.patch  |   60 +
 ...e-phy_-read-write-_mmd-generic-MMD-access.patch |   97 --
 ...> 402-sfp-display-SFP-module-information.patch} |   20 +-
 ...tch => 403-net-mvneta-convert-to-phylink.patch} |  511 +++++--
 ...oid-setting-unsupported-EEE-advertisments.patch |   57 -
 .../404-net-mvneta-hack-fix-phy_interface.patch    |   28 +
 ...tart-phy-autonegotiation-after-EEE-advert.patch |   53 -
 ...isable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch} |   20 +-
 ...-phy-allow-EEE-with-SGMII-interface-modes.patch |   21 -
 ...mvneta-add-module-EEPROM-reading-support.patch} |   15 +-
 ...rove-phylib-correctness-for-non-autoneg-s.patch |  199 ---
 ...phy-add-802.3-clause-45-support-to-phylib.patch |  323 -----
 ...-fixed-phy-remove-fixed_phy_update_state.patch} |   10 +-
 ...hook-up-clause-45-autonegotiation-restart.patch |   54 -
 ...dule-eeprom-ethtool-access-into-netdev-co.patch |  181 +++
 ...n-t-double-read-clause-45-status-register.patch |   35 -
 ...409-sfp-use-netdev-sfp_bus-for-start-stop.patch |   34 +
 ...ow-settings-table-to-support-more-than-32.patch |  142 --
 ...-allow-marvell-10G-phy-support-to-use-SFP.patch |  130 ++
 ...it-out-PHY-speed-and-duplex-string-genera.patch |  103 --
 .../patches-4.14/411-sfp-add-sfp-compatible.patch  |   24 +
 ...armada388-clearfog-emmc-on-clearfog-base.patch} |   73 +-
 ...e-phy_lookup_setting-and-guts-of-phy_supp.patch |  329 -----
 ...ada388-clearfog-increase-speed-of-i2c0-to.patch |   42 +
 ...-phy-export-phy_start_machine-for-phylink.patch |   22 -
 ...armada388-clearfog-add-SFP-module-support.patch |   81 ++
 .../patches-4.14/414-phy-add-I2C-mdio-bus.patch    |  180 ---
 ...dts-armada388-clearfog-document-MPP-usage.patch |  124 ++
 .../415-phylink-add-phylink-infrastructure.patch   | 1120 ---------------
 .../416-phylink-add-hooks-for-SFP-support.patch    |  177 ---
 ...-sfp-add-phylink-based-SFP-module-support.patch | 1477 --------------------
 ...21-phylink-add-ethtool-nway_reset-support.patch |   44 -
 .../422-net-mvneta-add-nway_reset-support.patch    |   35 -
 .../423-phylink-add-flow-control-support.patch     |  232 ---
 ...neta-add-flow-control-support-via-phylink.patch |   76 -
 ...a-enable-flow-control-for-PHY-connections.patch |   28 -
 ...enable-flow-control-for-fixed-connections.patch |   32 -
 .../patches-4.14/427-phylink-add-EEE-support.patch |  116 --
 .../428-net-mvneta-add-EEE-support.patch           |  179 ---
 .../429-phylink-add-module-EEPROM-support.patch    |  123 --
 .../431-sfp-phylink-hook-up-eeprom-functions.patch |   65 -
 ...-marvell-88E1512-add-flow-control-support.patch |   24 -
 ...-marvell-88E1111-add-flow-control-support.patch |   22 -
 ...-marvell-88E1540-add-flow-control-support.patch |   22 -
 ...ropagate-PHY-interface-mode-to-MAC-driver.patch |  126 --
 ...37-phylink-ensure-link-drops-are-reported.patch |   52 -
 .../mvebu/patches-4.14/450-reprobe_sfp_phy.patch   |  119 --
 .../471-add-ClearFog-Base-device-tree-files.patch  |  540 -------
 ...a-solidrun-microsom-backport-improvements.patch |  185 ---
 ...473-fix-marvell-phy-initialization-issues.patch |   51 -
 73 files changed, 2016 insertions(+), 8896 deletions(-)
 delete mode 100644 target/linux/mvebu/patches-4.14/010-build_new_dtbs.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/106-enable-bm-on-linksys-devices.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/120-net-mvneta-add-BQL-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/130-irqchip-armada-xp-backport.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/200-gpio_mvebu_add_limited_pwm_support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/203-arm_mvebu_enable_pwm_in_defconfig.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch
 create mode 100644 target/linux/mvebu/patches-4.14/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/400-phy-provide-a-hook-for-link-up-link-down-events.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch
 create mode 100644 target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch
 rename target/linux/mvebu/patches-4.14/{418-sfp-display-SFP-module-information.patch => 402-sfp-display-SFP-module-information.patch} (90%)
 rename target/linux/mvebu/patches-4.14/{419-net-mvneta-convert-to-phylink.patch => 403-net-mvneta-convert-to-phylink.patch} (66%)
 delete mode 100644 target/linux/mvebu/patches-4.14/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch
 create mode 100644 target/linux/mvebu/patches-4.14/404-net-mvneta-hack-fix-phy_interface.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch
 rename target/linux/mvebu/patches-4.14/{420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch => 405-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch} (74%)
 delete mode 100644 target/linux/mvebu/patches-4.14/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch
 rename target/linux/mvebu/patches-4.14/{430-net-mvneta-add-module-EEPROM-reading-support.patch => 406-net-mvneta-add-module-EEPROM-reading-support.patch} (69%)
 delete mode 100644 target/linux/mvebu/patches-4.14/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/407-net-phy-add-802.3-clause-45-support-to-phylib.patch
 copy target/linux/mvebu/{patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch => patches-4.14/407-phy-fixed-phy-remove-fixed_phy_update_state.patch} (88%)
 delete mode 100644 target/linux/mvebu/patches-4.14/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch
 create mode 100644 target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/409-net-phy-don-t-double-read-clause-45-status-register.patch
 create mode 100644 target/linux/mvebu/patches-4.14/409-sfp-use-netdev-sfp_bus-for-start-stop.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/410-net-phy-allow-settings-table-to-support-more-than-32.patch
 create mode 100644 target/linux/mvebu/patches-4.14/410-sfp-hack-allow-marvell-10G-phy-support-to-use-SFP.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch
 create mode 100644 target/linux/mvebu/patches-4.14/411-sfp-add-sfp-compatible.patch
 rename target/linux/mvebu/patches-4.14/{470-ClearFog-renamed-upstream.patch => 412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch} (62%)
 delete mode 100644 target/linux/mvebu/patches-4.14/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch
 create mode 100644 target/linux/mvebu/patches-4.14/413-ARM-dts-armada388-clearfog-increase-speed-of-i2c0-to.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/413-phy-export-phy_start_machine-for-phylink.patch
 create mode 100644 target/linux/mvebu/patches-4.14/414-ARM-dts-armada388-clearfog-add-SFP-module-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/414-phy-add-I2C-mdio-bus.patch
 create mode 100644 target/linux/mvebu/patches-4.14/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/415-phylink-add-phylink-infrastructure.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/416-phylink-add-hooks-for-SFP-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/417-sfp-add-phylink-based-SFP-module-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/421-phylink-add-ethtool-nway_reset-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/422-net-mvneta-add-nway_reset-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/423-phylink-add-flow-control-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/424-net-mvneta-add-flow-control-support-via-phylink.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/425-net-mvneta-enable-flow-control-for-PHY-connections.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/426-net-mvneta-enable-flow-control-for-fixed-connections.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/427-phylink-add-EEE-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/428-net-mvneta-add-EEE-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/429-phylink-add-module-EEPROM-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/431-sfp-phylink-hook-up-eeprom-functions.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/432-phy-marvell-88E1512-add-flow-control-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/433-phy-marvell-88E1111-add-flow-control-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/434-phy-marvell-88E1540-add-flow-control-support.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/437-phylink-ensure-link-drops-are-reported.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/450-reprobe_sfp_phy.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/471-add-ClearFog-Base-device-tree-files.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/472-armada-solidrun-microsom-backport-improvements.patch
 delete mode 100644 target/linux/mvebu/patches-4.14/473-fix-marvell-phy-initialization-issues.patch

diff --git a/target/linux/mvebu/patches-4.14/415-phylink-add-phylink-infrastructure.patch b/target/linux/mvebu/patches-4.14/415-phylink-add-phylink-infrastructure.patch
deleted file mode 100644
index cf9b2061cb..0000000000
diff --git a/target/linux/mvebu/patches-4.14/416-phylink-add-hooks-for-SFP-support.patch b/target/linux/mvebu/patches-4.14/416-phylink-add-hooks-for-SFP-support.patch
deleted file mode 100644
index da44f75dbe..0000000000
diff --git a/target/linux/mvebu/patches-4.14/417-sfp-add-phylink-based-SFP-module-support.patch b/target/linux/mvebu/patches-4.14/417-sfp-add-phylink-based-SFP-module-support.patch
deleted file mode 100644
index 4abefe6236..0000000000
diff --git a/target/linux/mvebu/patches-4.14/421-phylink-add-ethtool-nway_reset-support.patch b/target/linux/mvebu/patches-4.14/421-phylink-add-ethtool-nway_reset-support.patch
deleted file mode 100644
index d4436a732e..0000000000
diff --git a/target/linux/mvebu/patches-4.14/422-net-mvneta-add-nway_reset-support.patch b/target/linux/mvebu/patches-4.14/422-net-mvneta-add-nway_reset-support.patch
deleted file mode 100644
index d2bbb26ab4..0000000000
diff --git a/target/linux/mvebu/patches-4.14/423-phylink-add-flow-control-support.patch b/target/linux/mvebu/patches-4.14/423-phylink-add-flow-control-support.patch
deleted file mode 100644
index b0359f19a2..0000000000
diff --git a/target/linux/mvebu/patches-4.14/424-net-mvneta-add-flow-control-support-via-phylink.patch b/target/linux/mvebu/patches-4.14/424-net-mvneta-add-flow-control-support-via-phylink.patch
deleted file mode 100644
index cb4cebe0e0..0000000000
diff --git a/target/linux/mvebu/patches-4.14/425-net-mvneta-enable-flow-control-for-PHY-connections.patch b/target/linux/mvebu/patches-4.14/425-net-mvneta-enable-flow-control-for-PHY-connections.patch
deleted file mode 100644
index 3c2511d265..0000000000
diff --git a/target/linux/mvebu/patches-4.14/426-net-mvneta-enable-flow-control-for-fixed-connections.patch b/target/linux/mvebu/patches-4.14/426-net-mvneta-enable-flow-control-for-fixed-connections.patch
deleted file mode 100644
index 8bd6cec5c5..0000000000
diff --git a/target/linux/mvebu/patches-4.14/427-phylink-add-EEE-support.patch b/target/linux/mvebu/patches-4.14/427-phylink-add-EEE-support.patch
deleted file mode 100644
index 8451e1ef1b..0000000000
diff --git a/target/linux/mvebu/patches-4.14/428-net-mvneta-add-EEE-support.patch b/target/linux/mvebu/patches-4.14/428-net-mvneta-add-EEE-support.patch
deleted file mode 100644
index 9cffde54da..0000000000
diff --git a/target/linux/mvebu/patches-4.14/429-phylink-add-module-EEPROM-support.patch b/target/linux/mvebu/patches-4.14/429-phylink-add-module-EEPROM-support.patch
deleted file mode 100644
index 88853ca4a4..0000000000
diff --git a/target/linux/mvebu/patches-4.14/431-sfp-phylink-hook-up-eeprom-functions.patch b/target/linux/mvebu/patches-4.14/431-sfp-phylink-hook-up-eeprom-functions.patch
deleted file mode 100644
index 9f049aaa44..0000000000
diff --git a/target/linux/mvebu/patches-4.14/432-phy-marvell-88E1512-add-flow-control-support.patch b/target/linux/mvebu/patches-4.14/432-phy-marvell-88E1512-add-flow-control-support.patch
deleted file mode 100644
index f694b82af0..0000000000
diff --git a/target/linux/mvebu/patches-4.14/433-phy-marvell-88E1111-add-flow-control-support.patch b/target/linux/mvebu/patches-4.14/433-phy-marvell-88E1111-add-flow-control-support.patch
deleted file mode 100644
index cf525a29c3..0000000000
diff --git a/target/linux/mvebu/patches-4.14/434-phy-marvell-88E1540-add-flow-control-support.patch b/target/linux/mvebu/patches-4.14/434-phy-marvell-88E1540-add-flow-control-support.patch
deleted file mode 100644
index 607d173fc2..0000000000
diff --git a/target/linux/mvebu/patches-4.14/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch b/target/linux/mvebu/patches-4.14/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch
deleted file mode 100644
index 9b872b82d7..0000000000
diff --git a/target/linux/mvebu/patches-4.14/437-phylink-ensure-link-drops-are-reported.patch b/target/linux/mvebu/patches-4.14/437-phylink-ensure-link-drops-are-reported.patch
deleted file mode 100644
index 8544197478..0000000000
diff --git a/target/linux/mvebu/patches-4.14/450-reprobe_sfp_phy.patch b/target/linux/mvebu/patches-4.14/450-reprobe_sfp_phy.patch
deleted file mode 100644
index 69eaa3773e..0000000000
diff --git a/target/linux/mvebu/patches-4.14/471-add-ClearFog-Base-device-tree-files.patch b/target/linux/mvebu/patches-4.14/471-add-ClearFog-Base-device-tree-files.patch
deleted file mode 100644
index c075c4b02a..0000000000
diff --git a/target/linux/mvebu/patches-4.14/472-armada-solidrun-microsom-backport-improvements.patch b/target/linux/mvebu/patches-4.14/472-armada-solidrun-microsom-backport-improvements.patch
deleted file mode 100644
index 9195d4e793..0000000000
diff --git a/target/linux/mvebu/patches-4.14/473-fix-marvell-phy-initialization-issues.patch b/target/linux/mvebu/patches-4.14/473-fix-marvell-phy-initialization-issues.patch
deleted file mode 100644
index eca7e121e0..0000000000

Patch

diff --git a/target/linux/mvebu/config-4.14 b/target/linux/mvebu/config-4.14
index 87040a493a..f34bae4646 100644
--- a/target/linux/mvebu/config-4.14
+++ b/target/linux/mvebu/config-4.14
@@ -1,9 +1,13 @@ 
 CONFIG_AHCI_MVEBU=y
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
 CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
 CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
 CONFIG_ARCH_HAS_SG_CHAIN=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
 CONFIG_ARCH_HAS_TICK_BROADCAST=y
 CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
@@ -14,6 +18,8 @@  CONFIG_ARCH_MULTI_V6_V7=y
 CONFIG_ARCH_MULTI_V7=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
@@ -22,6 +28,7 @@  CONFIG_ARCH_SUPPORTS_UPROBES=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_USE_BUILTIN_BSWAP=y
 CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+# CONFIG_ARCH_WANTS_THP_SWAP is not set
 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
 CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
 CONFIG_ARM=y
@@ -39,6 +46,7 @@  CONFIG_ARM_CPU_SUSPEND=y
 CONFIG_ARM_CRYPTO=y
 CONFIG_ARM_ERRATA_720789=y
 CONFIG_ARM_GIC=y
+CONFIG_ARM_GLOBAL_TIMER=y
 CONFIG_ARM_HAS_SG_CHAIN=y
 CONFIG_ARM_HEAVY_MB=y
 CONFIG_ARM_L1_CACHE_SHIFT=6
@@ -55,17 +63,16 @@  CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
 CONFIG_ATA=y
 CONFIG_ATAGS=y
 CONFIG_AUTO_ZRELADDR=y
-# CONFIG_BINFMT_FLAT is not set
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_SCSI_REQUEST=y
 CONFIG_BOUNCE=y
 # CONFIG_CACHE_FEROCEON_L2 is not set
 CONFIG_CACHE_L2X0=y
 CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
 CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLKSRC_PROBE=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
 CONFIG_CPUFREQ_DT=y
@@ -101,17 +108,20 @@  CONFIG_CPU_PJ4B=y
 CONFIG_CPU_PM=y
 CONFIG_CPU_RMAP=y
 CONFIG_CPU_THERMAL=y
+CONFIG_CPU_THUMB_CAPABLE=y
 CONFIG_CPU_TLB_V7=y
 CONFIG_CPU_V7=y
 CONFIG_CRC16=y
-CONFIG_CRYPTO_ABLK_HELPER=y
+CONFIG_CRYPTO_ACOMP2=y
 CONFIG_CRYPTO_AEAD=y
 CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_AES_ARM=y
 CONFIG_CRYPTO_AES_ARM_BS=y
 # CONFIG_CRYPTO_AES_ARM_CE is not set
+# CONFIG_CRYPTO_CHACHA20_NEON is not set
 CONFIG_CRYPTO_CRC32=y
 CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32_ARM_CE is not set
 CONFIG_CRYPTO_CRYPTD=y
 CONFIG_CRYPTO_DEFLATE=y
 CONFIG_CRYPTO_DES=y
@@ -132,8 +142,10 @@  CONFIG_CRYPTO_SHA1_ARM_NEON=y
 CONFIG_CRYPTO_SHA256_ARM=y
 # CONFIG_CRYPTO_SHA2_ARM_CE is not set
 CONFIG_CRYPTO_SHA512_ARM=y
+CONFIG_CRYPTO_SIMD=y
 CONFIG_CRYPTO_WORKQUEUE=y
 CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_ALIGN_RODATA=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_LL=y
 CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
@@ -151,12 +163,17 @@  CONFIG_DEBUG_USER=y
 CONFIG_DMADEVICES=y
 CONFIG_DMA_ENGINE=y
 CONFIG_DMA_ENGINE_RAID=y
+# CONFIG_DMA_NOOP_OPS is not set
 CONFIG_DMA_OF=y
+# CONFIG_DMA_VIRT_OPS is not set
+# CONFIG_DRM_LIB_RANDOM is not set
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EDAC_ATOMIC_SCRUB=y
 CONFIG_EDAC_SUPPORT=y
+CONFIG_EXPORTFS=y
 CONFIG_EXT4_FS=y
+CONFIG_EXTCON=y
 # CONFIG_F2FS_CHECK_FS is not set
 CONFIG_F2FS_FS=y
 # CONFIG_F2FS_FS_SECURITY is not set
@@ -165,14 +182,18 @@  CONFIG_F2FS_STAT_FS=y
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
 CONFIG_FS_MBCACHE=y
+CONFIG_FUTEX_PI=y
 CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
 CONFIG_GENERIC_BUG=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
 CONFIG_GENERIC_EARLY_IOREMAP=y
 CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_GENERIC_IO=y
 CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
 CONFIG_GENERIC_MSI_IRQ=y
@@ -186,10 +207,10 @@  CONFIG_GENERIC_STRNLEN_USER=y
 CONFIG_GLOB=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_MVEBU=y
-CONFIG_GPIO_MVEBU_PWM=y
 CONFIG_GPIO_PCA953X=y
 # CONFIG_GPIO_PCA953X_IRQ is not set
 CONFIG_GPIO_SYSFS=y
+# CONFIG_GRO_CELLS is not set
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_HAS_DMA=y
@@ -207,7 +228,6 @@  CONFIG_HAVE_ARM_SCU=y
 CONFIG_HAVE_ARM_SMCCC=y
 CONFIG_HAVE_ARM_TWD=y
 # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
 CONFIG_HAVE_CC_STACKPROTECTOR=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_CLK_PREPARE=y
@@ -217,6 +237,8 @@  CONFIG_HAVE_DEBUG_KMEMLEAK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
 CONFIG_HAVE_DMA_CONTIGUOUS=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_EBPF_JIT=y
 CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
@@ -240,6 +262,7 @@  CONFIG_HAVE_UID16=y
 CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
 CONFIG_HIGHMEM=y
 # CONFIG_HIGHPTE is not set
+# CONFIG_HNS3 is not set
 CONFIG_HOTPLUG_CPU=y
 CONFIG_HWBM=y
 CONFIG_HWMON=y
@@ -249,6 +272,7 @@  CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_PXA is not set
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IOMMU_HELPER=y
 CONFIG_IRQCHIP=y
@@ -278,10 +302,10 @@  CONFIG_MACH_MVEBU_V7=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_MANGLE_BOOTARGS=y
 CONFIG_MARVELL_PHY=y
-CONFIG_MDIO_BOARDINFO=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_I2C=y
 CONFIG_MEMORY=y
-# CONFIG_MFD_MAX77620 is not set
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGHT_HAVE_PCI=y
 CONFIG_MMC=y
@@ -317,6 +341,7 @@  CONFIG_MVMDIO=y
 CONFIG_MVNETA=y
 CONFIG_MVNETA_BM=y
 CONFIG_MVNETA_BM_ENABLE=y
+CONFIG_MVPP2=y
 CONFIG_MVSW61XX_PHY=y
 CONFIG_MV_XOR=y
 CONFIG_NEED_DMA_MAP_STATE=y
@@ -348,6 +373,7 @@  CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DOMAINS_GENERIC=y
+# CONFIG_PCI_FTPCI100 is not set
 CONFIG_PCI_MSI=y
 CONFIG_PCI_MSI_IRQ_DOMAIN=y
 CONFIG_PCI_MVEBU=y
@@ -355,6 +381,7 @@  CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
 CONFIG_PHYLINK=y
+# CONFIG_PHY_MVEBU_CP110_COMPHY is not set
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ARMADA_370=y
 CONFIG_PINCTRL_ARMADA_38X=y
@@ -368,12 +395,15 @@  CONFIG_PJ4B_ERRATA_4742=y
 # CONFIG_PL310_ERRATA_769419 is not set
 CONFIG_PLAT_ORION=y
 CONFIG_PM_OPP=y
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=11
 CONFIG_PWM=y
 CONFIG_PWM_SYSFS=y
 CONFIG_RATIONAL=y
+CONFIG_RCU_NEED_SEGCBLIST=y
 CONFIG_RCU_STALL_COMMON=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MMIO=y
 CONFIG_REGMAP_SPI=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -396,32 +426,38 @@  CONFIG_SERIAL_8250_DW=y
 CONFIG_SERIAL_8250_FSL=y
 CONFIG_SERIAL_MVEBU_CONSOLE=y
 CONFIG_SERIAL_MVEBU_UART=y
-CONFIG_SG_POOL=y
 CONFIG_SFP=y
+CONFIG_SG_POOL=y
 CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
 CONFIG_SOC_BUS=y
 CONFIG_SPARSE_IRQ=y
 CONFIG_SPI=y
-# CONFIG_SPI_CADENCE_QUADSPI is not set
+# CONFIG_SPI_ARMADA_3700 is not set
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_ORION=y
 CONFIG_SRAM=y
+CONFIG_SRAM_EXEC=y
 CONFIG_SRCU=y
 CONFIG_SWCONFIG=y
 CONFIG_SWIOTLB=y
 CONFIG_SWPHY=y
 CONFIG_SWP_EMULATE=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_TEE is not set
 CONFIG_THERMAL=y
 CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
 CONFIG_THERMAL_GOV_STEP_WISE=y
 CONFIG_THERMAL_HWMON=y
 CONFIG_THERMAL_OF=y
+CONFIG_THIN_ARCHIVES=y
 # CONFIG_THUMB2_KERNEL is not set
 CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_STATS=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
 CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
 CONFIG_UBIFS_FS=y
 # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
 CONFIG_UBIFS_FS_LZO=y
@@ -432,15 +468,12 @@  CONFIG_USB_COMMON=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_HCD_ORION=y
 CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_EHCI_PCI=y
 CONFIG_USB_LEDS_TRIGGER_USBPORT=y
 CONFIG_USB_PHY=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_SUPPORT=y
-# CONFIG_USB_UHCI_HCD is not set
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_MVEBU=y
-CONFIG_USB_XHCI_PCI=y
 CONFIG_USB_XHCI_PLATFORM=y
 CONFIG_USE_OF=y
 CONFIG_VECTORS_BASE=0xffff0000
diff --git a/target/linux/mvebu/patches-4.14/002-add_powertables.patch b/target/linux/mvebu/patches-4.14/002-add_powertables.patch
index a5a47e4ab2..c5a211dd40 100644
--- a/target/linux/mvebu/patches-4.14/002-add_powertables.patch
+++ b/target/linux/mvebu/patches-4.14/002-add_powertables.patch
@@ -1,748 +1,770 @@ 
---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -86,12 +86,100 @@
- 			pcie@2,0 {
- 				/* Port 0, Lane 1 */
- 				status = "okay";
+--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
++++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
+@@ -237,11 +237,19 @@
+ &pcie1 {
+ 	/* Marvell 88W8864, 5GHz-only */
+ 	status = "okay";
 +
-+				mwlwifi {
-+					marvell,5ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						FCC =
-+							<1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>;
++	mwlwifi {
++		marvell,2ghz = <0>;
++	};
+ };
+ 
+ &pcie2 {
+ 	/* Marvell 88W8864, 2GHz-only */
+ 	status = "okay";
 +
-+						ETSI =
-+							<1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>;
-+					};
-+				};
- 			};
++	mwlwifi {
++		marvell,5ghz = <0>;
++	};
+ };
  
- 			/* Second mini-PCIe port */
- 			pcie@3,0 {
- 				/* Port 0, Lane 3 */
- 				status = "okay";
+ &pinctrl {
+--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
++++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
+@@ -169,3 +169,205 @@
+ 		reg = <0x280000 0x680000>;   /* 6.5MiB */
+ 	};
+ };
 +
-+				mwlwifi {
-+					marvell,2ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						FCC =
-+							<36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+							<56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+							<60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+							<64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+							<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+							<153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+							<157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+							<161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+							<165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>;
++&pcie1 {
++	mwlwifi {
++		marvell,chainmask = <2 2>;
++		marvell,powertable {
++			AU =
++				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
++				<149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
++				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
++				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
++				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
++				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>;
++			CA =
++				<36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
++				<40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
++				<44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
++				<48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
++			CN =
++				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>,
++				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
++				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
++				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
++				<165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>;
++			ETSI =
++				<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
++				<149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>;
++			FCC =
++				<36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
++				<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
++		};
++	};
++};
 +
-+						ETSI =
-+							<36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+							<149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>;
-+					};
-+				};
- 			};
- 		};
- 
++&pcie2 {
++	mwlwifi {
++		marvell,chainmask = <2 2>;
++		marvell,powertable {
++			AU =
++				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
++			CA =
++				<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>,
++				<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
++				<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>;
++			CN =
++				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
++			ETSI =
++				<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
++			FCC =
++				<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>;
++		};
++	};
++};
 --- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
 +++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-@@ -100,6 +100,212 @@
- 				};
- 			};
- 		};
+@@ -169,3 +169,205 @@
+ 		reg = <0x280000 0x680000>;   /* 6.5MiB */
+ 	};
+ };
 +
-+		pcie-controller {
-+			pcie@1,0 {
-+				mwlwifi {
-+					marvell,2ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						AU =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+						CA =
-+							<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+						CN =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+						ETSI =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+						FCC =
-+							<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+							<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+					};
-+				};
-+			};
++&pcie1 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++		marvell,powertable {
++			AU =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
++			CA =
++				<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
++			CN =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
++			ETSI =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
++			FCC =
++				<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
++				<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
++		};
++	};
++};
 +
-+			pcie@2,0 {
-+				mwlwifi {
-+					marvell,5ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						AU =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						CA =
-+							<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+						CN =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						ETSI =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						FCC =
-+							<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+					};
-+				};
-+			};
++&pcie2 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++		marvell,powertable {
++			AU =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			CA =
++				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
++			CN =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			ETSI =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			FCC =
++				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
++		};
++	};
++};
+--- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts
++++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts
+@@ -169,3 +169,205 @@
+ 		reg = <0x280000 0x680000>;   /* 6.5MiB */
+ 	};
+ };
++
++&pcie1 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++		marvell,powertable {
++			AU =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++				<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
++				<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
++			CA =
++				<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
++			CN =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
++				<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
++			ETSI =
++				<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
++				<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
++			FCC =
++				<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
++				<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
++				<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
++				<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
++				<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
++				<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
++		};
++	};
++};
++
++&pcie2 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++		marvell,powertable {
++			AU =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			CA =
++				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
++			CN =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			ETSI =
++				<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
++				<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
++			FCC =
++				<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
++				<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
++				<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
 +		};
++	};
++};
+--- a/arch/arm/boot/dts/armada-385-linksys-rango.dts
++++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts
+@@ -184,6 +184,18 @@
  	};
+ };
  
- 	gpio-leds {
---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-@@ -100,6 +100,212 @@
- 				};
- 			};
- 		};
++&pcie1 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++	};
++};
 +
-+		pcie-controller {
-+			pcie@1,0 {
-+				mwlwifi {
-+					marvell,2ghz = <0>;
-+					marvell,chainmask = <2 2>;
-+					marvell,powertable {
-+						AU =
-+							<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>,
-+							<149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+							<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+							<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+							<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>,
-+							<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>;
-+						CA =
-+							<36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+							<40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+							<44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+							<48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
-+						CN =
-+							<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+							<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+							<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+							<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>,
-+							<165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>;
-+						ETSI =
-+							<36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+							<149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>;
-+						FCC =
-+							<36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+							<165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
-+					};
-+				};
-+			};
++&pcie2 {
++	mwlwifi {
++		marvell,chainmask = <4 4>;
++	};
++};
 +
-+			pcie@2,0 {
-+				mwlwifi {
-+					marvell,5ghz = <0>;
-+					marvell,chainmask = <2 2>;
-+					marvell,powertable {
-+						AU =
-+							<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+						CA =
-+							<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>,
-+							<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+							<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>;
-+						CN =
-+							<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+						ETSI =
-+							<1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+						FCC =
-+							<1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>;
-+					};
-+				};
+ &sdhci {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&sdhci_pins>;
+--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+@@ -376,12 +376,100 @@
+ 	pcie@2,0 {
+ 		/* Port 0, Lane 1 */
+ 		status = "okay";
++
++		mwlwifi {
++			marvell,5ghz = <0>;
++			marvell,chainmask = <4 4>;
++			marvell,powertable {
++				FCC =
++					<1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>,
++					<2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
++					<11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>;
++
++				ETSI =
++					<1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
++					<13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>;
 +			};
 +		};
  	};
  
- 	gpio-leds {
---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-@@ -100,6 +100,212 @@
- 				};
- 			};
- 		};
+ 	/* Second mini-PCIe port */
+ 	pcie@3,0 {
+ 		/* Port 0, Lane 3 */
+ 		status = "okay";
 +
-+		pcie-controller {
-+			pcie@1,0 {
-+				mwlwifi {
-+					marvell,2ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						AU =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+							<149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+							<165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+						CA =
-+							<36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+						CN =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+							<165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+						ETSI =
-+							<36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+							<149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+						FCC =
-+							<36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+							<40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+							<52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+							<108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+							<149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+							<165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+					};
-+				};
-+			};
++		mwlwifi {
++			marvell,2ghz = <0>;
++			marvell,chainmask = <4 4>;
++			marvell,powertable {
++				FCC =
++					<36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++					<40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++					<44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++					<48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
++					<52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
++					<56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
++					<60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
++					<64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
++					<100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
++					<149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
++					<153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
++					<157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
++					<161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
++					<165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>;
 +
-+			pcie@2,0 {
-+				mwlwifi {
-+					marvell,5ghz = <0>;
-+					marvell,chainmask = <4 4>;
-+					marvell,powertable {
-+						AU =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						CA =
-+							<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+						CN =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						ETSI =
-+							<1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+							<13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+						FCC =
-+							<1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+							<2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+							<11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+					};
-+				};
++				ETSI =
++					<36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
++					<149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>;
 +			};
 +		};
  	};
+ };
  
- 	gpio-leds {
diff --git a/target/linux/mvebu/patches-4.14/003-add_switch_nodes.patch b/target/linux/mvebu/patches-4.14/003-add_switch_nodes.patch
index 38a48d308e..5d43d9f0f8 100644
--- a/target/linux/mvebu/patches-4.14/003-add_switch_nodes.patch
+++ b/target/linux/mvebu/patches-4.14/003-add_switch_nodes.patch
@@ -1,6 +1,6 @@ 
 --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
 +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -455,6 +455,16 @@
+@@ -361,6 +361,16 @@
  			};
  		};
  	};
@@ -16,11 +16,11 @@ 
 +	};
  };
  
- &pinctrl {
+ &pciec {
 --- a/arch/arm/boot/dts/armada-385-linksys.dtsi
 +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -304,6 +304,18 @@
- 			};
+@@ -113,6 +113,18 @@
+ 			linux,default-trigger = "disk-activity";
  		};
  	};
 +
@@ -37,4 +37,4 @@ 
 +	};
  };
  
- &pinctrl {
+ &ahci0 {
diff --git a/target/linux/mvebu/patches-4.14/004-add_sata_disk_activity_trigger.patch b/target/linux/mvebu/patches-4.14/004-add_sata_disk_activity_trigger.patch
index 906e976509..1a2b33cb1a 100644
--- a/target/linux/mvebu/patches-4.14/004-add_sata_disk_activity_trigger.patch
+++ b/target/linux/mvebu/patches-4.14/004-add_sata_disk_activity_trigger.patch
@@ -19,31 +19,21 @@  Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
 
 --- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
 +++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-@@ -315,6 +315,7 @@
+@@ -100,6 +100,7 @@
  
- 		sata {
- 			label = "caiman:white:sata";
-+			linux,default-trigger = "disk-activity";
- 		};
+ 	sata {
+ 		label = "caiman:white:sata";
++		linux,default-trigger = "disk-activity";
  	};
  };
+ 
 --- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
 +++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-@@ -315,6 +315,7 @@
+@@ -100,6 +100,7 @@
  
- 		sata {
- 			label = "cobra:white:sata";
-+			linux,default-trigger = "disk-activity";
- 		};
+ 	sata {
+ 		label = "cobra:white:sata";
++		linux,default-trigger = "disk-activity";
  	};
  };
---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -266,6 +266,7 @@
- 					esata@4 {
- 						label = "mamba:white:esata";
- 						reg = <0x4>;
-+						linux,default-trigger = "disk-activity";
- 					};
  
- 					usb2@5 {
diff --git a/target/linux/mvebu/patches-4.14/010-build_new_dtbs.patch b/target/linux/mvebu/patches-4.14/010-build_new_dtbs.patch
deleted file mode 100644
index 1eb647df9c..0000000000
diff --git a/target/linux/mvebu/patches-4.14/100-find_active_root.patch b/target/linux/mvebu/patches-4.14/100-find_active_root.patch
index d6006b7444..92438e8172 100644
--- a/target/linux/mvebu/patches-4.14/100-find_active_root.patch
+++ b/target/linux/mvebu/patches-4.14/100-find_active_root.patch
@@ -39,7 +39,7 @@  Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
  		parts[i].name = partname;
  
  		if (of_get_property(pp, "read-only", &len))
-@@ -213,6 +220,18 @@ static int __init ofpart_parser_init(voi
+@@ -212,6 +219,18 @@ static int __init ofpart_parser_init(voi
  	return 0;
  }
  
diff --git a/target/linux/mvebu/patches-4.14/102-revert_i2c_delay.patch b/target/linux/mvebu/patches-4.14/102-revert_i2c_delay.patch
index 473bdd9973..77583ac0b5 100644
--- a/target/linux/mvebu/patches-4.14/102-revert_i2c_delay.patch
+++ b/target/linux/mvebu/patches-4.14/102-revert_i2c_delay.patch
@@ -1,15 +1,15 @@ 
 --- a/arch/arm/boot/dts/armada-xp.dtsi
 +++ b/arch/arm/boot/dts/armada-xp.dtsi
-@@ -85,12 +85,10 @@
- 			};
+@@ -274,12 +274,10 @@
+ };
  
- 			i2c0: i2c@11000 {
--				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- 				reg = <0x11000 0x100>;
- 			};
+ &i2c0 {
+-	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+ 	reg = <0x11000 0x100>;
+ };
  
- 			i2c1: i2c@11100 {
--				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- 				reg = <0x11100 0x100>;
- 			};
+ &i2c1 {
+-	compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+ 	reg = <0x11100 0x100>;
+ };
  
diff --git a/target/linux/mvebu/patches-4.14/104-linksys_mamba_disable_keep_config.patch b/target/linux/mvebu/patches-4.14/104-linksys_mamba_disable_keep_config.patch
index d569f93a50..f6c7239ab2 100644
--- a/target/linux/mvebu/patches-4.14/104-linksys_mamba_disable_keep_config.patch
+++ b/target/linux/mvebu/patches-4.14/104-linksys_mamba_disable_keep_config.patch
@@ -1,6 +1,6 @@ 
 --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
 +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -299,7 +299,6 @@
+@@ -200,7 +200,6 @@
  			nand@d0000 {
  				status = "okay";
  				num-cs = <1>;
diff --git a/target/linux/mvebu/patches-4.14/106-enable-bm-on-linksys-devices.patch b/target/linux/mvebu/patches-4.14/106-enable-bm-on-linksys-devices.patch
deleted file mode 100644
index 86c6756a92..0000000000
diff --git a/target/linux/mvebu/patches-4.14/110-pxa3xxx_revert_irq_thread.patch b/target/linux/mvebu/patches-4.14/110-pxa3xxx_revert_irq_thread.patch
index 419306ed90..f939cc28b3 100644
--- a/target/linux/mvebu/patches-4.14/110-pxa3xxx_revert_irq_thread.patch
+++ b/target/linux/mvebu/patches-4.14/110-pxa3xxx_revert_irq_thread.patch
@@ -56,7 +56,7 @@  Signed-off-by: Felix Fietkau <nbd@nbd.name>
  }
  
  static inline int is_buf_blank(uint8_t *buf, size_t len)
-@@ -1856,9 +1842,7 @@ static int alloc_nand_resource(struct pl
+@@ -1864,9 +1850,7 @@ static int alloc_nand_resource(struct pl
  	/* initialize all interrupts to be disabled */
  	disable_int(info, NDSR_MASK);
  
@@ -65,5 +65,5 @@  Signed-off-by: Felix Fietkau <nbd@nbd.name>
 -				   pdev->name, info);
 +	ret = request_irq(irq, pxa3xx_nand_irq, 0, pdev->name, info);
  	if (ret < 0) {
- 		dev_err(&pdev->dev, "failed to request IRQ\n");
+ 		dev_err(&pdev->dev, "failed to request IRQ: %d\n", ret);
  		goto fail_free_buf;
diff --git a/target/linux/mvebu/patches-4.14/120-net-mvneta-add-BQL-support.patch b/target/linux/mvebu/patches-4.14/120-net-mvneta-add-BQL-support.patch
deleted file mode 100644
index f9d5ac1bbd..0000000000
diff --git a/target/linux/mvebu/patches-4.14/130-irqchip-armada-xp-backport.patch b/target/linux/mvebu/patches-4.14/130-irqchip-armada-xp-backport.patch
deleted file mode 100644
index 14cbb7beb5..0000000000
diff --git a/target/linux/mvebu/patches-4.14/200-gpio_mvebu_add_limited_pwm_support.patch b/target/linux/mvebu/patches-4.14/200-gpio_mvebu_add_limited_pwm_support.patch
deleted file mode 100644
index 0261b1e538..0000000000
diff --git a/target/linux/mvebu/patches-4.14/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-4.14/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
deleted file mode 100644
index 48f93944bf..0000000000
diff --git a/target/linux/mvebu/patches-4.14/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch b/target/linux/mvebu/patches-4.14/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch
deleted file mode 100644
index 90e951e2d2..0000000000
diff --git a/target/linux/mvebu/patches-4.14/203-arm_mvebu_enable_pwm_in_defconfig.patch b/target/linux/mvebu/patches-4.14/203-arm_mvebu_enable_pwm_in_defconfig.patch
deleted file mode 100644
index 21eb24da22..0000000000
diff --git a/target/linux/mvebu/patches-4.14/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch b/target/linux/mvebu/patches-4.14/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch
deleted file mode 100644
index caf5bd4aeb..0000000000
diff --git a/target/linux/mvebu/patches-4.14/210-clearfog_switch_node.patch b/target/linux/mvebu/patches-4.14/210-clearfog_switch_node.patch
index 022dc6f5de..e880cc13e7 100644
--- a/target/linux/mvebu/patches-4.14/210-clearfog_switch_node.patch
+++ b/target/linux/mvebu/patches-4.14/210-clearfog_switch_node.patch
@@ -1,6 +1,6 @@ 
 --- a/arch/arm/boot/dts/armada-388-clearfog.dts
 +++ b/arch/arm/boot/dts/armada-388-clearfog.dts
-@@ -406,6 +406,18 @@
+@@ -129,6 +129,18 @@
  		};
  	};
  
diff --git a/target/linux/mvebu/patches-4.14/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch b/target/linux/mvebu/patches-4.14/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch
deleted file mode 100644
index e7aa5c4cb7..0000000000
diff --git a/target/linux/mvebu/patches-4.14/300-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-4.14/300-mvneta-tx-queue-workaround.patch
index d5486e7388..f21f8083ee 100644
--- a/target/linux/mvebu/patches-4.14/300-mvneta-tx-queue-workaround.patch
+++ b/target/linux/mvebu/patches-4.14/300-mvneta-tx-queue-workaround.patch
@@ -9,8 +9,8 @@  Signed-off-by: Felix Fietkau <nbd@nbd.name>
 ---
 --- a/drivers/net/ethernet/marvell/mvneta.c
 +++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -3838,6 +3838,16 @@ static int mvneta_ethtool_get_rxfh(struc
- 	return 0;
+@@ -3961,6 +3961,15 @@ static int mvneta_ethtool_set_wol(struct
+ 	return ret;
  }
  
 +static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb,
@@ -22,15 +22,14 @@  Signed-off-by: Felix Fietkau <nbd@nbd.name>
 +	return 0;
 +}
 +
-+
  static const struct net_device_ops mvneta_netdev_ops = {
  	.ndo_open            = mvneta_open,
  	.ndo_stop            = mvneta_stop,
-@@ -3848,6 +3858,7 @@ static const struct net_device_ops mvnet
+@@ -3971,6 +3980,7 @@ static const struct net_device_ops mvnet
  	.ndo_fix_features    = mvneta_fix_features,
  	.ndo_get_stats64     = mvneta_get_stats64,
  	.ndo_do_ioctl        = mvneta_ioctl,
 +	.ndo_select_queue    = mvneta_select_queue,
  };
  
- const struct ethtool_ops mvneta_eth_tool_ops = {
+ static const struct ethtool_ops mvneta_eth_tool_ops = {
diff --git a/target/linux/mvebu/patches-4.14/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch b/target/linux/mvebu/patches-4.14/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
new file mode 100644
index 0000000000..29f36be460
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch
@@ -0,0 +1,40 @@ 
+From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Sat, 3 Oct 2015 09:13:05 +0100
+Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states
+
+The cpuidle ->enter method expects the return value to be the sleep
+state we entered.  Returning negative numbers or other codes is not
+permissible since coupled CPU idle was merged.
+
+At least some of the mvebu_v7_cpu_suspend() implementations return the
+value from cpu_suspend(), which returns zero if the CPU vectors back
+into the kernel via cpu_resume() (the success case), or the non-zero
+return value of the suspend actor, or one (failure cases).
+
+We do not want to be returning the failure case value back to CPU idle
+as that indicates that we successfully entered one of the deeper idle
+states.  Always return zero instead, indicating that we slept for the
+shortest amount of time.
+
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+---
+ drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/cpuidle/cpuidle-mvebu-v7.c
++++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
+@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp
+ 	ret = mvebu_v7_cpu_suspend(deepidle);
+ 	cpu_pm_exit();
+ 
++	/*
++	 * If we failed to enter the desired state, indicate that we
++	 * slept lightly.
++	 */
+ 	if (ret)
+-		return ret;
++		return 0;
+ 
+ 	return index;
+ }
diff --git a/target/linux/mvebu/patches-4.14/400-phy-provide-a-hook-for-link-up-link-down-events.patch b/target/linux/mvebu/patches-4.14/400-phy-provide-a-hook-for-link-up-link-down-events.patch
deleted file mode 100644
index cac2e6ea6d..0000000000
diff --git a/target/linux/mvebu/patches-4.14/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch b/target/linux/mvebu/patches-4.14/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch
deleted file mode 100644
index 20ed3119d6..0000000000
diff --git a/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch
new file mode 100644
index 0000000000..504d110264
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch
@@ -0,0 +1,60 @@ 
+From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Sat, 9 Jul 2016 10:58:16 +0100
+Subject: pci: mvebu: time out reset on link up
+
+If the port reports that the link is up while we are resetting, there's
+little point in waiting for the full duration.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/pci/host/pci-mvebu.c | 20 ++++++++++++++------
+ 1 file changed, 14 insertions(+), 6 deletions(-)
+
+--- a/drivers/pci/host/pci-mvebu.c
++++ b/drivers/pci/host/pci-mvebu.c
+@@ -1167,6 +1167,7 @@ static int mvebu_pcie_powerup(struct mve
+ 
+ 	if (port->reset_gpio) {
+ 		u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000;
++		unsigned int i;
+ 
+ 		of_property_read_u32(port->dn, "reset-delay-us",
+ 				     &reset_udelay);
+@@ -1174,7 +1175,13 @@ static int mvebu_pcie_powerup(struct mve
+ 		udelay(100);
+ 
+ 		gpiod_set_value_cansleep(port->reset_gpio, 0);
+-		msleep(reset_udelay / 1000);
++		for (i = 0; i < reset_udelay; i += 1000) {
++			if (mvebu_pcie_link_up(port))
++				break;
++			msleep(1);
++		}
++
++		printk("%s: reset completed in %dus\n", port->name, i);
+ 	}
+ 
+ 	return 0;
+@@ -1261,15 +1268,16 @@ static int mvebu_pcie_probe(struct platf
+ 		if (!child)
+ 			continue;
+ 
+-		ret = mvebu_pcie_powerup(port);
+-		if (ret < 0)
+-			continue;
+-
+ 		port->base = mvebu_pcie_map_registers(pdev, child, port);
+ 		if (IS_ERR(port->base)) {
+ 			dev_err(dev, "%s: cannot map registers\n", port->name);
+ 			port->base = NULL;
+-			mvebu_pcie_powerdown(port);
++			continue;
++		}
++
++		ret = mvebu_pcie_powerup(port);
++		if (ret < 0) {
++			port->base = NULL;
+ 			continue;
+ 		}
+ 
diff --git a/target/linux/mvebu/patches-4.14/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch b/target/linux/mvebu/patches-4.14/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch
deleted file mode 100644
index 33d467794a..0000000000
diff --git a/target/linux/mvebu/patches-4.14/418-sfp-display-SFP-module-information.patch b/target/linux/mvebu/patches-4.14/402-sfp-display-SFP-module-information.patch
similarity index 90%
rename from target/linux/mvebu/patches-4.14/418-sfp-display-SFP-module-information.patch
rename to target/linux/mvebu/patches-4.14/402-sfp-display-SFP-module-information.patch
index f0f2edae94..4f9e2e29b5 100644
--- a/target/linux/mvebu/patches-4.14/418-sfp-display-SFP-module-information.patch
+++ b/target/linux/mvebu/patches-4.14/402-sfp-display-SFP-module-information.patch
@@ -1,13 +1,16 @@ 
+From e76632d118659347d9261a4470d9f60bfbe0044c Mon Sep 17 00:00:00 2001
 From: Russell King <rmk+kernel@arm.linux.org.uk>
 Date: Sun, 13 Sep 2015 01:06:31 +0100
-Subject: [PATCH] sfp: display SFP module information
+Subject: sfp: display SFP module information
 
 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 ---
+ drivers/net/phy/sfp.c | 254 +++++++++++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 253 insertions(+), 1 deletion(-)
 
 --- a/drivers/net/phy/sfp.c
 +++ b/drivers/net/phy/sfp.c
-@@ -251,6 +251,182 @@ static unsigned int sfp_check(void *buf,
+@@ -247,6 +247,184 @@ static unsigned int sfp_check(void *buf,
  	return check;
  }
  
@@ -174,13 +177,15 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +	switch (encoding) {
 +	case SFP_ENCODING_UNSPEC:
 +		return "unspecified";
++	case SFP_ENCODING_8472_64B66B:
++		return "64b66b";
 +	case SFP_ENCODING_8B10B:
 +		return "8b10b";
 +	case SFP_ENCODING_4B5B:
 +		return "4b5b";
 +	case SFP_ENCODING_NRZ:
 +		return "NRZ";
-+	case SFP_ENCODING_MANCHESTER:
++	case SFP_ENCODING_8472_MANCHESTER:
 +		return "MANCHESTER";
 +	default:
 +		return "unknown";
@@ -190,7 +195,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  /* Helpers */
  static void sfp_module_tx_disable(struct sfp *sfp)
  {
-@@ -428,6 +604,7 @@ static int sfp_sm_mod_probe(struct sfp *
+@@ -415,6 +593,7 @@ static int sfp_sm_mod_probe(struct sfp *
  	char sn[17];
  	char date[9];
  	char rev[5];
@@ -198,7 +203,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	u8 check;
  	int err;
  
-@@ -471,10 +648,78 @@ static int sfp_sm_mod_probe(struct sfp *
+@@ -458,10 +637,83 @@ static int sfp_sm_mod_probe(struct sfp *
  	rev[4] = '\0';
  	memcpy(sn, sfp->id.ext.vendor_sn, 16);
  	sn[16] = '\0';
@@ -229,6 +234,11 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +		 sfp->id.base.e100_base_fx ? '+' : '-',
 +		 sfp->id.base.e_base_bx10 ? '+' : '-',
 +		 sfp->id.base.e_base_px ? '+' : '-');
++	dev_info(sfp->dev, "  10GBaseSR%c 10GBaseLR%c 10GBaseLRM%c 10GBaseER%c\n",
++		 sfp->id.base.e10g_base_sr ? '+' : '-',
++		 sfp->id.base.e10g_base_lr ? '+' : '-',
++		 sfp->id.base.e10g_base_lrm ? '+' : '-',
++		 sfp->id.base.e10g_base_er ? '+' : '-');
 +
 +	if (!sfp->id.base.sfp_ct_passive && !sfp->id.base.sfp_ct_active &&
 +	    !sfp->id.base.e1000_base_t) {
diff --git a/target/linux/mvebu/patches-4.14/419-net-mvneta-convert-to-phylink.patch b/target/linux/mvebu/patches-4.14/403-net-mvneta-convert-to-phylink.patch
similarity index 66%
rename from target/linux/mvebu/patches-4.14/419-net-mvneta-convert-to-phylink.patch
rename to target/linux/mvebu/patches-4.14/403-net-mvneta-convert-to-phylink.patch
index b62dadd2f3..10f385461d 100644
--- a/target/linux/mvebu/patches-4.14/419-net-mvneta-convert-to-phylink.patch
+++ b/target/linux/mvebu/patches-4.14/403-net-mvneta-convert-to-phylink.patch
@@ -1,35 +1,42 @@ 
+From 36f29e6cf8071fed3854d9825217ed2a3c83b990 Mon Sep 17 00:00:00 2001
 From: Russell King <rmk+kernel@arm.linux.org.uk>
 Date: Wed, 16 Sep 2015 21:27:10 +0100
-Subject: [PATCH] net: mvneta: convert to phylink
+Subject: net: mvneta: convert to phylink
 
 Convert mvneta to use phylink, which models the MAC to PHY link in
 a generic, reusable form.
 
 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+
+- remove unused sync status
 ---
+ drivers/net/ethernet/marvell/Kconfig  |   2 +-
+ drivers/net/ethernet/marvell/mvneta.c | 594 ++++++++++++++++++++--------------
+ 2 files changed, 349 insertions(+), 247 deletions(-)
 
 --- a/drivers/net/ethernet/marvell/Kconfig
 +++ b/drivers/net/ethernet/marvell/Kconfig
-@@ -57,7 +57,7 @@ config MVNETA
- 	tristate "Marvell Armada 370/38x/XP network interface support"
- 	depends on PLAT_ORION
+@@ -60,7 +60,7 @@ config MVNETA
+ 	depends on ARCH_MVEBU || COMPILE_TEST
+ 	depends on HAS_DMA
  	select MVMDIO
 -	select FIXED_PHY
 +	select PHYLINK
  	---help---
  	  This driver supports the network interface units in the
- 	  Marvell ARMADA XP, ARMADA 370 and ARMADA 38x SoC family.
+ 	  Marvell ARMADA XP, ARMADA 370, ARMADA 38x and
 --- a/drivers/net/ethernet/marvell/mvneta.c
 +++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -29,6 +29,7 @@
+@@ -28,7 +28,7 @@
+ #include <linux/of_mdio.h>
  #include <linux/of_net.h>
  #include <linux/phy.h>
- #include <linux/phy_fixed.h>
+-#include <linux/phy_fixed.h>
 +#include <linux/phylink.h>
  #include <linux/platform_device.h>
  #include <linux/skbuff.h>
  #include <net/hwbm.h>
-@@ -189,6 +190,7 @@
+@@ -189,6 +189,7 @@
  #define MVNETA_GMAC_CTRL_0                       0x2c00
  #define      MVNETA_GMAC_MAX_RX_SIZE_SHIFT       2
  #define      MVNETA_GMAC_MAX_RX_SIZE_MASK        0x7ffc
@@ -37,7 +44,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  #define      MVNETA_GMAC0_PORT_ENABLE            BIT(0)
  #define MVNETA_GMAC_CTRL_2                       0x2c08
  #define      MVNETA_GMAC2_INBAND_AN_ENABLE       BIT(0)
-@@ -204,13 +206,19 @@
+@@ -204,13 +205,19 @@
  #define      MVNETA_GMAC_TX_FLOW_CTRL_ENABLE     BIT(5)
  #define      MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE     BIT(6)
  #define      MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE     BIT(7)
@@ -57,7 +64,48 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  #define      MVNETA_GMAC_AN_FLOW_CTRL_EN         BIT(11)
  #define      MVNETA_GMAC_CONFIG_FULL_DUPLEX      BIT(12)
  #define      MVNETA_GMAC_AN_DUPLEX_EN            BIT(13)
-@@ -400,14 +408,9 @@ struct mvneta_port {
+@@ -237,6 +244,12 @@
+ #define MVNETA_TXQ_TOKEN_SIZE_REG(q)             (0x3e40 + ((q) << 2))
+ #define      MVNETA_TXQ_TOKEN_SIZE_MAX           0x7fffffff
+ 
++#define MVNETA_LPI_CTRL_0                        0x2cc0
++#define MVNETA_LPI_CTRL_1                        0x2cc4
++#define      MVNETA_LPI_REQUEST_ENABLE           BIT(0)
++#define MVNETA_LPI_CTRL_2                        0x2cc8
++#define MVNETA_LPI_STATUS                        0x2ccc
++
+ #define MVNETA_CAUSE_TXQ_SENT_DESC_ALL_MASK	 0xff
+ 
+ /* Descriptor ring Macros */
+@@ -313,6 +326,11 @@
+ #define MVNETA_RX_GET_BM_POOL_ID(rxd) \
+ 	(((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT)
+ 
++enum {
++	ETHTOOL_STAT_EEE_WAKEUP,
++	ETHTOOL_MAX_STATS,
++};
++
+ struct mvneta_statistic {
+ 	unsigned short offset;
+ 	unsigned short type;
+@@ -321,6 +339,7 @@ struct mvneta_statistic {
+ 
+ #define T_REG_32	32
+ #define T_REG_64	64
++#define T_SW		1
+ 
+ static const struct mvneta_statistic mvneta_statistics[] = {
+ 	{ 0x3000, T_REG_64, "good_octets_received", },
+@@ -355,6 +374,7 @@ static const struct mvneta_statistic mvn
+ 	{ 0x304c, T_REG_32, "broadcast_frames_sent", },
+ 	{ 0x3054, T_REG_32, "fc_sent", },
+ 	{ 0x300c, T_REG_32, "internal_mac_transmit_err", },
++	{ ETHTOOL_STAT_EEE_WAKEUP, T_SW, "eee_wakeup_errors", },
+ };
+ 
+ struct mvneta_pcpu_stats {
+@@ -407,20 +427,19 @@ struct mvneta_port {
  	u16 tx_ring_size;
  	u16 rx_ring_size;
  
@@ -74,7 +122,17 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  
  	struct mvneta_bm *bm_priv;
  	struct mvneta_bm_pool *pool_long;
-@@ -1182,10 +1185,6 @@ static void mvneta_port_disable(struct m
+ 	struct mvneta_bm_pool *pool_short;
+ 	int bm_win_id;
+ 
++	bool eee_enabled;
++	bool eee_active;
++	bool tx_lpi_enabled;
++
+ 	u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)];
+ 
+ 	u32 indir[MVNETA_RSS_LU_TABLE_SIZE];
+@@ -1214,10 +1233,6 @@ static void mvneta_port_disable(struct m
  	val &= ~MVNETA_GMAC0_PORT_ENABLE;
  	mvreg_write(pp, MVNETA_GMAC_CTRL_0, val);
  
@@ -85,7 +143,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	udelay(200);
  }
  
-@@ -1245,44 +1244,6 @@ static void mvneta_set_other_mcast_table
+@@ -1277,44 +1292,6 @@ static void mvneta_set_other_mcast_table
  		mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val);
  }
  
@@ -130,7 +188,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  static void mvneta_percpu_unmask_interrupt(void *arg)
  {
  	struct mvneta_port *pp = arg;
-@@ -1430,7 +1391,6 @@ static void mvneta_defaults_set(struct m
+@@ -1467,7 +1444,6 @@ static void mvneta_defaults_set(struct m
  	val &= ~MVNETA_PHY_POLLING_ENABLE;
  	mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
  
@@ -138,7 +196,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	mvneta_set_ucast_table(pp, -1);
  	mvneta_set_special_mcast_table(pp, -1);
  	mvneta_set_other_mcast_table(pp, -1);
-@@ -2635,26 +2595,11 @@ static irqreturn_t mvneta_isr(int irq, v
+@@ -2692,26 +2668,11 @@ static irqreturn_t mvneta_percpu_isr(int
  	return IRQ_HANDLED;
  }
  
@@ -167,7 +225,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  }
  
  /* NAPI handler
-@@ -2670,7 +2615,6 @@ static int mvneta_poll(struct napi_struc
+@@ -2727,7 +2688,6 @@ static int mvneta_poll(struct napi_struc
  	u32 cause_rx_tx;
  	int rx_queue;
  	struct mvneta_port *pp = netdev_priv(napi->dev);
@@ -175,7 +233,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports);
  
  	if (!netif_running(pp->dev)) {
-@@ -2684,12 +2628,11 @@ static int mvneta_poll(struct napi_struc
+@@ -2741,12 +2701,11 @@ static int mvneta_poll(struct napi_struc
  		u32 cause_misc = mvreg_read(pp, MVNETA_INTR_MISC_CAUSE);
  
  		mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
@@ -193,7 +251,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	}
  
  	/* Release Tx descriptors */
-@@ -2985,7 +2928,6 @@ static int mvneta_setup_txqs(struct mvne
+@@ -3060,7 +3019,6 @@ static int mvneta_setup_txqs(struct mvne
  static void mvneta_start_dev(struct mvneta_port *pp)
  {
  	int cpu;
@@ -201,7 +259,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  
  	mvneta_max_rx_size_set(pp, pp->pkt_size);
  	mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
-@@ -3008,16 +2950,15 @@ static void mvneta_start_dev(struct mvne
+@@ -3088,16 +3046,15 @@ static void mvneta_start_dev(struct mvne
  		    MVNETA_CAUSE_LINK_CHANGE |
  		    MVNETA_CAUSE_PSC_SYNC_CHANGE);
  
@@ -218,42 +276,40 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 -	phy_stop(ndev->phydev);
 +	phylink_stop(pp->phylink);
  
- 	for_each_online_cpu(cpu) {
- 		struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu);
-@@ -3187,99 +3128,210 @@ static int mvneta_set_mac_addr(struct ne
+ 	if (!pp->neta_armada3700) {
+ 		for_each_online_cpu(cpu) {
+@@ -3251,103 +3208,232 @@ static int mvneta_set_mac_addr(struct ne
  	return 0;
  }
  
 -static void mvneta_adjust_link(struct net_device *ndev)
-+static void mvneta_validate_support(struct net_device *ndev, unsigned int mode,
-+				    unsigned long *support)
++static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
++			    struct phylink_link_state *state)
 +{
 +	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 +
 +	/* Allow all the expected bits */
 +	phylink_set(mask, Autoneg);
-+	phylink_set(mask, TP);
-+	phylink_set(mask, AUI);
-+	phylink_set(mask, MII);
-+	phylink_set(mask, FIBRE);
-+	phylink_set(mask, BNC);
-+	phylink_set(mask, Backplane);
++	phylink_set_port_modes(mask);
 +
++	/* Asymmetric pause is unsupported */
++	phylink_set(mask, Pause);
 +	/* Half-duplex at speeds higher than 100Mbit is unsupported */
 +	phylink_set(mask, 1000baseT_Full);
 +	phylink_set(mask, 1000baseX_Full);
 +
-+	if (mode != MLO_AN_8023Z) {
++	if (state->interface != PHY_INTERFACE_MODE_1000BASEX) {
 +		/* 10M and 100M are only supported in non-802.3z mode */
 +		phylink_set(mask, 10baseT_Half);
 +		phylink_set(mask, 10baseT_Full);
 +		phylink_set(mask, 100baseT_Half);
 +		phylink_set(mask, 100baseT_Full);
-+	} else {
-+		phylink_set(mask, Pause);
 +	}
 +
-+	bitmap_and(support, support, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
++	bitmap_and(supported, supported, mask,
++		   __ETHTOOL_LINK_MODE_MASK_NBITS);
++	bitmap_and(state->advertising, state->advertising, mask,
++		   __ETHTOOL_LINK_MODE_MASK_NBITS);
 +}
 +
 +static int mvneta_mac_link_state(struct net_device *ndev,
@@ -298,28 +354,26 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +	state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP);
 +	state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX);
 +
++	state->pause = 0;
++	if (gmac_stat & MVNETA_GMAC_RX_FLOW_CTRL_ENABLE)
++		state->pause |= MLO_PAUSE_RX;
++	if (gmac_stat & MVNETA_GMAC_TX_FLOW_CTRL_ENABLE)
++		state->pause |= MLO_PAUSE_TX;
++
 +	return 1;
 +}
 +
-+static void mvneta_mac_an_restart(struct net_device *ndev, unsigned int mode)
++static void mvneta_mac_an_restart(struct net_device *ndev)
 +{
 +	struct mvneta_port *pp = netdev_priv(ndev);
++	u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 +
-+	if (mode == MLO_AN_8023Z) {
-+		u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
-+
-+		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
-+			    gmac_an | MVNETA_GMAC_INBAND_RESTART_AN);
-+		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
-+			    gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN);
- 	}
++	mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
++		    gmac_an | MVNETA_GMAC_INBAND_RESTART_AN);
++	mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
++		    gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN);
 +}
- 
--	if (phydev->link != pp->link) {
--		if (!phydev->link) {
--			pp->duplex = -1;
--			pp->speed = 0;
--		}
++
 +static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
 +	const struct phylink_link_state *state)
 +{
@@ -345,9 +399,19 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +
 +	if (phylink_test(state->advertising, Pause))
 +		new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL;
++	if (state->pause & MLO_PAUSE_TXRX_MASK)
++		new_an |= MVNETA_GMAC_CONFIG_FLOW_CTRL;
++
++	if (!phylink_autoneg_inband(mode)) {
++		/* Phy or fixed speed */
++		if (state->duplex)
++			new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 +
-+	switch (mode) {
-+	case MLO_AN_SGMII:
++		if (state->speed == SPEED_1000)
++			new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED;
++		else if (state->speed == SPEED_100)
++			new_an |= MVNETA_GMAC_CONFIG_MII_SPEED;
++	} else if (state->interface == PHY_INTERFACE_MODE_SGMII) {
 +		/* SGMII mode receives the state from the PHY */
 +		new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE;
 +		new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
@@ -356,11 +420,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +			 MVNETA_GMAC_INBAND_AN_ENABLE |
 +			 MVNETA_GMAC_AN_SPEED_EN |
 +			 MVNETA_GMAC_AN_DUPLEX_EN;
-+		break;
- 
--		pp->link = phydev->link;
--		status_change = 1;
-+	case MLO_AN_8023Z:
++	} else {
 +		/* 802.3z negotiation - only 1000base-X */
 +		new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X;
 +		new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
@@ -371,45 +431,10 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +			 /* The MAC only supports FD mode */
 +			 MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 +
-+		if (state->an_enabled)
++		if (state->pause & MLO_PAUSE_AN && state->an_enabled)
 +			new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN;
-+		break;
-+
-+	default:
-+		/* Phy or fixed speed */
-+		if (state->duplex)
-+			new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
++	}
 +
-+		if (state->speed == SPEED_1000)
-+			new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED;
-+		else if (state->speed == SPEED_100)
-+			new_an |= MVNETA_GMAC_CONFIG_MII_SPEED;
-+		break;
- 	}
- 
--	if (status_change) {
--		if (phydev->link) {
--			if (!pp->use_inband_status) {
--				u32 val = mvreg_read(pp,
--						  MVNETA_GMAC_AUTONEG_CONFIG);
--				val &= ~MVNETA_GMAC_FORCE_LINK_DOWN;
--				val |= MVNETA_GMAC_FORCE_LINK_PASS;
--				mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
--					    val);
--			}
--			mvneta_port_up(pp);
--		} else {
--			if (!pp->use_inband_status) {
--				u32 val = mvreg_read(pp,
--						  MVNETA_GMAC_AUTONEG_CONFIG);
--				val &= ~MVNETA_GMAC_FORCE_LINK_PASS;
--				val |= MVNETA_GMAC_FORCE_LINK_DOWN;
--				mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
--					    val);
--			}
--			mvneta_port_down(pp);
--		}
--		phy_print_status(phydev);
 +	/* Armada 370 documentation says we can only change the port mode
 +	 * and in-band enable when the link is down, so force it down
 +	 * while making these changes. We also do this for GMAC_CTRL2 */
@@ -431,6 +456,18 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an);
 +}
 +
++static void mvneta_set_eee(struct mvneta_port *pp, bool enable)
++{
++	u32 lpi_ctl1;
++
++	lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1);
++	if (enable)
++		lpi_ctl1 |= MVNETA_LPI_REQUEST_ENABLE;
++	else
++		lpi_ctl1 &= ~MVNETA_LPI_REQUEST_ENABLE;
++	mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi_ctl1);
++}
++
 +static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode)
 +{
 +	struct mvneta_port *pp = netdev_priv(ndev);
@@ -438,57 +475,104 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 +
 +	mvneta_port_down(pp);
 +
-+	if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) {
++	if (!phylink_autoneg_inband(mode)) {
 +		val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 +		val &= ~MVNETA_GMAC_FORCE_LINK_PASS;
 +		val |= MVNETA_GMAC_FORCE_LINK_DOWN;
 +		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
  	}
- }
  
--static int mvneta_mdio_probe(struct mvneta_port *pp)
-+static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode)
- {
--	struct phy_device *phy_dev;
+-	if (phydev->link != pp->link) {
+-		if (!phydev->link) {
+-			pp->duplex = -1;
+-			pp->speed = 0;
+-		}
++	pp->eee_active = false;
++	mvneta_set_eee(pp, false);
++}
++
++static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode,
++			       struct phy_device *phy)
++{
 +	struct mvneta_port *pp = netdev_priv(ndev);
 +	u32 val;
  
--	phy_dev = of_phy_connect(pp->dev, pp->phy_node, mvneta_adjust_link, 0,
--				 pp->phy_interface);
--	if (!phy_dev) {
--		netdev_err(pp->dev, "could not find the PHY\n");
--		return -ENODEV;
-+	if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) {
+-		pp->link = phydev->link;
+-		status_change = 1;
++	if (!phylink_autoneg_inband(mode)) {
 +		val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 +		val &= ~MVNETA_GMAC_FORCE_LINK_DOWN;
 +		val |= MVNETA_GMAC_FORCE_LINK_PASS;
 +		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
  	}
  
--	phy_dev->supported &= PHY_GBIT_FEATURES;
--	phy_dev->advertising = phy_dev->supported;
+-	if (status_change) {
+-		if (phydev->link) {
+-			if (!pp->use_inband_status) {
+-				u32 val = mvreg_read(pp,
+-						  MVNETA_GMAC_AUTONEG_CONFIG);
+-				val &= ~MVNETA_GMAC_FORCE_LINK_DOWN;
+-				val |= MVNETA_GMAC_FORCE_LINK_PASS;
+-				mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
+-					    val);
+-			}
+-			mvneta_port_up(pp);
+-		} else {
+-			if (!pp->use_inband_status) {
+-				u32 val = mvreg_read(pp,
+-						  MVNETA_GMAC_AUTONEG_CONFIG);
+-				val &= ~MVNETA_GMAC_FORCE_LINK_PASS;
+-				val |= MVNETA_GMAC_FORCE_LINK_DOWN;
+-				mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
+-					    val);
+-			}
+-			mvneta_port_down(pp);
+-		}
+-		phy_print_status(phydev);
 +	mvneta_port_up(pp);
-+}
++
++	if (phy && pp->eee_enabled) {
++		pp->eee_active = phy_init_eee(phy, 0) >= 0;
++		mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled);
+ 	}
+ }
  
--	pp->link    = 0;
--	pp->duplex  = 0;
--	pp->speed   = 0;
 +static const struct phylink_mac_ops mvneta_phylink_ops = {
-+	.validate_support = mvneta_validate_support,
++	.validate = mvneta_validate,
 +	.mac_link_state = mvneta_mac_link_state,
 +	.mac_an_restart = mvneta_mac_an_restart,
 +	.mac_config = mvneta_mac_config,
 +	.mac_link_down = mvneta_mac_link_down,
 +	.mac_link_up = mvneta_mac_link_up,
 +};
- 
--	return 0;
-+static int mvneta_mdio_probe(struct mvneta_port *pp)
-+{
++
+ static int mvneta_mdio_probe(struct mvneta_port *pp)
+ {
+-	struct phy_device *phy_dev;
+ 	struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
 +	int err = phylink_of_phy_connect(pp->phylink, pp->dn);
 +	if (err)
 +		netdev_err(pp->dev, "could not attach PHY\n");
-+
+ 
+-	phy_dev = of_phy_connect(pp->dev, pp->phy_node, mvneta_adjust_link, 0,
+-				 pp->phy_interface);
+-	if (!phy_dev) {
+-		netdev_err(pp->dev, "could not find the PHY\n");
+-		return -ENODEV;
+-	}
+-
+-	phy_ethtool_get_wol(phy_dev, &wol);
++	phylink_ethtool_get_wol(pp->phylink, &wol);
+ 	device_set_wakeup_capable(&pp->dev->dev, !!wol.supported);
+ 
+-	phy_dev->supported &= PHY_GBIT_FEATURES;
+-	phy_dev->advertising = phy_dev->supported;
+-
+-	pp->link    = 0;
+-	pp->duplex  = 0;
+-	pp->speed   = 0;
+-
+-	return 0;
 +	return err;
  }
  
@@ -501,7 +585,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  }
  
  /* Electing a CPU must be done in an atomic way: it should be done
-@@ -3537,10 +3589,9 @@ static int mvneta_stop(struct net_device
+@@ -3626,10 +3712,9 @@ static int mvneta_stop(struct net_device
  
  static int mvneta_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  {
@@ -514,15 +598,15 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  }
  
  /* Ethtool methods */
-@@ -3551,44 +3602,18 @@ mvneta_ethtool_set_link_ksettings(struct
+@@ -3640,44 +3725,25 @@ mvneta_ethtool_set_link_ksettings(struct
  				  const struct ethtool_link_ksettings *cmd)
  {
  	struct mvneta_port *pp = netdev_priv(ndev);
 -	struct phy_device *phydev = ndev->phydev;
--
+ 
 -	if (!phydev)
 -		return -ENODEV;
- 
+-
 -	if ((cmd->base.autoneg == AUTONEG_ENABLE) != pp->use_inband_status) {
 -		u32 val;
 -
@@ -536,15 +620,23 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 -
 -			if (phydev->duplex)
 -				val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
--
++	return phylink_ethtool_ksettings_set(pp->phylink, cmd);
++}
+ 
 -			if (phydev->speed == SPEED_1000)
 -				val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
 -			else if (phydev->speed == SPEED_100)
 -				val |= MVNETA_GMAC_CONFIG_MII_SPEED;
--
++/* Get link ksettings for ethtools */
++static int
++mvneta_ethtool_get_link_ksettings(struct net_device *ndev,
++				  struct ethtool_link_ksettings *cmd)
++{
++	struct mvneta_port *pp = netdev_priv(ndev);
+ 
 -			mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 -		}
-+	return phylink_ethtool_ksettings_set(pp->phylink, cmd);
++	return phylink_ethtool_ksettings_get(pp->phylink, cmd);
 +}
  
 -		pp->use_inband_status = (cmd->base.autoneg == AUTONEG_ENABLE);
@@ -556,19 +648,39 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 -			mvneta_port_up(pp);
 -		}
 -	}
-+/* Get link ksettings for ethtools */
-+static int
-+mvneta_ethtool_get_link_ksettings(struct net_device *ndev,
-+				  struct ethtool_link_ksettings *cmd)
++static int mvneta_ethtool_nway_reset(struct net_device *dev)
 +{
-+	struct mvneta_port *pp = netdev_priv(ndev);
++	struct mvneta_port *pp = netdev_priv(dev);
  
 -	return phy_ethtool_ksettings_set(ndev->phydev, cmd);
-+	return phylink_ethtool_ksettings_get(pp->phylink, cmd);
++	return phylink_ethtool_nway_reset(pp->phylink);
  }
  
  /* Set interrupt coalescing for ethtools */
-@@ -3696,26 +3721,28 @@ static void mvneta_ethtool_update_stats(
+@@ -3769,6 +3835,22 @@ static int mvneta_ethtool_set_ringparam(
+ 	return 0;
+ }
+ 
++static void mvneta_ethtool_get_pauseparam(struct net_device *dev,
++					  struct ethtool_pauseparam *pause)
++{
++	struct mvneta_port *pp = netdev_priv(dev);
++
++	phylink_ethtool_get_pauseparam(pp->phylink, pause);
++}
++
++static int mvneta_ethtool_set_pauseparam(struct net_device *dev,
++					 struct ethtool_pauseparam *pause)
++{
++	struct mvneta_port *pp = netdev_priv(dev);
++
++	return phylink_ethtool_set_pauseparam(pp->phylink, pause);
++}
++
+ static void mvneta_ethtool_get_strings(struct net_device *netdev, u32 sset,
+ 				       u8 *data)
+ {
+@@ -3785,26 +3867,35 @@ static void mvneta_ethtool_update_stats(
  {
  	const struct mvneta_statistic *s;
  	void __iomem *base = pp->base;
@@ -595,6 +707,13 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 -			val64 = (u64)high << 32 | low;
 -			pp->ethtool_stats[i] += val64;
 +			val = (u64)high << 32 | low;
++			break;
++		case T_SW:
++			switch (s->offset) {
++			case ETHTOOL_STAT_EEE_WAKEUP:
++				val = phylink_get_eee_err(pp->phylink);
++				break;
++			}
  			break;
  		}
 +
@@ -602,17 +721,113 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	}
  }
  
-@@ -3875,7 +3902,7 @@ const struct ethtool_ops mvneta_eth_tool
+@@ -3939,28 +4030,65 @@ static int mvneta_ethtool_get_rxfh(struc
+ static void mvneta_ethtool_get_wol(struct net_device *dev,
+ 				   struct ethtool_wolinfo *wol)
+ {
+-	wol->supported = 0;
+-	wol->wolopts = 0;
++	struct mvneta_port *pp = netdev_priv(dev);
+ 
+-	if (dev->phydev)
+-		phy_ethtool_get_wol(dev->phydev, wol);
++	phylink_ethtool_get_wol(pp->phylink, wol);
+ }
+ 
+ static int mvneta_ethtool_set_wol(struct net_device *dev,
+ 				  struct ethtool_wolinfo *wol)
+ {
++	struct mvneta_port *pp = netdev_priv(dev);
+ 	int ret;
+ 
+-	if (!dev->phydev)
+-		return -EOPNOTSUPP;
+-
+-	ret = phy_ethtool_set_wol(dev->phydev, wol);
++	ret = phylink_ethtool_set_wol(pp->phylink, wol);
+ 	if (!ret)
+ 		device_set_wakeup_enable(&dev->dev, !!wol->wolopts);
+ 
+ 	return ret;
+ }
+ 
++static int mvneta_ethtool_get_eee(struct net_device *dev,
++				  struct ethtool_eee *eee)
++{
++	struct mvneta_port *pp = netdev_priv(dev);
++	u32 lpi_ctl0;
++
++	lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);
++
++	eee->eee_enabled = pp->eee_enabled;
++	eee->eee_active = pp->eee_active;
++	eee->tx_lpi_enabled = pp->tx_lpi_enabled;
++	eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale;
++
++	return phylink_ethtool_get_eee(pp->phylink, eee);
++}
++
++static int mvneta_ethtool_set_eee(struct net_device *dev,
++				  struct ethtool_eee *eee)
++{
++	struct mvneta_port *pp = netdev_priv(dev);
++	u32 lpi_ctl0;
++
++	/* The Armada 37x documents do not give limits for this other than
++	 * it being an 8-bit register. */
++	if (eee->tx_lpi_enabled &&
++	    (eee->tx_lpi_timer < 0 || eee->tx_lpi_timer > 255))
++		return -EINVAL;
++
++	lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);
++	lpi_ctl0 &= ~(0xff << 8);
++	lpi_ctl0 |= eee->tx_lpi_timer << 8;
++	mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi_ctl0);
++
++	pp->eee_enabled = eee->eee_enabled;
++	pp->tx_lpi_enabled = eee->tx_lpi_enabled;
++
++	mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled);
++
++	return phylink_ethtool_set_eee(pp->phylink, eee);
++}
++
+ static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb,
+ 			       void *accel_priv,
+ 			       select_queue_fallback_t fallback)
+@@ -3984,13 +4112,15 @@ static const struct net_device_ops mvnet
+ };
+ 
+ static const struct ethtool_ops mvneta_eth_tool_ops = {
+-	.nway_reset	= phy_ethtool_nway_reset,
++	.nway_reset	= mvneta_ethtool_nway_reset,
+ 	.get_link       = ethtool_op_get_link,
+ 	.set_coalesce   = mvneta_ethtool_set_coalesce,
+ 	.get_coalesce   = mvneta_ethtool_get_coalesce,
+ 	.get_drvinfo    = mvneta_ethtool_get_drvinfo,
+ 	.get_ringparam  = mvneta_ethtool_get_ringparam,
+ 	.set_ringparam	= mvneta_ethtool_set_ringparam,
++	.get_pauseparam	= mvneta_ethtool_get_pauseparam,
++	.set_pauseparam	= mvneta_ethtool_set_pauseparam,
+ 	.get_strings	= mvneta_ethtool_get_strings,
+ 	.get_ethtool_stats = mvneta_ethtool_get_stats,
+ 	.get_sset_count	= mvneta_ethtool_get_sset_count,
+@@ -3998,10 +4128,12 @@ static const struct ethtool_ops mvneta_e
  	.get_rxnfc	= mvneta_ethtool_get_rxnfc,
  	.get_rxfh	= mvneta_ethtool_get_rxfh,
  	.set_rxfh	= mvneta_ethtool_set_rxfh,
 -	.get_link_ksettings = phy_ethtool_get_link_ksettings,
 +	.get_link_ksettings = mvneta_ethtool_get_link_ksettings,
  	.set_link_ksettings = mvneta_ethtool_set_link_ksettings,
+ 	.get_wol        = mvneta_ethtool_get_wol,
+ 	.set_wol        = mvneta_ethtool_set_wol,
++	.get_eee	= mvneta_ethtool_get_eee,
++	.set_eee	= mvneta_ethtool_set_eee,
  };
  
-@@ -4002,14 +4029,13 @@ static int mvneta_probe(struct platform_
- 	const struct mbus_dram_target_info *dram_target_info;
+ /* Initialize hw */
+@@ -4146,14 +4278,13 @@ static int mvneta_probe(struct platform_
+ {
  	struct resource *res;
  	struct device_node *dn = pdev->dev.of_node;
 -	struct device_node *phy_node;
@@ -627,7 +842,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	int tx_csum_limit;
  	int phy_mode;
  	int err;
-@@ -4025,31 +4051,11 @@ static int mvneta_probe(struct platform_
+@@ -4169,31 +4300,11 @@ static int mvneta_probe(struct platform_
  		goto err_free_netdev;
  	}
  
@@ -660,7 +875,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	}
  
  	dev->tx_queue_len = MVNETA_MAX_TXD;
-@@ -4060,12 +4066,7 @@ static int mvneta_probe(struct platform_
+@@ -4204,12 +4315,7 @@ static int mvneta_probe(struct platform_
  
  	pp = netdev_priv(dev);
  	spin_lock_init(&pp->lock);
@@ -674,7 +889,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  
  	pp->rxq_def = rxq_def;
  
-@@ -4076,7 +4077,7 @@ static int mvneta_probe(struct platform_
+@@ -4231,7 +4337,7 @@ static int mvneta_probe(struct platform_
  		pp->clk = devm_clk_get(&pdev->dev, NULL);
  	if (IS_ERR(pp->clk)) {
  		err = PTR_ERR(pp->clk);
@@ -683,9 +898,9 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	}
  
  	clk_prepare_enable(pp->clk);
-@@ -4184,6 +4185,14 @@ static int mvneta_probe(struct platform_
- 	dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
- 	dev->gso_max_segs = MVNETA_MAX_TSO_SEGS;
+@@ -4357,6 +4463,14 @@ static int mvneta_probe(struct platform_
+ 	/* 9676 == 9700 - 20 and rounding to 8 */
+ 	dev->max_mtu = 9676;
  
 +	phylink = phylink_create(dev, dn, phy_mode, &mvneta_phylink_ops);
 +	if (IS_ERR(phylink)) {
@@ -698,7 +913,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	err = register_netdev(dev);
  	if (err < 0) {
  		dev_err(&pdev->dev, "failed to register\n");
-@@ -4195,14 +4204,6 @@ static int mvneta_probe(struct platform_
+@@ -4368,14 +4482,6 @@ static int mvneta_probe(struct platform_
  
  	platform_set_drvdata(pdev, pp->dev);
  
@@ -713,7 +928,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	return 0;
  
  err_netdev:
-@@ -4213,16 +4214,14 @@ err_netdev:
+@@ -4386,16 +4492,14 @@ err_netdev:
  				       1 << pp->id);
  	}
  err_free_stats:
@@ -732,7 +947,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  err_free_irq:
  	irq_dispose_mapping(dev->irq);
  err_free_netdev:
-@@ -4234,7 +4233,6 @@ err_free_netdev:
+@@ -4407,7 +4511,6 @@ err_free_netdev:
  static int mvneta_remove(struct platform_device *pdev)
  {
  	struct net_device  *dev = platform_get_drvdata(pdev);
@@ -740,7 +955,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	struct mvneta_port *pp = netdev_priv(dev);
  
  	unregister_netdev(dev);
-@@ -4242,10 +4240,8 @@ static int mvneta_remove(struct platform
+@@ -4415,10 +4518,8 @@ static int mvneta_remove(struct platform
  	clk_disable_unprepare(pp->clk);
  	free_percpu(pp->ports);
  	free_percpu(pp->stats);
@@ -752,3 +967,13 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  	free_netdev(dev);
  
  	if (pp->bm_priv) {
+@@ -4470,9 +4571,6 @@ static int mvneta_resume(struct device *
+ 		return err;
+ 	}
+ 
+-	if (pp->use_inband_status)
+-		mvneta_fixed_link_update(pp, dev->phydev);
+-
+ 	netif_device_attach(dev);
+ 	if (netif_running(dev)) {
+ 		mvneta_open(dev);
diff --git a/target/linux/mvebu/patches-4.14/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch b/target/linux/mvebu/patches-4.14/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch
deleted file mode 100644
index 1ef8c922ab..0000000000
diff --git a/target/linux/mvebu/patches-4.14/404-net-mvneta-hack-fix-phy_interface.patch b/target/linux/mvebu/patches-4.14/404-net-mvneta-hack-fix-phy_interface.patch
new file mode 100644
index 0000000000..906c163ac9
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/404-net-mvneta-hack-fix-phy_interface.patch
@@ -0,0 +1,28 @@ 
+From acdfcc7ef78c46baca1439a1cac5b73008abc672 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Tue, 16 May 2017 11:55:58 +0100
+Subject: net: mvneta: hack fix phy_interface
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/ethernet/marvell/mvneta.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/net/ethernet/marvell/mvneta.c
++++ b/drivers/net/ethernet/marvell/mvneta.c
+@@ -427,6 +427,7 @@ struct mvneta_port {
+ 	u16 tx_ring_size;
+ 	u16 rx_ring_size;
+ 
++	phy_interface_t phy_interface;
+ 	struct device_node *dn;
+ 	unsigned int tx_csum_limit;
+ 	struct phylink *phylink;
+@@ -4315,6 +4316,7 @@ static int mvneta_probe(struct platform_
+ 
+ 	pp = netdev_priv(dev);
+ 	spin_lock_init(&pp->lock);
++	pp->phy_interface = phy_mode;
+ 	pp->dn = dn;
+ 
+ 	pp->rxq_def = rxq_def;
diff --git a/target/linux/mvebu/patches-4.14/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch b/target/linux/mvebu/patches-4.14/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch
deleted file mode 100644
index c768075d35..0000000000
diff --git a/target/linux/mvebu/patches-4.14/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch b/target/linux/mvebu/patches-4.14/405-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch
similarity index 74%
rename from target/linux/mvebu/patches-4.14/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch
rename to target/linux/mvebu/patches-4.14/405-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch
index f6e6df3de8..ddb0cc8a2e 100644
--- a/target/linux/mvebu/patches-4.14/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch
+++ b/target/linux/mvebu/patches-4.14/405-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch
@@ -1,7 +1,7 @@ 
+From fde9e742a47606110232b7464608b6f9c0510938 Mon Sep 17 00:00:00 2001
 From: Russell King <rmk+kernel@armlinux.org.uk>
 Date: Sat, 24 Dec 2016 10:27:08 +0000
-Subject: [PATCH] net: mvneta: disable MVNETA_CAUSE_PSC_SYNC_CHANGE
- interrupt
+Subject: net: mvneta: disable MVNETA_CAUSE_PSC_SYNC_CHANGE interrupt
 
 The PSC sync change interrupt can fire multiple times while the link is
 down.  As this isn't information we make use of, it's pointless having
@@ -9,24 +9,22 @@  the interrupt enabled, so let's disable this interrupt.
 
 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
 ---
+ drivers/net/ethernet/marvell/mvneta.c | 12 ++++--------
+ 1 file changed, 4 insertions(+), 8 deletions(-)
 
 --- a/drivers/net/ethernet/marvell/mvneta.c
 +++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -2634,9 +2634,11 @@ static int mvneta_poll(struct napi_struc
+@@ -2704,8 +2704,7 @@ static int mvneta_poll(struct napi_struc
  		mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
  
  		if (cause_misc & (MVNETA_CAUSE_PHY_STATUS_CHANGE |
 -				  MVNETA_CAUSE_LINK_CHANGE |
 -				  MVNETA_CAUSE_PSC_SYNC_CHANGE))
-+				  MVNETA_CAUSE_LINK_CHANGE)) {
-+			printk(KERN_DEBUG "%s: cause 0x%08x:0x%08x\n",
-+				__func__, cause_rx_tx, cause_misc);
++				  MVNETA_CAUSE_LINK_CHANGE))
  			mvneta_link_change(pp);
-+		}
  	}
  
- 	/* Release Tx descriptors */
-@@ -2951,8 +2953,7 @@ static void mvneta_start_dev(struct mvne
+@@ -3044,8 +3043,7 @@ static void mvneta_start_dev(struct mvne
  
  	mvreg_write(pp, MVNETA_INTR_MISC_MASK,
  		    MVNETA_CAUSE_PHY_STATUS_CHANGE |
@@ -36,7 +34,7 @@  Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
  
  	phylink_start(pp->phylink);
  	netif_tx_start_all_queues(pp->dev);
-@@ -3443,8 +3444,7 @@ static int mvneta_cpu_online(unsigned in
+@@ -3542,8 +3540,7 @@ static int mvneta_cpu_online(unsigned in
  	on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
  	mvreg_write(pp, MVNETA_INTR_MISC_MASK,
  		    MVNETA_CAUSE_PHY_STATUS_CHANGE |
@@ -46,7 +44,7 @@  Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
  	netif_tx_start_all_queues(pp->dev);
  	spin_unlock(&pp->lock);
  	return 0;
-@@ -3485,8 +3485,7 @@ static int mvneta_cpu_dead(unsigned int
+@@ -3584,8 +3581,7 @@ static int mvneta_cpu_dead(unsigned int
  	on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
  	mvreg_write(pp, MVNETA_INTR_MISC_MASK,
  		    MVNETA_CAUSE_PHY_STATUS_CHANGE |
diff --git a/target/linux/mvebu/patches-4.14/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch b/target/linux/mvebu/patches-4.14/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch
deleted file mode 100644
index e5f6da4be8..0000000000
diff --git a/target/linux/mvebu/patches-4.14/430-net-mvneta-add-module-EEPROM-reading-support.patch b/target/linux/mvebu/patches-4.14/406-net-mvneta-add-module-EEPROM-reading-support.patch
similarity index 69%
rename from target/linux/mvebu/patches-4.14/430-net-mvneta-add-module-EEPROM-reading-support.patch
rename to target/linux/mvebu/patches-4.14/406-net-mvneta-add-module-EEPROM-reading-support.patch
index da98c1cbb0..39eb33ac2c 100644
--- a/target/linux/mvebu/patches-4.14/430-net-mvneta-add-module-EEPROM-reading-support.patch
+++ b/target/linux/mvebu/patches-4.14/406-net-mvneta-add-module-EEPROM-reading-support.patch
@@ -1,16 +1,19 @@ 
+From 2ff039aa4462c2104c210b7cf39691c612de8214 Mon Sep 17 00:00:00 2001
 From: Russell King <rmk+kernel@arm.linux.org.uk>
 Date: Thu, 1 Oct 2015 23:32:39 +0100
-Subject: [PATCH] net: mvneta: add module EEPROM reading support
+Subject: net: mvneta: add module EEPROM reading support
 
 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 ---
+ drivers/net/ethernet/marvell/mvneta.c | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
 
 --- a/drivers/net/ethernet/marvell/mvneta.c
 +++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -3954,6 +3954,22 @@ static u16 mvneta_select_queue(struct ne
+@@ -4045,6 +4045,22 @@ static int mvneta_ethtool_set_wol(struct
+ 	return ret;
  }
  
- 
 +static int mvneta_ethtool_get_module_info(struct net_device *dev,
 +					  struct ethtool_modinfo *modinfo)
 +{
@@ -30,10 +33,10 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  static int mvneta_ethtool_get_eee(struct net_device *dev,
  				  struct ethtool_eee *eee)
  {
-@@ -4027,6 +4043,8 @@ const struct ethtool_ops mvneta_eth_tool
- 	.set_rxfh	= mvneta_ethtool_set_rxfh,
- 	.get_link_ksettings = mvneta_ethtool_get_link_ksettings,
+@@ -4129,6 +4145,8 @@ static const struct ethtool_ops mvneta_e
  	.set_link_ksettings = mvneta_ethtool_set_link_ksettings,
+ 	.get_wol        = mvneta_ethtool_get_wol,
+ 	.set_wol        = mvneta_ethtool_set_wol,
 +	.get_module_info = mvneta_ethtool_get_module_info,
 +	.get_module_eeprom = mvneta_ethtool_get_module_eeprom,
  	.get_eee	= mvneta_ethtool_get_eee,
diff --git a/target/linux/mvebu/patches-4.14/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch b/target/linux/mvebu/patches-4.14/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch
deleted file mode 100644
index 16516c6846..0000000000
diff --git a/target/linux/mvebu/patches-4.14/407-net-phy-add-802.3-clause-45-support-to-phylib.patch b/target/linux/mvebu/patches-4.14/407-net-phy-add-802.3-clause-45-support-to-phylib.patch
deleted file mode 100644
index 0715a6a8aa..0000000000
diff --git a/target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch b/target/linux/mvebu/patches-4.14/407-phy-fixed-phy-remove-fixed_phy_update_state.patch
similarity index 88%
copy from target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch
copy to target/linux/mvebu/patches-4.14/407-phy-fixed-phy-remove-fixed_phy_update_state.patch
index 58c9aab4ac..71c2f45555 100644
--- a/target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch
+++ b/target/linux/mvebu/patches-4.14/407-phy-fixed-phy-remove-fixed_phy_update_state.patch
@@ -1,7 +1,7 @@ 
-From 9be436bdb67c1f4aa9f33f2477f94e1f58a0ff02 Mon Sep 17 00:00:00 2001
+From 774ce2eda0a929f79ee398ba6d2d13fd406f31c4 Mon Sep 17 00:00:00 2001
 From: Russell King <rmk+kernel@arm.linux.org.uk>
 Date: Fri, 2 Oct 2015 22:46:54 +0100
-Subject: [PATCH 723/744] phy: fixed-phy: remove fixed_phy_update_state()
+Subject: phy: fixed-phy: remove fixed_phy_update_state()
 
 mvneta is the only user of fixed_phy_update_state(), which has been
 converted to use phylink instead.  Remove fixed_phy_update_state().
@@ -26,11 +26,11 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 -	struct fixed_mdio_bus *fmb = &platform_fmb;
 -	struct fixed_phy *fp;
 -
--	if (!phydev || phydev->bus != fmb->mii_bus)
+-	if (!phydev || phydev->mdio.bus != fmb->mii_bus)
 -		return -EINVAL;
 -
 -	list_for_each_entry(fp, &fmb->phys, node) {
--		if (fp->addr == phydev->addr) {
+-		if (fp->addr == phydev->mdio.addr) {
 -			write_seqcount_begin(&fp->seqcount);
 -#define _UPD(x) if (changed->x) \
 -	fp->status.x = status->x
@@ -55,7 +55,7 @@  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  		  int link_gpio)
 --- a/include/linux/phy_fixed.h
 +++ b/include/linux/phy_fixed.h
-@@ -23,9 +23,6 @@ extern void fixed_phy_del(int phy_addr);
+@@ -24,9 +24,6 @@ extern void fixed_phy_unregister(struct
  extern int fixed_phy_set_link_update(struct phy_device *phydev,
  			int (*link_update)(struct net_device *,
  					   struct fixed_phy_status *));
diff --git a/target/linux/mvebu/patches-4.14/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch b/target/linux/mvebu/patches-4.14/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch
deleted file mode 100644
index 3c4618b604..0000000000
diff --git a/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch b/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch
new file mode 100644
index 0000000000..611989f1d4
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch
@@ -0,0 +1,181 @@ 
+From c47beb7e3f8575dfd7d58240a72c4e4e66ce5449 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 14 Apr 2017 15:26:32 +0100
+Subject: sfp: move module eeprom ethtool access into netdev core ethtool
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/ethernet/marvell/mvneta.c | 18 ------------------
+ drivers/net/phy/phylink.c             | 28 ----------------------------
+ drivers/net/phy/sfp-bus.c             |  6 ++----
+ include/linux/netdevice.h             |  2 ++
+ include/linux/phylink.h               |  3 ---
+ net/core/ethtool.c                    |  7 +++++++
+ 6 files changed, 11 insertions(+), 53 deletions(-)
+
+--- a/drivers/net/ethernet/marvell/mvneta.c
++++ b/drivers/net/ethernet/marvell/mvneta.c
+@@ -4045,22 +4045,6 @@ static int mvneta_ethtool_set_wol(struct
+ 	return ret;
+ }
+ 
+-static int mvneta_ethtool_get_module_info(struct net_device *dev,
+-					  struct ethtool_modinfo *modinfo)
+-{
+-	struct mvneta_port *pp = netdev_priv(dev);
+-
+-	return phylink_ethtool_get_module_info(pp->phylink, modinfo);
+-}
+-
+-static int mvneta_ethtool_get_module_eeprom(struct net_device *dev,
+-					    struct ethtool_eeprom *ee, u8 *buf)
+-{
+-	struct mvneta_port *pp = netdev_priv(dev);
+-
+-	return phylink_ethtool_get_module_eeprom(pp->phylink, ee, buf);
+-}
+-
+ static int mvneta_ethtool_get_eee(struct net_device *dev,
+ 				  struct ethtool_eee *eee)
+ {
+@@ -4145,8 +4129,6 @@ static const struct ethtool_ops mvneta_e
+ 	.set_link_ksettings = mvneta_ethtool_set_link_ksettings,
+ 	.get_wol        = mvneta_ethtool_get_wol,
+ 	.set_wol        = mvneta_ethtool_set_wol,
+-	.get_module_info = mvneta_ethtool_get_module_info,
+-	.get_module_eeprom = mvneta_ethtool_get_module_eeprom,
+ 	.get_eee	= mvneta_ethtool_get_eee,
+ 	.set_eee	= mvneta_ethtool_set_eee,
+ };
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -1039,34 +1039,6 @@ int phylink_ethtool_set_pauseparam(struc
+ }
+ EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
+ 
+-int phylink_ethtool_get_module_info(struct phylink *pl,
+-				    struct ethtool_modinfo *modinfo)
+-{
+-	int ret = -EOPNOTSUPP;
+-
+-	WARN_ON(!lockdep_rtnl_is_held());
+-
+-	if (pl->sfp_bus)
+-		ret = sfp_get_module_info(pl->sfp_bus, modinfo);
+-
+-	return ret;
+-}
+-EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_info);
+-
+-int phylink_ethtool_get_module_eeprom(struct phylink *pl,
+-				      struct ethtool_eeprom *ee, u8 *buf)
+-{
+-	int ret = -EOPNOTSUPP;
+-
+-	WARN_ON(!lockdep_rtnl_is_held());
+-
+-	if (pl->sfp_bus)
+-		ret = sfp_get_module_eeprom(pl->sfp_bus, ee, buf);
+-
+-	return ret;
+-}
+-EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_eeprom);
+-
+ int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
+ {
+ 	int ret = -EPROTONOSUPPORT;
+--- a/drivers/net/phy/sfp-bus.c
++++ b/drivers/net/phy/sfp-bus.c
+@@ -278,6 +278,7 @@ static int sfp_register_bus(struct sfp_b
+ 	}
+ 	if (bus->started)
+ 		bus->socket_ops->start(bus->sfp);
++	bus->netdev->sfp_bus = bus;
+ 	bus->registered = true;
+ 	return 0;
+ }
+@@ -292,14 +293,13 @@ static void sfp_unregister_bus(struct sf
+ 		if (bus->phydev && ops && ops->disconnect_phy)
+ 			ops->disconnect_phy(bus->upstream);
+ 	}
++	bus->netdev->sfp_bus = NULL;
+ 	bus->registered = false;
+ }
+ 
+ 
+ int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo)
+ {
+-	if (!bus->registered)
+-		return -ENOIOCTLCMD;
+ 	return bus->socket_ops->module_info(bus->sfp, modinfo);
+ }
+ EXPORT_SYMBOL_GPL(sfp_get_module_info);
+@@ -307,8 +307,6 @@ EXPORT_SYMBOL_GPL(sfp_get_module_info);
+ int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee,
+ 	u8 *data)
+ {
+-	if (!bus->registered)
+-		return -ENOIOCTLCMD;
+ 	return bus->socket_ops->module_eeprom(bus->sfp, ee, data);
+ }
+ EXPORT_SYMBOL_GPL(sfp_get_module_eeprom);
+--- a/include/linux/netdevice.h
++++ b/include/linux/netdevice.h
+@@ -57,6 +57,7 @@ struct device;
+ struct phy_device;
+ struct dsa_switch_tree;
+ 
++struct sfp_bus;
+ /* 802.11 specific */
+ struct wireless_dev;
+ /* 802.15.4 specific */
+@@ -1908,6 +1909,7 @@ struct net_device {
+ 	struct netprio_map __rcu *priomap;
+ #endif
+ 	struct phy_device	*phydev;
++	struct sfp_bus		*sfp_bus;
+ 	struct lock_class_key	*qdisc_tx_busylock;
+ 	struct lock_class_key	*qdisc_running_key;
+ 	bool			proto_down;
+--- a/include/linux/phylink.h
++++ b/include/linux/phylink.h
+@@ -125,9 +125,6 @@ void phylink_ethtool_get_pauseparam(stru
+ 				    struct ethtool_pauseparam *);
+ int phylink_ethtool_set_pauseparam(struct phylink *,
+ 				   struct ethtool_pauseparam *);
+-int phylink_ethtool_get_module_info(struct phylink *, struct ethtool_modinfo *);
+-int phylink_ethtool_get_module_eeprom(struct phylink *,
+-				      struct ethtool_eeprom *, u8 *);
+ int phylink_init_eee(struct phylink *, bool);
+ int phylink_get_eee_err(struct phylink *);
+ int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *);
+--- a/net/core/ethtool.c
++++ b/net/core/ethtool.c
+@@ -22,6 +22,7 @@
+ #include <linux/bitops.h>
+ #include <linux/uaccess.h>
+ #include <linux/vmalloc.h>
++#include <linux/sfp.h>
+ #include <linux/slab.h>
+ #include <linux/rtnetlink.h>
+ #include <linux/sched/signal.h>
+@@ -2201,6 +2202,9 @@ static int __ethtool_get_module_info(str
+ 	const struct ethtool_ops *ops = dev->ethtool_ops;
+ 	struct phy_device *phydev = dev->phydev;
+ 
++	if (dev->sfp_bus)
++		return sfp_get_module_info(dev->sfp_bus, modinfo);
++
+ 	if (phydev && phydev->drv && phydev->drv->module_info)
+ 		return phydev->drv->module_info(phydev, modinfo);
+ 
+@@ -2235,6 +2239,9 @@ static int __ethtool_get_module_eeprom(s
+ 	const struct ethtool_ops *ops = dev->ethtool_ops;
+ 	struct phy_device *phydev = dev->phydev;
+ 
++	if (dev->sfp_bus)
++		return sfp_get_module_eeprom(dev->sfp_bus, ee, data);
++
+ 	if (phydev && phydev->drv && phydev->drv->module_eeprom)
+ 		return phydev->drv->module_eeprom(phydev, ee, data);
+ 
diff --git a/target/linux/mvebu/patches-4.14/409-net-phy-don-t-double-read-clause-45-status-register.patch b/target/linux/mvebu/patches-4.14/409-net-phy-don-t-double-read-clause-45-status-register.patch
deleted file mode 100644
index ee53fe0380..0000000000
diff --git a/target/linux/mvebu/patches-4.14/409-sfp-use-netdev-sfp_bus-for-start-stop.patch b/target/linux/mvebu/patches-4.14/409-sfp-use-netdev-sfp_bus-for-start-stop.patch
new file mode 100644
index 0000000000..3a0e663d4b
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/409-sfp-use-netdev-sfp_bus-for-start-stop.patch
@@ -0,0 +1,34 @@ 
+From 883dc66755313e133a787eba4dfde313fe33525b Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 14 Apr 2017 16:41:55 +0100
+Subject: sfp: use netdev sfp_bus for start/stop
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/phy/phylink.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -755,8 +755,8 @@ void phylink_start(struct phylink *pl)
+ 	clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
+ 	phylink_run_resolve(pl);
+ 
+-	if (pl->sfp_bus)
+-		sfp_upstream_start(pl->sfp_bus);
++	if (pl->netdev->sfp_bus)
++		sfp_upstream_start(pl->netdev->sfp_bus);
+ 	if (pl->phydev)
+ 		phy_start(pl->phydev);
+ }
+@@ -768,8 +768,8 @@ void phylink_stop(struct phylink *pl)
+ 
+ 	if (pl->phydev)
+ 		phy_stop(pl->phydev);
+-	if (pl->sfp_bus)
+-		sfp_upstream_stop(pl->sfp_bus);
++	if (pl->netdev->sfp_bus)
++		sfp_upstream_stop(pl->netdev->sfp_bus);
+ 
+ 	set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
+ 	flush_work(&pl->resolve);
diff --git a/target/linux/mvebu/patches-4.14/410-net-phy-allow-settings-table-to-support-more-than-32.patch b/target/linux/mvebu/patches-4.14/410-net-phy-allow-settings-table-to-support-more-than-32.patch
deleted file mode 100644
index b6d850577f..0000000000
diff --git a/target/linux/mvebu/patches-4.14/410-sfp-hack-allow-marvell-10G-phy-support-to-use-SFP.patch b/target/linux/mvebu/patches-4.14/410-sfp-hack-allow-marvell-10G-phy-support-to-use-SFP.patch
new file mode 100644
index 0000000000..05885a5ade
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/410-sfp-hack-allow-marvell-10G-phy-support-to-use-SFP.patch
@@ -0,0 +1,130 @@ 
+From 4a4aca08b11501cb1b2c509113bbb65eb66a1f45 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 14 Apr 2017 14:21:25 +0100
+Subject: sfp: hack: allow marvell 10G phy support to use SFP
+
+Allow the Marvell 10G PHY to register with the SFP bus, so that SFP+
+cages can work.  This bypasses phylink, meaning that socket status
+is not taken into account for the link state.  Also, the tx-disable
+signal must be commented out in DT for this to work...
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/phy/marvell10g.c | 54 +++++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 53 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/marvell10g.c
++++ b/drivers/net/phy/marvell10g.c
+@@ -15,7 +15,9 @@
+  * If both the fiber and copper ports are connected, the first to gain
+  * link takes priority and the other port is completely locked out.
+  */
++#include <linux/of.h>
+ #include <linux/phy.h>
++#include <linux/sfp.h>
+ 
+ enum {
+ 	MV_PCS_BASE_T		= 0x0000,
+@@ -37,6 +39,11 @@ enum {
+ 	MV_AN_RESULT_SPD_10000	= BIT(15),
+ };
+ 
++struct mv3310_priv {
++	struct device_node *sfp_node;
++	struct sfp_bus *sfp_bus;
++};
++
+ static int mv3310_modify(struct phy_device *phydev, int devad, u16 reg,
+ 			 u16 mask, u16 bits)
+ {
+@@ -55,17 +62,52 @@ static int mv3310_modify(struct phy_devi
+ 	return ret < 0 ? ret : 1;
+ }
+ 
++static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
++{
++	struct phy_device *phydev = upstream;
++	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
++
++	if (sfp_parse_interface(priv->sfp_bus, id) != PHY_INTERFACE_MODE_10GKR) {
++		dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");
++		return -EINVAL;
++	}
++	return 0;
++}
++
++static const struct sfp_upstream_ops mv3310_sfp_ops = {
++	.module_insert = mv3310_sfp_insert,
++};
++
+ static int mv3310_probe(struct phy_device *phydev)
+ {
++	struct mv3310_priv *priv;
+ 	u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
+ 
+ 	if (!phydev->is_c45 ||
+ 	    (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask)
+ 		return -ENODEV;
+ 
++	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	dev_set_drvdata(&phydev->mdio.dev, priv);
++
++	if (phydev->mdio.dev.of_node)
++		priv->sfp_node = of_parse_phandle(phydev->mdio.dev.of_node,
++						  "sfp", 0);
++
+ 	return 0;
+ }
+ 
++static void mv3310_remove(struct phy_device *phydev)
++{
++	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
++
++	if (priv->sfp_bus)
++		sfp_unregister_upstream(priv->sfp_bus);
++}
++
+ /*
+  * Resetting the MV88X3310 causes it to become non-responsive.  Avoid
+  * setting the reset bit(s).
+@@ -77,6 +119,7 @@ static int mv3310_soft_reset(struct phy_
+ 
+ static int mv3310_config_init(struct phy_device *phydev)
+ {
++	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
+ 	u32 mask;
+ 	int val;
+@@ -165,6 +208,14 @@ static int mv3310_config_init(struct phy
+ 	phydev->supported &= mask;
+ 	phydev->advertising &= phydev->supported;
+ 
++	/* Would be nice to do this in the probe function, but unfortunately,
++	 * phylib doesn't have phydev->attached_dev set there.
++	 */
++	if (priv->sfp_node && !priv->sfp_bus)
++		priv->sfp_bus = sfp_register_upstream(priv->sfp_node,
++						      phydev->attached_dev,
++						      phydev, &mv3310_sfp_ops);
++
+ 	return 0;
+ }
+ 
+@@ -348,12 +399,13 @@ static struct phy_driver mv3310_drivers[
+ 				  SUPPORTED_FIBRE |
+ 				  SUPPORTED_10000baseT_Full |
+ 				  SUPPORTED_Backplane,
+-		.probe		= mv3310_probe,
+ 		.soft_reset	= mv3310_soft_reset,
+ 		.config_init	= mv3310_config_init,
++		.probe		= mv3310_probe,
+ 		.config_aneg	= mv3310_config_aneg,
+ 		.aneg_done	= mv3310_aneg_done,
+ 		.read_status	= mv3310_read_status,
++		.remove		= mv3310_remove,
+ 	},
+ };
+ 
diff --git a/target/linux/mvebu/patches-4.14/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch b/target/linux/mvebu/patches-4.14/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch
deleted file mode 100644
index 2f0039b111..0000000000
diff --git a/target/linux/mvebu/patches-4.14/411-sfp-add-sfp-compatible.patch b/target/linux/mvebu/patches-4.14/411-sfp-add-sfp-compatible.patch
new file mode 100644
index 0000000000..3c1cd1c990
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/411-sfp-add-sfp-compatible.patch
@@ -0,0 +1,24 @@ 
+From 3344f73509a34d2124b716efc79cd9787773018b Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 14 Apr 2017 20:17:13 +0100
+Subject: sfp: add sfp+ compatible
+
+Add a compatible for SFP+ cages.  SFP+ cages are backwards compatible,
+but the ethernet device behind them may not support the slower speeds
+of SFP modules.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/phy/sfp.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/phy/sfp.c
++++ b/drivers/net/phy/sfp.c
+@@ -1135,6 +1135,7 @@ static int sfp_remove(struct platform_de
+ 
+ static const struct of_device_id sfp_of_match[] = {
+ 	{ .compatible = "sff,sfp", },
++	{ .compatible = "sff,sfp+", },
+ 	{ },
+ };
+ MODULE_DEVICE_TABLE(of, sfp_of_match);
diff --git a/target/linux/mvebu/patches-4.14/470-ClearFog-renamed-upstream.patch b/target/linux/mvebu/patches-4.14/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
similarity index 62%
rename from target/linux/mvebu/patches-4.14/470-ClearFog-renamed-upstream.patch
rename to target/linux/mvebu/patches-4.14/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
index 3eeda9fd3a..222a323825 100644
--- a/target/linux/mvebu/patches-4.14/470-ClearFog-renamed-upstream.patch
+++ b/target/linux/mvebu/patches-4.14/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch
@@ -1,30 +1,30 @@ 
-From b0db8cc1fe7eab722bc1f7c386132b3905d67f30 Mon Sep 17 00:00:00 2001
-From: Marko Ratkaj <marko.ratkaj@sartura.hr>
-Date: Fri, 7 Apr 2017 11:01:26 +0200
-Subject: [PATCH 1/2] ClearFog renamed upstream
+From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Tue, 29 Nov 2016 10:15:45 +0000
+Subject: ARM: dts: armada388-clearfog: emmc on clearfog base
 
-Signed-off-by: Marko Ratkaj <marko.ratkaj@sartura.hr>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
 ---
- arch/arm/boot/dts/Makefile                    |  1 +
- arch/arm/boot/dts/armada-388-clearfog-pro.dts | 55 +++++++++++++++++++++++++++
- 2 files changed, 56 insertions(+)
- create mode 100644 arch/arm/boot/dts/armada-388-clearfog-pro.dts
+ arch/arm/boot/dts/armada-388-clearfog-base.dts     |  1 +
+ .../dts/armada-38x-solidrun-microsom-emmc.dtsi     | 62 ++++++++++++++++++++++
+ 2 files changed, 63 insertions(+)
+ create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
 
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -924,6 +924,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
- 	armada-385-linksys-rango.dtb \
- 	armada-385-linksys-shelby.dtb \
- 	armada-388-clearfog.dtb \
-+	armada-388-clearfog-pro.dtb \
- 	armada-388-db.dtb \
- 	armada-388-gp.dtb \
- 	armada-388-rd.dtb
+--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
++++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
+@@ -48,6 +48,7 @@
+ 
+ /dts-v1/;
+ #include "armada-388-clearfog.dtsi"
++#include "armada-38x-solidrun-microsom-emmc.dtsi"
+ 
+ / {
+ 	model = "SolidRun Clearfog Base A1";
 --- /dev/null
-+++ b/arch/arm/boot/dts/armada-388-clearfog-pro.dts
-@@ -0,0 +1,55 @@
++++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
+@@ -0,0 +1,62 @@
 +/*
-+ * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
++ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC
 + *
 + *  Copyright (C) 2015 Russell King
 + *
@@ -42,17 +42,17 @@  Signed-off-by: Marko Ratkaj <marko.ratkaj@sartura.hr>
 + *     modify it under the terms of the GNU General Public License
 + *     version 2 as published by the Free Software Foundation.
 + *
-+ *     This file is distributed in the hope that it will be useful,
++ *     This file is distributed in the hope that it will be useful
 + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + *     GNU General Public License for more details.
 + *
-+ * Or, alternatively,
++ * Or, alternatively
 + *
 + *  b) Permission is hereby granted, free of charge, to any person
 + *     obtaining a copy of this software and associated documentation
 + *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
++ *     restriction, including without limitation the rights to use
 + *     copy, modify, merge, publish, distribute, sublicense, and/or
 + *     sell copies of the Software, and to permit persons to whom the
 + *     Software is furnished to do so, subject to the following
@@ -61,20 +61,27 @@  Signed-off-by: Marko Ratkaj <marko.ratkaj@sartura.hr>
 + *     The above copyright notice and this permission notice shall be
 + *     included in all copies or substantial portions of the Software.
 + *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 + *     OTHER DEALINGS IN THE SOFTWARE.
 + */
-+#include "armada-388-clearfog.dts"
-+
 +/ {
-+	model = "SolidRun Clearfog Pro A1";
-+	compatible = "solidrun,clearfog-pro-a1",
-+		"solidrun,clearfog-a1", "marvell,armada388",
-+		"marvell,armada385", "marvell,armada380";
++	soc {
++		internal-regs {
++			sdhci@d8000 {
++				bus-width = <4>;
++				no-1-8-v;
++				non-removable;
++				pinctrl-0 = <&microsom_sdhci_pins>;
++				pinctrl-names = "default";
++				status = "okay";
++				wp-inverted;
++			};
++		};
++	};
 +};
diff --git a/target/linux/mvebu/patches-4.14/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch b/target/linux/mvebu/patches-4.14/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch
deleted file mode 100644
index 8ead41cd6c..0000000000
diff --git a/target/linux/mvebu/patches-4.14/413-ARM-dts-armada388-clearfog-increase-speed-of-i2c0-to.patch b/target/linux/mvebu/patches-4.14/413-ARM-dts-armada388-clearfog-increase-speed-of-i2c0-to.patch
new file mode 100644
index 0000000000..4aedc82fe7
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/413-ARM-dts-armada388-clearfog-increase-speed-of-i2c0-to.patch
@@ -0,0 +1,42 @@ 
+From 6e127081e669cf163a818dc04d590790e4ed9527 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Tue, 29 Nov 2016 20:06:44 +0000
+Subject: ARM: dts: armada388-clearfog: increase speed of i2c0 to 400kHz
+
+All the devices on I2C0 support fast mode, so increase the bus speed
+to match.  The Armada 388 is known to have a timing issue when in
+standard mode, which we believe causes the ficticious device at 0x64
+to appear.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ arch/arm/boot/dts/armada-388-clearfog.dtsi | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
++++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
+@@ -143,8 +143,7 @@
+ };
+ 
+ &i2c0 {
+-	/* Is there anything on this? */
+-	clock-frequency = <100000>;
++	clock-frequency = <400000>;
+ 	pinctrl-0 = <&i2c0_pins>;
+ 	pinctrl-names = "default";
+ 	status = "okay";
+@@ -239,13 +238,11 @@
+ 		};
+ 	};
+ 
+-	/* The MCP3021 is 100kHz clock only */
++	/* The MCP3021 supports standard and fast modes */
+ 	mikrobus_adc: mcp3021@4c {
+ 		compatible = "microchip,mcp3021";
+ 		reg = <0x4c>;
+ 	};
+-
+-	/* Also something at 0x64 */
+ };
+ 
+ &i2c1 {
diff --git a/target/linux/mvebu/patches-4.14/413-phy-export-phy_start_machine-for-phylink.patch b/target/linux/mvebu/patches-4.14/413-phy-export-phy_start_machine-for-phylink.patch
deleted file mode 100644
index 44cf92439d..0000000000
diff --git a/target/linux/mvebu/patches-4.14/414-ARM-dts-armada388-clearfog-add-SFP-module-support.patch b/target/linux/mvebu/patches-4.14/414-ARM-dts-armada388-clearfog-add-SFP-module-support.patch
new file mode 100644
index 0000000000..38c6f421eb
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/414-ARM-dts-armada388-clearfog-add-SFP-module-support.patch
@@ -0,0 +1,81 @@ 
+From 74fa68669c88f73bceff523cb764297b7d1e132b Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Tue, 29 Nov 2016 10:13:44 +0000
+Subject: ARM: dts: armada388-clearfog: add SFP module support
+
+Add SFP module support for Clearfog using the SFP phylink support.
+
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+---
+ arch/arm/boot/dts/armada-388-clearfog.dtsi | 44 ++++++++----------------------
+ 1 file changed, 11 insertions(+), 33 deletions(-)
+
+--- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
++++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
+@@ -117,6 +117,15 @@
+ 			};
+ 		};
+ 	};
++
++	sfp: sfp {
++		compatible = "sff,sfp";
++		i2c-bus = <&i2c1>;
++		los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
++		moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
++		tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
++		tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
++	};
+ };
+ 
+ &eth1 {
+@@ -133,13 +142,10 @@
+ 	bm,pool-long = <3>;
+ 	bm,pool-short = <1>;
+ 	buffer-manager = <&bm>;
++	managed = "in-band-status";
+ 	phy-mode = "sgmii";
++	sfp = <&sfp>;
+ 	status = "okay";
+-
+-	fixed-link {
+-		speed = <1000>;
+-		full-duplex;
+-	};
+ };
+ 
+ &i2c0 {
+@@ -208,34 +214,6 @@
+ 			output-low;
+ 			line-name = "m.2 devslp";
+ 		};
+-		sfp_los {
+-			/* SFP loss of signal */
+-			gpio-hog;
+-			gpios = <12 GPIO_ACTIVE_HIGH>;
+-			input;
+-			line-name = "sfp-los";
+-		};
+-		sfp_tx_fault {
+-			/* SFP laser fault */
+-			gpio-hog;
+-			gpios = <13 GPIO_ACTIVE_HIGH>;
+-			input;
+-			line-name = "sfp-tx-fault";
+-		};
+-		sfp_tx_disable {
+-			/* SFP transmit disable */
+-			gpio-hog;
+-			gpios = <14 GPIO_ACTIVE_HIGH>;
+-			output-low;
+-			line-name = "sfp-tx-disable";
+-		};
+-		sfp_mod_def0 {
+-			/* SFP module present */
+-			gpio-hog;
+-			gpios = <15 GPIO_ACTIVE_LOW>;
+-			input;
+-			line-name = "sfp-mod-def0";
+-		};
+ 	};
+ 
+ 	/* The MCP3021 supports standard and fast modes */
diff --git a/target/linux/mvebu/patches-4.14/414-phy-add-I2C-mdio-bus.patch b/target/linux/mvebu/patches-4.14/414-phy-add-I2C-mdio-bus.patch
deleted file mode 100644
index c389817c6e..0000000000
diff --git a/target/linux/mvebu/patches-4.14/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch b/target/linux/mvebu/patches-4.14/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch
new file mode 100644
index 0000000000..481ee6276a
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch
@@ -0,0 +1,124 @@ 
+From 09a0122c74ec076e08512f1b00b7ccb8a450282f Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Tue, 29 Nov 2016 10:15:43 +0000
+Subject: ARM: dts: armada388-clearfog: document MPP usage
+
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+---
+ arch/arm/boot/dts/armada-388-clearfog-base.dts | 51 ++++++++++++++++++++++++++
+ arch/arm/boot/dts/armada-388-clearfog.dts      | 50 +++++++++++++++++++++++++
+ 2 files changed, 101 insertions(+)
+
+--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts
++++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
+@@ -108,3 +108,54 @@
+ 		marvell,function = "gpio";
+ 	};
+ };
++
++/*
++MPP
++18: pu	gpio		pca9655 int
++19:	gpio		phy reset
++20: pu	gpio		sd0 detect
++21:	sd0:cmd
++22: pd	gpio		mikro int
++23:
++
++24:	ua1:rxd		mikro rx
++25:	ua1:txd		mikro tx
++26: pu	i2c1:sck
++27: pu	i2c1:sda
++28:	sd0:clk
++29: pd	gpio		mikro rst
++30:
++31:
++
++32:
++33:
++34:
++35:
++36:
++37:	sd0:d3
++38:	sd0:d0
++39:	sd0:d1
++
++40:	sd0:d2
++41:
++42:
++43:	spi1:cs2	mikro cs
++44:	gpio		rear button sw3
++45:	ref:clk_out0	phy#0 clock
++46:	ref:clk_out1	phy#1 clock
++47:
++
++48:	gpio		J18 spare gpio
++49:	gpio		U10 I2C_IRQ(GNSS)
++50:	gpio		board id?
++51:
++52:
++53:
++54:	gpio		mikro pwm
++55:
++
++56: pu	spi1:mosi	mikro mosi
++57: pd	spi1:sck	mikro sck
++58:	spi1:miso	mikro miso
++59:
++*/
+--- a/arch/arm/boot/dts/armada-388-clearfog.dts
++++ b/arch/arm/boot/dts/armada-388-clearfog.dts
+@@ -289,3 +289,53 @@
+ 	 */
+ 	pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
+ };
++/*
+++#define A38x_CUSTOMER_BOARD_1_MPP16_23         0x00400011
++MPP18: gpio		? (pca9655 int?)
++MPP19: gpio		? (clkreq?)
++MPP20: gpio		? (sd0 detect)
++MPP21: sd0:cmd		x sd0
++MPP22: gpio		x mikro int
++MPP23: gpio		x switch irq
+++#define A38x_CUSTOMER_BOARD_1_MPP24_31         0x22043333
++MPP24: ua1:rxd		x mikro rx
++MPP25: ua1:txd		x mikro tx
++MPP26: i2c1:sck		x mikro sck
++MPP27: i2c1:sda		x mikro sda
++MPP28: sd0:clk		x sd0
++MPP29: gpio		x mikro rst
++MPP30: ge1:txd2		? (config)
++MPP31: ge1:txd3		? (config)
+++#define A38x_CUSTOMER_BOARD_1_MPP32_39         0x44400002
++MPP32: ge1:txctl	? (unused)
++MPP33: gpio		? (pic_com0)
++MPP34: gpio		x rear button (pic_com1)
++MPP35: gpio		? (pic_com2)
++MPP36: gpio		? (unused)
++MPP37: sd0:d3		x sd0
++MPP38: sd0:d0		x sd0
++MPP39: sd0:d1		x sd0
+++#define A38x_CUSTOMER_BOARD_1_MPP40_47         0x41144004
++MPP40: sd0:d2		x sd0
++MPP41: gpio		x switch reset
++MPP42: gpio		? sw1-1
++MPP43: spi1:cs2		x mikro cs
++MPP44: sata3:prsnt	? (unused)
++MPP45: ref:clk_out0	?
++MPP46: ref:clk_out1	x switch clk
++MPP47: 4		? (unused)
+++#define A38x_CUSTOMER_BOARD_1_MPP48_55         0x40333333
++MPP48: tdm:pclk
++MPP49: tdm:fsync
++MPP50: tdm:drx
++MPP51: tdm:dtx
++MPP52: tdm:int
++MPP53: tdm:rst
++MPP54: gpio		? (pwm)
++MPP55: spi1:cs1		x slic
+++#define A38x_CUSTOMER_BOARD_1_MPP56_63         0x00004444
++MPP56: spi1:mosi	x mikro mosi
++MPP57: spi1:sck		x mikro sck
++MPP58: spi1:miso	x mikro miso
++MPP59: spi1:cs0		x w25q32
++*/