[LEDE-DEV,3/3] sunxi: backport stmmac network patches

Message ID 20171228224324.28483-4-hauke@hauke-m.de
State Accepted
Delegated to: Hauke Mehrtens
Headers show
Series
  • sunxi: add support for kernel 4.14
Related show

Commit Message

Hauke Mehrtens Dec. 28, 2017, 10:43 p.m.
Ethernet support was initial added in kernel 4.13, but deactivated
before the final release. This is backported from kernel 4.15.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 ...snps-dwmac-mdio-MDIOs-are-automatically-r.patch |  33 ++
 ...dwmac-sun8i-Handle-integrated-external-MD.patch | 506 +++++++++++++++++++++
 ...-net-stmmac-sun8i-Restore-the-compatibles.patch |  35 ++
 ...ARM-dts-sunxi-Restore-EMAC-changes-boards.patch | 292 ++++++++++++
 ...-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch |  54 +++
 ...xi-h3-h5-represent-the-mdio-switch-used-b.patch |  59 +++
 ...64-dts-allwinner-A64-Restore-EMAC-changes.patch | 184 ++++++++
 ...llwinner-add-snps-dwmac-mdio-compatible-t.patch |  28 ++
 ...m64-dts-allwinner-H5-Restore-EMAC-changes.patch | 120 +++++
 ...nner-a64-add-Ethernet-PHY-regulator-for-s.patch |  51 +++
 10 files changed, 1362 insertions(+)
 create mode 100644 target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
 create mode 100644 target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
 create mode 100644 target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
 create mode 100644 target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
 create mode 100644 target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
 create mode 100644 target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
 create mode 100644 target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
 create mode 100644 target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
 create mode 100644 target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
 create mode 100644 target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch

Comments

Rosen Penev Dec. 29, 2017, 1:12 a.m. | #1
does it make sense to apply these patches to generic? AFAIK, ipq806x
also uses this driver.

On Thu, Dec 28, 2017 at 2:43 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote:
> Ethernet support was initial added in kernel 4.13, but deactivated
> before the final release. This is backported from kernel 4.15.
>
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
> ---
>  ...snps-dwmac-mdio-MDIOs-are-automatically-r.patch |  33 ++
>  ...dwmac-sun8i-Handle-integrated-external-MD.patch | 506 +++++++++++++++++++++
>  ...-net-stmmac-sun8i-Restore-the-compatibles.patch |  35 ++
>  ...ARM-dts-sunxi-Restore-EMAC-changes-boards.patch | 292 ++++++++++++
>  ...-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch |  54 +++
>  ...xi-h3-h5-represent-the-mdio-switch-used-b.patch |  59 +++
>  ...64-dts-allwinner-A64-Restore-EMAC-changes.patch | 184 ++++++++
>  ...llwinner-add-snps-dwmac-mdio-compatible-t.patch |  28 ++
>  ...m64-dts-allwinner-H5-Restore-EMAC-changes.patch | 120 +++++
>  ...nner-a64-add-Ethernet-PHY-regulator-for-s.patch |  51 +++
>  10 files changed, 1362 insertions(+)
>  create mode 100644 target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
>  create mode 100644 target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
>
> diff --git a/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
> new file mode 100644
> index 0000000000..3a9668b641
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
> @@ -0,0 +1,33 @@
> +From b5beecb580376cd8d959eb990abece6a748a3ce3 Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 24 Oct 2017 19:57:12 +0200
> +Subject: [PATCH] net: stmmac: snps, dwmac-mdio MDIOs are automatically
> + registered
> +
> +stmmac bindings docs said that its mdio node must have
> +compatible = "snps,dwmac-mdio";
> +Since dwmac-sun8i does not have any good reasons to not doing it, all
> +their MDIO node must have it.
> +
> +Since these compatible is automatically registered, dwmac-sun8i compatible
> +does not need to be in need_mdio_ids.
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Signed-off-by: David S. Miller <davem@davemloft.net>
> +---
> + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ----
> + 1 file changed, 4 deletions(-)
> +
> +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> +@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stm
> +       bool mdio = true;
> +       static const struct of_device_id need_mdio_ids[] = {
> +               { .compatible = "snps,dwc-qos-ethernet-4.10" },
> +-              { .compatible = "allwinner,sun8i-a83t-emac" },
> +-              { .compatible = "allwinner,sun8i-h3-emac" },
> +-              { .compatible = "allwinner,sun8i-v3s-emac" },
> +-              { .compatible = "allwinner,sun50i-a64-emac" },
> +               {},
> +       };
> +
> diff --git a/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
> new file mode 100644
> index 0000000000..8e0527f3d8
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
> @@ -0,0 +1,506 @@
> +From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 24 Oct 2017 19:57:13 +0200
> +Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
> +
> +The Allwinner H3 SoC have two distinct MDIO bus, only one could be
> +active at the same time.
> +The selection of the active MDIO bus are done via some bits in the EMAC
> +register of the system controller.
> +
> +This patch implement this MDIO switch via a custom MDIO-mux.
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> +Signed-off-by: David S. Miller <davem@davemloft.net>
> +---
> + drivers/net/ethernet/stmicro/stmmac/Kconfig       |   1 +
> + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++--------
> + 2 files changed, 224 insertions(+), 130 deletions(-)
> +
> +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +@@ -159,6 +159,7 @@ config DWMAC_SUN8I
> +       tristate "Allwinner sun8i GMAC support"
> +       default ARCH_SUNXI
> +       depends on OF && (ARCH_SUNXI || COMPILE_TEST)
> ++      select MDIO_BUS_MUX
> +       ---help---
> +         Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
> +
> +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> +@@ -17,6 +17,7 @@
> + #include <linux/clk.h>
> + #include <linux/io.h>
> + #include <linux/iopoll.h>
> ++#include <linux/mdio-mux.h>
> + #include <linux/mfd/syscon.h>
> + #include <linux/module.h>
> + #include <linux/of_device.h>
> +@@ -41,14 +42,14 @@
> +  *                            This value is used for disabling properly EMAC
> +  *                            and used as a good starting value in case of the
> +  *                            boot process(uboot) leave some stuff.
> +- * @internal_phy:             Does the MAC embed an internal PHY
> ++ * @soc_has_internal_phy:     Does the MAC embed an internal PHY
> +  * @support_mii:              Does the MAC handle MII
> +  * @support_rmii:             Does the MAC handle RMII
> +  * @support_rgmii:            Does the MAC handle RGMII
> +  */
> + struct emac_variant {
> +       u32 default_syscon_value;
> +-      int internal_phy;
> ++      bool soc_has_internal_phy;
> +       bool support_mii;
> +       bool support_rmii;
> +       bool support_rgmii;
> +@@ -61,7 +62,8 @@ struct emac_variant {
> +  * @rst_ephy: reference to the optional EPHY reset for the internal PHY
> +  * @variant:  reference to the current board variant
> +  * @regmap:   regmap for using the syscon
> +- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
> ++ * @internal_phy_powered: Does the internal PHY is enabled
> ++ * @mux_handle:       Internal pointer used by mdio-mux lib
> +  */
> + struct sunxi_priv_data {
> +       struct clk *tx_clk;
> +@@ -70,12 +72,13 @@ struct sunxi_priv_data {
> +       struct reset_control *rst_ephy;
> +       const struct emac_variant *variant;
> +       struct regmap *regmap;
> +-      bool use_internal_phy;
> ++      bool internal_phy_powered;
> ++      void *mux_handle;
> + };
> +
> + static const struct emac_variant emac_variant_h3 = {
> +       .default_syscon_value = 0x58000,
> +-      .internal_phy = PHY_INTERFACE_MODE_MII,
> ++      .soc_has_internal_phy = true,
> +       .support_mii = true,
> +       .support_rmii = true,
> +       .support_rgmii = true
> +@@ -83,20 +86,20 @@ static const struct emac_variant emac_va
> +
> + static const struct emac_variant emac_variant_v3s = {
> +       .default_syscon_value = 0x38000,
> +-      .internal_phy = PHY_INTERFACE_MODE_MII,
> ++      .soc_has_internal_phy = true,
> +       .support_mii = true
> + };
> +
> + static const struct emac_variant emac_variant_a83t = {
> +       .default_syscon_value = 0,
> +-      .internal_phy = 0,
> ++      .soc_has_internal_phy = false,
> +       .support_mii = true,
> +       .support_rgmii = true
> + };
> +
> + static const struct emac_variant emac_variant_a64 = {
> +       .default_syscon_value = 0,
> +-      .internal_phy = 0,
> ++      .soc_has_internal_phy = false,
> +       .support_mii = true,
> +       .support_rmii = true,
> +       .support_rgmii = true
> +@@ -195,6 +198,9 @@ static const struct emac_variant emac_va
> + #define H3_EPHY_LED_POL               BIT(17) /* 1: active low, 0: active high */
> + #define H3_EPHY_SHUTDOWN      BIT(16) /* 1: shutdown, 0: power up */
> + #define H3_EPHY_SELECT                BIT(15) /* 1: internal PHY, 0: external PHY */
> ++#define H3_EPHY_MUX_MASK      (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
> ++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID      1
> ++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID      2
> +
> + /* H3/A64 specific bits */
> + #define SYSCON_RMII_EN                BIT(13) /* 1: enable RMII (overrides EPIT) */
> +@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm
> +       return 0;
> + }
> +
> ++/* Search in mdio-mux node for internal PHY node and get its clk/reset */
> ++static int get_ephy_nodes(struct stmmac_priv *priv)
> ++{
> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> ++      struct device_node *mdio_mux, *iphynode;
> ++      struct device_node *mdio_internal;
> ++      int ret;
> ++
> ++      mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
> ++      if (!mdio_mux) {
> ++              dev_err(priv->device, "Cannot get mdio-mux node\n");
> ++              return -ENODEV;
> ++      }
> ++
> ++      mdio_internal = of_find_compatible_node(mdio_mux, NULL,
> ++                                              "allwinner,sun8i-h3-mdio-internal");
> ++      if (!mdio_internal) {
> ++              dev_err(priv->device, "Cannot get internal_mdio node\n");
> ++              return -ENODEV;
> ++      }
> ++
> ++      /* Seek for internal PHY */
> ++      for_each_child_of_node(mdio_internal, iphynode) {
> ++              gmac->ephy_clk = of_clk_get(iphynode, 0);
> ++              if (IS_ERR(gmac->ephy_clk))
> ++                      continue;
> ++              gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);
> ++              if (IS_ERR(gmac->rst_ephy)) {
> ++                      ret = PTR_ERR(gmac->rst_ephy);
> ++                      if (ret == -EPROBE_DEFER)
> ++                              return ret;
> ++                      continue;
> ++              }
> ++              dev_info(priv->device, "Found internal PHY node\n");
> ++              return 0;
> ++      }
> ++      return -ENODEV;
> ++}
> ++
> ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
> ++{
> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> ++      int ret;
> ++
> ++      if (gmac->internal_phy_powered) {
> ++              dev_warn(priv->device, "Internal PHY already powered\n");
> ++              return 0;
> ++      }
> ++
> ++      dev_info(priv->device, "Powering internal PHY\n");
> ++      ret = clk_prepare_enable(gmac->ephy_clk);
> ++      if (ret) {
> ++              dev_err(priv->device, "Cannot enable internal PHY\n");
> ++              return ret;
> ++      }
> ++
> ++      /* Make sure the EPHY is properly reseted, as U-Boot may leave
> ++       * it at deasserted state, and thus it may fail to reset EMAC.
> ++       */
> ++      reset_control_assert(gmac->rst_ephy);
> ++
> ++      ret = reset_control_deassert(gmac->rst_ephy);
> ++      if (ret) {
> ++              dev_err(priv->device, "Cannot deassert internal phy\n");
> ++              clk_disable_unprepare(gmac->ephy_clk);
> ++              return ret;
> ++      }
> ++
> ++      gmac->internal_phy_powered = true;
> ++
> ++      return 0;
> ++}
> ++
> ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
> ++{
> ++      if (!gmac->internal_phy_powered)
> ++              return 0;
> ++
> ++      clk_disable_unprepare(gmac->ephy_clk);
> ++      reset_control_assert(gmac->rst_ephy);
> ++      gmac->internal_phy_powered = false;
> ++      return 0;
> ++}
> ++
> ++/* MDIO multiplexing switch function
> ++ * This function is called by the mdio-mux layer when it thinks the mdio bus
> ++ * multiplexer needs to switch.
> ++ * 'current_child' is the current value of the mux register
> ++ * 'desired_child' is the value of the 'reg' property of the target child MDIO
> ++ * node.
> ++ * The first time this function is called, current_child == -1.
> ++ * If current_child == desired_child, then the mux is already set to the
> ++ * correct bus.
> ++ */
> ++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
> ++                                   void *data)
> ++{
> ++      struct stmmac_priv *priv = data;
> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> ++      u32 reg, val;
> ++      int ret = 0;
> ++      bool need_power_ephy = false;
> ++
> ++      if (current_child ^ desired_child) {
> ++              regmap_read(gmac->regmap, SYSCON_EMAC_REG, &reg);
> ++              switch (desired_child) {
> ++              case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
> ++                      dev_info(priv->device, "Switch mux to internal PHY");
> ++                      val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
> ++
> ++                      need_power_ephy = true;
> ++                      break;
> ++              case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
> ++                      dev_info(priv->device, "Switch mux to external PHY");
> ++                      val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
> ++                      need_power_ephy = false;
> ++                      break;
> ++              default:
> ++                      dev_err(priv->device, "Invalid child ID %x\n",
> ++                              desired_child);
> ++                      return -EINVAL;
> ++              }
> ++              regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
> ++              if (need_power_ephy) {
> ++                      ret = sun8i_dwmac_power_internal_phy(priv);
> ++                      if (ret)
> ++                              return ret;
> ++              } else {
> ++                      sun8i_dwmac_unpower_internal_phy(gmac);
> ++              }
> ++              /* After changing syscon value, the MAC need reset or it will
> ++               * use the last value (and so the last PHY set).
> ++               */
> ++              ret = sun8i_dwmac_reset(priv);
> ++      }
> ++      return ret;
> ++}
> ++
> ++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
> ++{
> ++      int ret;
> ++      struct device_node *mdio_mux;
> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> ++
> ++      mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
> ++      if (!mdio_mux)
> ++              return -ENODEV;
> ++
> ++      ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
> ++                          &gmac->mux_handle, priv, priv->mii);
> ++      return ret;
> ++}
> ++
> + static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
> + {
> +       struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> +@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct
> +                        "Current syscon value is not the default %x (expect %x)\n",
> +                        val, reg);
> +
> +-      if (gmac->variant->internal_phy) {
> +-              if (!gmac->use_internal_phy) {
> +-                      /* switch to external PHY interface */
> +-                      reg &= ~H3_EPHY_SELECT;
> +-              } else {
> +-                      reg |= H3_EPHY_SELECT;
> +-                      reg &= ~H3_EPHY_SHUTDOWN;
> +-                      dev_dbg(priv->device, "Select internal_phy %x\n", reg);
> +-
> +-                      if (of_property_read_bool(priv->plat->phy_node,
> +-                                                "allwinner,leds-active-low"))
> +-                              reg |= H3_EPHY_LED_POL;
> +-                      else
> +-                              reg &= ~H3_EPHY_LED_POL;
> +-
> +-                      /* Force EPHY xtal frequency to 24MHz. */
> +-                      reg |= H3_EPHY_CLK_SEL;
> +-
> +-                      ret = of_mdio_parse_addr(priv->device,
> +-                                               priv->plat->phy_node);
> +-                      if (ret < 0) {
> +-                              dev_err(priv->device, "Could not parse MDIO addr\n");
> +-                              return ret;
> +-                      }
> +-                      /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
> +-                       * address. No need to mask it again.
> +-                       */
> +-                      reg |= ret << H3_EPHY_ADDR_SHIFT;
> ++      if (gmac->variant->soc_has_internal_phy) {
> ++              if (of_property_read_bool(priv->plat->phy_node,
> ++                                        "allwinner,leds-active-low"))
> ++                      reg |= H3_EPHY_LED_POL;
> ++              else
> ++                      reg &= ~H3_EPHY_LED_POL;
> ++
> ++              /* Force EPHY xtal frequency to 24MHz. */
> ++              reg |= H3_EPHY_CLK_SEL;
> ++
> ++              ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node);
> ++              if (ret < 0) {
> ++                      dev_err(priv->device, "Could not parse MDIO addr\n");
> ++                      return ret;
> +               }
> ++              /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
> ++               * address. No need to mask it again.
> ++               */
> ++              reg |= 1 << H3_EPHY_ADDR_SHIFT;
> +       }
> +
> +       if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
> +@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str
> +       regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);
> + }
> +
> +-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
> ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
> + {
> +-      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> +-      int ret;
> +-
> +-      if (!gmac->use_internal_phy)
> +-              return 0;
> ++      struct sunxi_priv_data *gmac = priv;
> +
> +-      ret = clk_prepare_enable(gmac->ephy_clk);
> +-      if (ret) {
> +-              dev_err(priv->device, "Cannot enable ephy\n");
> +-              return ret;
> ++      if (gmac->variant->soc_has_internal_phy) {
> ++              /* sun8i_dwmac_exit could be called with mdiomux uninit */
> ++              if (gmac->mux_handle)
> ++                      mdio_mux_uninit(gmac->mux_handle);
> ++              if (gmac->internal_phy_powered)
> ++                      sun8i_dwmac_unpower_internal_phy(gmac);
> +       }
> +
> +-      /* Make sure the EPHY is properly reseted, as U-Boot may leave
> +-       * it at deasserted state, and thus it may fail to reset EMAC.
> +-       */
> +-      reset_control_assert(gmac->rst_ephy);
> +-
> +-      ret = reset_control_deassert(gmac->rst_ephy);
> +-      if (ret) {
> +-              dev_err(priv->device, "Cannot deassert ephy\n");
> +-              clk_disable_unprepare(gmac->ephy_clk);
> +-              return ret;
> +-      }
> +-
> +-      return 0;
> +-}
> +-
> +-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
> +-{
> +-      if (!gmac->use_internal_phy)
> +-              return 0;
> +-
> +-      clk_disable_unprepare(gmac->ephy_clk);
> +-      reset_control_assert(gmac->rst_ephy);
> +-      return 0;
> +-}
> +-
> +-/* sun8i_power_phy() - Activate the PHY:
> +- * In case of error, no need to call sun8i_unpower_phy(),
> +- * it will be called anyway by sun8i_dwmac_exit()
> +- */
> +-static int sun8i_power_phy(struct stmmac_priv *priv)
> +-{
> +-      int ret;
> +-
> +-      ret = sun8i_dwmac_power_internal_phy(priv);
> +-      if (ret)
> +-              return ret;
> +-
> +-      ret = sun8i_dwmac_set_syscon(priv);
> +-      if (ret)
> +-              return ret;
> +-
> +-      /* After changing syscon value, the MAC need reset or it will use
> +-       * the last value (and so the last PHY set.
> +-       */
> +-      ret = sun8i_dwmac_reset(priv);
> +-      if (ret)
> +-              return ret;
> +-      return 0;
> +-}
> +-
> +-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac)
> +-{
> +       sun8i_dwmac_unset_syscon(gmac);
> +-      sun8i_dwmac_unpower_internal_phy(gmac);
> +-}
> +-
> +-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
> +-{
> +-      struct sunxi_priv_data *gmac = priv;
> +
> +-      sun8i_unpower_phy(gmac);
> ++      reset_control_put(gmac->rst_ephy);
> +
> +       clk_disable_unprepare(gmac->tx_clk);
> +
> +@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm
> +       if (!mac)
> +               return NULL;
> +
> +-      ret = sun8i_power_phy(priv);
> ++      ret = sun8i_dwmac_set_syscon(priv);
> +       if (ret)
> +               return NULL;
> +
> +@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat
> +       struct sunxi_priv_data *gmac;
> +       struct device *dev = &pdev->dev;
> +       int ret;
> ++      struct stmmac_priv *priv;
> ++      struct net_device *ndev;
> +
> +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
> +       if (ret)
> +@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat
> +       }
> +
> +       plat_dat->interface = of_get_phy_mode(dev->of_node);
> +-      if (plat_dat->interface == gmac->variant->internal_phy) {
> +-              dev_info(&pdev->dev, "Will use internal PHY\n");
> +-              gmac->use_internal_phy = true;
> +-              gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
> +-              if (IS_ERR(gmac->ephy_clk)) {
> +-                      ret = PTR_ERR(gmac->ephy_clk);
> +-                      dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret);
> +-                      return -EINVAL;
> +-              }
> +-
> +-              gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
> +-              if (IS_ERR(gmac->rst_ephy)) {
> +-                      ret = PTR_ERR(gmac->rst_ephy);
> +-                      if (ret == -EPROBE_DEFER)
> +-                              return ret;
> +-                      dev_err(&pdev->dev, "No EPHY reset control found %d\n",
> +-                              ret);
> +-                      return -EINVAL;
> +-              }
> +-      } else {
> +-              dev_info(&pdev->dev, "Will use external PHY\n");
> +-              gmac->use_internal_phy = false;
> +-      }
> +
> +       /* platform data specifying hardware features and callbacks.
> +        * hardware features were copied from Allwinner drivers.
> +@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat
> +
> +       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> +       if (ret)
> +-              sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
> ++              goto dwmac_exit;
> ++
> ++      ndev = dev_get_drvdata(&pdev->dev);
> ++      priv = netdev_priv(ndev);
> ++      /* The mux must be registered after parent MDIO
> ++       * so after stmmac_dvr_probe()
> ++       */
> ++      if (gmac->variant->soc_has_internal_phy) {
> ++              ret = get_ephy_nodes(priv);
> ++              if (ret)
> ++                      goto dwmac_exit;
> ++              ret = sun8i_dwmac_register_mdio_mux(priv);
> ++              if (ret) {
> ++                      dev_err(&pdev->dev, "Failed to register mux\n");
> ++                      goto dwmac_mux;
> ++              }
> ++      } else {
> ++              ret = sun8i_dwmac_reset(priv);
> ++              if (ret)
> ++                      goto dwmac_exit;
> ++      }
> +
> +       return ret;
> ++dwmac_mux:
> ++      sun8i_dwmac_unset_syscon(gmac);
> ++dwmac_exit:
> ++      sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
> ++return ret;
> + }
> +
> + static const struct of_device_id sun8i_dwmac_match[] = {
> diff --git a/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
> new file mode 100644
> index 0000000000..2f43585053
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
> @@ -0,0 +1,35 @@
> +From a8ff8ccb45d37efa64476958fc5e9a8d9716b23b Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 24 Oct 2017 19:57:14 +0200
> +Subject: [PATCH] net: stmmac: sun8i: Restore the compatibles
> +
> +The original dwmac-sun8i DT bindings have some issue on how to handle
> +integrated PHY and was reverted in last RC of 4.13.
> +But now we have a solution so we need to get back that was reverted.
> +
> +This patch restore compatibles about dwmac-sun8i
> +This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Signed-off-by: David S. Miller <davem@davemloft.net>
> +---
> + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
> + 1 file changed, 8 insertions(+)
> +
> +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> +@@ -1072,6 +1072,14 @@ return ret;
> + }
> +
> + static const struct of_device_id sun8i_dwmac_match[] = {
> ++      { .compatible = "allwinner,sun8i-h3-emac",
> ++              .data = &emac_variant_h3 },
> ++      { .compatible = "allwinner,sun8i-v3s-emac",
> ++              .data = &emac_variant_v3s },
> ++      { .compatible = "allwinner,sun8i-a83t-emac",
> ++              .data = &emac_variant_a83t },
> ++      { .compatible = "allwinner,sun50i-a64-emac",
> ++              .data = &emac_variant_a64 },
> +       { }
> + };
> + MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
> diff --git a/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
> new file mode 100644
> index 0000000000..b89278d5d3
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
> @@ -0,0 +1,292 @@
> +From 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:12 +0100
> +Subject: [PATCH] ARM: dts: sunxi: Restore EMAC changes (boards)
> +
> +The original dwmac-sun8i DT bindings have some issue on how to handle
> +integrated PHY and was reverted in last RC of 4.13.
> +But now we have a solution so we need to get back that was reverted.
> +
> +This patch restore all boards DT about dwmac-sun8i
> +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +++++++
> + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++
> + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts     | 29 +++++++++++++++++++++++
> + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 ++++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 +++++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 +++++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 ++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 +++++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 +++++++++++++++++
> + arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 +++++++++++++
> + 10 files changed, 131 insertions(+)
> +
> +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> +@@ -56,6 +56,8 @@
> +
> +       aliases {
> +               serial0 = &uart0;
> ++              /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> ++              ethernet0 = &emac;
> +               ethernet1 = &xr819;
> +       };
> +
> +@@ -102,6 +104,13 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      phy-handle = <&int_mii_phy>;
> ++      phy-mode = "mii";
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> + &mmc0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc0_pins_a>;
> +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> +@@ -52,6 +52,7 @@
> +       compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +               serial1 = &uart1;
> +       };
> +@@ -114,6 +115,24 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <0>;
> ++      };
> ++};
> ++
> + &ir {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ir_pins_a>;
> +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> +@@ -45,6 +45,16 @@
> + / {
> +       model = "FriendlyArm NanoPi M1 Plus";
> +       compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
> ++
> ++      reg_gmac_3v3: gmac-3v3 {
> ++              compatible = "regulator-fixed";
> ++              regulator-name = "gmac-3v3";
> ++              regulator-min-microvolt = <3300000>;
> ++              regulator-max-microvolt = <3300000>;
> ++              startup-delay-us = <100000>;
> ++              enable-active-high;
> ++              gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
> ++      };
> + };
> +
> + &ehci1 {
> +@@ -55,6 +65,25 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++
> ++      allwinner,leds-active-low;
> ++
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <7>;
> ++      };
> ++};
> ++
> + &ohci1 {
> +       status = "okay";
> + };
> +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> +@@ -46,3 +46,10 @@
> +       model = "FriendlyARM NanoPi NEO";
> +       compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
> + };
> ++
> ++&emac {
> ++      phy-handle = <&int_mii_phy>;
> ++      phy-mode = "mii";
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> +@@ -54,6 +54,7 @@
> +       aliases {
> +               serial0 = &uart0;
> +               /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> ++              ethernet0 = &emac;
> +               ethernet1 = &rtl8189;
> +       };
> +
> +@@ -117,6 +118,13 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      phy-handle = <&int_mii_phy>;
> ++      phy-mode = "mii";
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> + &ir {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ir_pins_a>;
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> +@@ -52,6 +52,7 @@
> +       compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -97,6 +98,13 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      phy-handle = <&int_mii_phy>;
> ++      phy-mode = "mii";
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> + &mmc0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> +@@ -53,6 +53,11 @@
> +       };
> + };
> +
> ++&emac {
> ++      /* LEDs changed to active high on the plus */
> ++      /delete-property/ allwinner,leds-active-low;
> ++};
> ++
> + &mmc1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc1_pins_a>;
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> +@@ -52,6 +52,7 @@
> +       compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -113,6 +114,13 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      phy-handle = <&int_mii_phy>;
> ++      phy-mode = "mii";
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> + &ir {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ir_pins_a>;
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> +@@ -47,6 +47,10 @@
> +       model = "Xunlong Orange Pi Plus / Plus 2";
> +       compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
> +
> ++      aliases {
> ++              ethernet0 = &emac;
> ++      };
> ++
> +       reg_gmac_3v3: gmac-3v3 {
> +               compatible = "regulator-fixed";
> +               regulator-name = "gmac-3v3";
> +@@ -74,6 +78,24 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++
> ++      allwinner,leds-active-low;
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <0>;
> ++      };
> ++};
> ++
> + &mmc2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc2_8bit_pins>;
> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> +@@ -61,3 +61,19 @@
> +               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> +       };
> + };
> ++
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> diff --git a/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
> new file mode 100644
> index 0000000000..9e7319b4c8
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
> @@ -0,0 +1,54 @@
> +From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:10 +0100
> +Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
> +
> +The original dwmac-sun8i DT bindings have some issue on how to handle
> +integrated PHY and was reverted in last RC of 4.13.
> +But now we have a solution so we need to get back that was reverted.
> +
> +This patch restore sunxi-h3-h5.dtsi
> +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
> + 1 file changed, 26 insertions(+)
> +
> +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +@@ -391,6 +391,32 @@
> +                       clocks = <&osc24M>;
> +               };
> +
> ++              emac: ethernet@1c30000 {
> ++                      compatible = "allwinner,sun8i-h3-emac";
> ++                      syscon = <&syscon>;
> ++                      reg = <0x01c30000 0x10000>;
> ++                      interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> ++                      interrupt-names = "macirq";
> ++                      resets = <&ccu RST_BUS_EMAC>;
> ++                      reset-names = "stmmaceth";
> ++                      clocks = <&ccu CLK_BUS_EMAC>;
> ++                      clock-names = "stmmaceth";
> ++                      #address-cells = <1>;
> ++                      #size-cells = <0>;
> ++                      status = "disabled";
> ++
> ++                      mdio: mdio {
> ++                              #address-cells = <1>;
> ++                              #size-cells = <0>;
> ++                              int_mii_phy: ethernet-phy@1 {
> ++                                      compatible = "ethernet-phy-ieee802.3-c22";
> ++                                      reg = <1>;
> ++                                      clocks = <&ccu CLK_BUS_EPHY>;
> ++                                      resets = <&ccu RST_BUS_EPHY>;
> ++                              };
> ++                      };
> ++              };
> ++
> +               spi0: spi@01c68000 {
> +                       compatible = "allwinner,sun8i-h3-spi";
> +                       reg = <0x01c68000 0x1000>;
> diff --git a/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
> new file mode 100644
> index 0000000000..2db4f13609
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
> @@ -0,0 +1,59 @@
> +From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:11 +0100
> +Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by
> + sun8i-h3-emac
> +
> +Since dwmac-sun8i could use either an integrated PHY or an external PHY
> +(which could be at same MDIO address), we need to represent this selection
> +by a MDIO switch.
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++----
> + 1 file changed, 27 insertions(+), 4 deletions(-)
> +
> +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +@@ -408,11 +408,34 @@
> +                       mdio: mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +-                              int_mii_phy: ethernet-phy@1 {
> +-                                      compatible = "ethernet-phy-ieee802.3-c22";
> ++                              compatible = "snps,dwmac-mdio";
> ++                      };
> ++
> ++                      mdio-mux {
> ++                              compatible = "allwinner,sun8i-h3-mdio-mux";
> ++                              #address-cells = <1>;
> ++                              #size-cells = <0>;
> ++
> ++                              mdio-parent-bus = <&mdio>;
> ++                              /* Only one MDIO is usable at the time */
> ++                              internal_mdio: mdio@1 {
> ++                                      compatible = "allwinner,sun8i-h3-mdio-internal";
> +                                       reg = <1>;
> +-                                      clocks = <&ccu CLK_BUS_EPHY>;
> +-                                      resets = <&ccu RST_BUS_EPHY>;
> ++                                      #address-cells = <1>;
> ++                                      #size-cells = <0>;
> ++
> ++                                      int_mii_phy: ethernet-phy@1 {
> ++                                              compatible = "ethernet-phy-ieee802.3-c22";
> ++                                              reg = <1>;
> ++                                              clocks = <&ccu CLK_BUS_EPHY>;
> ++                                              resets = <&ccu RST_BUS_EPHY>;
> ++                                      };
> ++                              };
> ++
> ++                              external_mdio: mdio@2 {
> ++                                      reg = <2>;
> ++                                      #address-cells = <1>;
> ++                                      #size-cells = <0>;
> +                               };
> +                       };
> +               };
> diff --git a/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
> new file mode 100644
> index 0000000000..af4a921583
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
> @@ -0,0 +1,184 @@
> +From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:13 +0100
> +Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes
> +
> +The original dwmac-sun8i DT bindings have some issue on how to handle
> +integrated PHY and was reverted in last RC of 4.13.
> +But now we have a solution so we need to get back that was reverted.
> +
> +This patch restore arm64 DT about dwmac-sun8i for A64
> +This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 ++++++++++++++++
> + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts    | 15 +++++++++++++++
> + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +++++++++++++++++
> + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts    | 16 ++++++++++++++++
> + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi        | 20 ++++++++++++++++++++
> + 5 files changed, 84 insertions(+)
> +
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> +@@ -51,6 +51,7 @@
> +       compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +               serial1 = &uart1;
> +       };
> +@@ -69,6 +70,14 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&rgmii_pins>;
> ++      phy-mode = "rgmii";
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      status = "okay";
> ++};
> ++
> + &i2c1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&i2c1_pins>;
> +@@ -79,6 +88,13 @@
> +       bias-pull-up;
> + };
> +
> ++&mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> ++
> + &mmc0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc0_pins>;
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
> +@@ -48,3 +48,18 @@
> +
> +       /* TODO: Camera, touchscreen, etc. */
> + };
> ++
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&rgmii_pins>;
> ++      phy-mode = "rgmii";
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      status = "okay";
> ++};
> ++
> ++&mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> +@@ -51,6 +51,7 @@
> +       compatible = "pine64,pine64", "allwinner,sun50i-a64";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +               serial1 = &uart1;
> +               serial2 = &uart2;
> +@@ -71,6 +72,15 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&rmii_pins>;
> ++      phy-mode = "rmii";
> ++      phy-handle = <&ext_rmii_phy1>;
> ++      status = "okay";
> ++
> ++};
> ++
> + &i2c1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&i2c1_pins>;
> +@@ -81,6 +91,13 @@
> +       bias-pull-up;
> + };
> +
> ++&mdio {
> ++      ext_rmii_phy1: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> ++
> + &mmc0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc0_pins>;
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> +@@ -53,6 +53,7 @@
> +                    "allwinner,sun50i-a64";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -76,6 +77,21 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&rgmii_pins>;
> ++      phy-mode = "rgmii";
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      status = "okay";
> ++};
> ++
> ++&mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> ++
> + &mmc2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc2_pins>;
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +@@ -449,6 +449,26 @@
> +                       #size-cells = <0>;
> +               };
> +
> ++              emac: ethernet@1c30000 {
> ++                      compatible = "allwinner,sun50i-a64-emac";
> ++                      syscon = <&syscon>;
> ++                      reg = <0x01c30000 0x10000>;
> ++                      interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> ++                      interrupt-names = "macirq";
> ++                      resets = <&ccu RST_BUS_EMAC>;
> ++                      reset-names = "stmmaceth";
> ++                      clocks = <&ccu CLK_BUS_EMAC>;
> ++                      clock-names = "stmmaceth";
> ++                      status = "disabled";
> ++                      #address-cells = <1>;
> ++                      #size-cells = <0>;
> ++
> ++                      mdio: mdio {
> ++                              #address-cells = <1>;
> ++                              #size-cells = <0>;
> ++                      };
> ++              };
> ++
> +               gic: interrupt-controller@1c81000 {
> +                       compatible = "arm,gic-400";
> +                       reg = <0x01c81000 0x1000>,
> diff --git a/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
> new file mode 100644
> index 0000000000..40efc9f3e8
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
> @@ -0,0 +1,28 @@
> +From 16416084e06e1ebff51a9e7721a8cc4ccc186f28 Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:15 +0100
> +Subject: [PATCH] arm64: dts: allwinner: add snps,dwmac-mdio compatible to
> + emac/mdio
> +
> +stmmac bindings docs said that its mdio node must have
> +compatible = "snps,dwmac-mdio";
> +Since dwmac-sun8i does not have any good reasons to not doing it, all
> +their MDIO node must have it.
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
> + 1 file changed, 1 insertion(+)
> +
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +@@ -464,6 +464,7 @@
> +                       #size-cells = <0>;
> +
> +                       mdio: mdio {
> ++                              compatible = "snps,dwmac-mdio";
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                       };
> diff --git a/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
> new file mode 100644
> index 0000000000..b2c9d75ad7
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
> @@ -0,0 +1,120 @@
> +From 44a94c7ef989317de81e3e7f84385be2bf1b5fe2 Mon Sep 17 00:00:00 2001
> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Date: Tue, 31 Oct 2017 09:19:14 +0100
> +Subject: [PATCH] arm64: dts: allwinner: H5: Restore EMAC changes
> +
> +The original dwmac-sun8i DT bindings have some issue on how to handle
> +integrated PHY and was reverted in last RC of 4.13.
> +But now we have a solution so we need to get back that was reverted.
> +
> +This patch restore arm64 DT about dwmac-sun8i for H5
> +This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
> +
> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++
> + .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++
> + .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts     | 17 +++++++++++++++++
> + 3 files changed, 51 insertions(+)
> +
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> +@@ -50,6 +50,7 @@
> +       compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -108,6 +109,22 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@7 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <7>;
> ++      };
> ++};
> ++
> + &mmc0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
> +@@ -59,6 +59,7 @@
> +       };
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -136,6 +137,22 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> ++
> + &ir {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ir_pins_a>;
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
> +@@ -54,6 +54,7 @@
> +       compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
> +
> +       aliases {
> ++              ethernet0 = &emac;
> +               serial0 = &uart0;
> +       };
> +
> +@@ -143,6 +144,22 @@
> +       status = "okay";
> + };
> +
> ++&emac {
> ++      pinctrl-names = "default";
> ++      pinctrl-0 = <&emac_rgmii_pins>;
> ++      phy-supply = <&reg_gmac_3v3>;
> ++      phy-handle = <&ext_rgmii_phy>;
> ++      phy-mode = "rgmii";
> ++      status = "okay";
> ++};
> ++
> ++&external_mdio {
> ++      ext_rgmii_phy: ethernet-phy@1 {
> ++              compatible = "ethernet-phy-ieee802.3-c22";
> ++              reg = <1>;
> ++      };
> ++};
> ++
> + &ir {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ir_pins_a>;
> diff --git a/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
> new file mode 100644
> index 0000000000..295fff2e74
> --- /dev/null
> +++ b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
> @@ -0,0 +1,51 @@
> +From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
> +From: Icenowy Zheng <icenowy@aosc.io>
> +Date: Fri, 10 Nov 2017 17:26:54 +0800
> +Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
> + boards
> +
> +On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
> +on the AXP803 PMIC.
> +
> +Add phy-handle property to these boards' emac node.
> +
> +Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> +Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
> +Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> +---
> + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts     | 1 +
> + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts           | 1 +
> + arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
> + 3 files changed, 3 insertions(+)
> +
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> +@@ -75,6 +75,7 @@
> +       pinctrl-0 = <&rgmii_pins>;
> +       phy-mode = "rgmii";
> +       phy-handle = <&ext_rgmii_phy>;
> ++      phy-supply = <&reg_dc1sw>;
> +       status = "okay";
> + };
> +
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> +@@ -77,6 +77,7 @@
> +       pinctrl-0 = <&rmii_pins>;
> +       phy-mode = "rmii";
> +       phy-handle = <&ext_rmii_phy1>;
> ++      phy-supply = <&reg_dc1sw>;
> +       status = "okay";
> +
> + };
> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> +@@ -82,6 +82,7 @@
> +       pinctrl-0 = <&rgmii_pins>;
> +       phy-mode = "rgmii";
> +       phy-handle = <&ext_rgmii_phy>;
> ++      phy-supply = <&reg_dc1sw>;
> +       status = "okay";
> + };
> +
> --
> 2.11.0
>
>
>
> _______________________________________________
> Lede-dev mailing list
> Lede-dev@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/lede-dev
Hauke Mehrtens Dec. 29, 2017, 11:14 a.m. | #2
On 12/29/2017 02:12 AM, Rosen Penev wrote:
> does it make sense to apply these patches to generic? AFAIK, ipq806x
> also uses this driver.

I think the changes here are pretty specific to the Allwinner SoCs, I do
not see a big advantage in having this for the other targets, it only
increases the amount of testing needed. Do you need the features added
by these patches in some other target?
I think also OMAP and probably more SoCs are using this Synopsis MAC.

Hauke

> 
> On Thu, Dec 28, 2017 at 2:43 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote:
>> Ethernet support was initial added in kernel 4.13, but deactivated
>> before the final release. This is backported from kernel 4.15.
>>
>> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
>> ---
>>  ...snps-dwmac-mdio-MDIOs-are-automatically-r.patch |  33 ++
>>  ...dwmac-sun8i-Handle-integrated-external-MD.patch | 506 +++++++++++++++++++++
>>  ...-net-stmmac-sun8i-Restore-the-compatibles.patch |  35 ++
>>  ...ARM-dts-sunxi-Restore-EMAC-changes-boards.patch | 292 ++++++++++++
>>  ...-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch |  54 +++
>>  ...xi-h3-h5-represent-the-mdio-switch-used-b.patch |  59 +++
>>  ...64-dts-allwinner-A64-Restore-EMAC-changes.patch | 184 ++++++++
>>  ...llwinner-add-snps-dwmac-mdio-compatible-t.patch |  28 ++
>>  ...m64-dts-allwinner-H5-Restore-EMAC-changes.patch | 120 +++++
>>  ...nner-a64-add-Ethernet-PHY-regulator-for-s.patch |  51 +++
>>  10 files changed, 1362 insertions(+)
>>  create mode 100644 target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
>>  create mode 100644 target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
>>
>> diff --git a/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
>> new file mode 100644
>> index 0000000000..3a9668b641
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
>> @@ -0,0 +1,33 @@
>> +From b5beecb580376cd8d959eb990abece6a748a3ce3 Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 24 Oct 2017 19:57:12 +0200
>> +Subject: [PATCH] net: stmmac: snps, dwmac-mdio MDIOs are automatically
>> + registered
>> +
>> +stmmac bindings docs said that its mdio node must have
>> +compatible = "snps,dwmac-mdio";
>> +Since dwmac-sun8i does not have any good reasons to not doing it, all
>> +their MDIO node must have it.
>> +
>> +Since these compatible is automatically registered, dwmac-sun8i compatible
>> +does not need to be in need_mdio_ids.
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Signed-off-by: David S. Miller <davem@davemloft.net>
>> +---
>> + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ----
>> + 1 file changed, 4 deletions(-)
>> +
>> +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> +@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stm
>> +       bool mdio = true;
>> +       static const struct of_device_id need_mdio_ids[] = {
>> +               { .compatible = "snps,dwc-qos-ethernet-4.10" },
>> +-              { .compatible = "allwinner,sun8i-a83t-emac" },
>> +-              { .compatible = "allwinner,sun8i-h3-emac" },
>> +-              { .compatible = "allwinner,sun8i-v3s-emac" },
>> +-              { .compatible = "allwinner,sun50i-a64-emac" },
>> +               {},
>> +       };
>> +
>> diff --git a/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
>> new file mode 100644
>> index 0000000000..8e0527f3d8
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
>> @@ -0,0 +1,506 @@
>> +From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 24 Oct 2017 19:57:13 +0200
>> +Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
>> +
>> +The Allwinner H3 SoC have two distinct MDIO bus, only one could be
>> +active at the same time.
>> +The selection of the active MDIO bus are done via some bits in the EMAC
>> +register of the system controller.
>> +
>> +This patch implement this MDIO switch via a custom MDIO-mux.
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>> +Signed-off-by: David S. Miller <davem@davemloft.net>
>> +---
>> + drivers/net/ethernet/stmicro/stmmac/Kconfig       |   1 +
>> + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++--------
>> + 2 files changed, 224 insertions(+), 130 deletions(-)
>> +
>> +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +@@ -159,6 +159,7 @@ config DWMAC_SUN8I
>> +       tristate "Allwinner sun8i GMAC support"
>> +       default ARCH_SUNXI
>> +       depends on OF && (ARCH_SUNXI || COMPILE_TEST)
>> ++      select MDIO_BUS_MUX
>> +       ---help---
>> +         Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
>> +
>> +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
>> ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
>> +@@ -17,6 +17,7 @@
>> + #include <linux/clk.h>
>> + #include <linux/io.h>
>> + #include <linux/iopoll.h>
>> ++#include <linux/mdio-mux.h>
>> + #include <linux/mfd/syscon.h>
>> + #include <linux/module.h>
>> + #include <linux/of_device.h>
>> +@@ -41,14 +42,14 @@
>> +  *                            This value is used for disabling properly EMAC
>> +  *                            and used as a good starting value in case of the
>> +  *                            boot process(uboot) leave some stuff.
>> +- * @internal_phy:             Does the MAC embed an internal PHY
>> ++ * @soc_has_internal_phy:     Does the MAC embed an internal PHY
>> +  * @support_mii:              Does the MAC handle MII
>> +  * @support_rmii:             Does the MAC handle RMII
>> +  * @support_rgmii:            Does the MAC handle RGMII
>> +  */
>> + struct emac_variant {
>> +       u32 default_syscon_value;
>> +-      int internal_phy;
>> ++      bool soc_has_internal_phy;
>> +       bool support_mii;
>> +       bool support_rmii;
>> +       bool support_rgmii;
>> +@@ -61,7 +62,8 @@ struct emac_variant {
>> +  * @rst_ephy: reference to the optional EPHY reset for the internal PHY
>> +  * @variant:  reference to the current board variant
>> +  * @regmap:   regmap for using the syscon
>> +- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
>> ++ * @internal_phy_powered: Does the internal PHY is enabled
>> ++ * @mux_handle:       Internal pointer used by mdio-mux lib
>> +  */
>> + struct sunxi_priv_data {
>> +       struct clk *tx_clk;
>> +@@ -70,12 +72,13 @@ struct sunxi_priv_data {
>> +       struct reset_control *rst_ephy;
>> +       const struct emac_variant *variant;
>> +       struct regmap *regmap;
>> +-      bool use_internal_phy;
>> ++      bool internal_phy_powered;
>> ++      void *mux_handle;
>> + };
>> +
>> + static const struct emac_variant emac_variant_h3 = {
>> +       .default_syscon_value = 0x58000,
>> +-      .internal_phy = PHY_INTERFACE_MODE_MII,
>> ++      .soc_has_internal_phy = true,
>> +       .support_mii = true,
>> +       .support_rmii = true,
>> +       .support_rgmii = true
>> +@@ -83,20 +86,20 @@ static const struct emac_variant emac_va
>> +
>> + static const struct emac_variant emac_variant_v3s = {
>> +       .default_syscon_value = 0x38000,
>> +-      .internal_phy = PHY_INTERFACE_MODE_MII,
>> ++      .soc_has_internal_phy = true,
>> +       .support_mii = true
>> + };
>> +
>> + static const struct emac_variant emac_variant_a83t = {
>> +       .default_syscon_value = 0,
>> +-      .internal_phy = 0,
>> ++      .soc_has_internal_phy = false,
>> +       .support_mii = true,
>> +       .support_rgmii = true
>> + };
>> +
>> + static const struct emac_variant emac_variant_a64 = {
>> +       .default_syscon_value = 0,
>> +-      .internal_phy = 0,
>> ++      .soc_has_internal_phy = false,
>> +       .support_mii = true,
>> +       .support_rmii = true,
>> +       .support_rgmii = true
>> +@@ -195,6 +198,9 @@ static const struct emac_variant emac_va
>> + #define H3_EPHY_LED_POL               BIT(17) /* 1: active low, 0: active high */
>> + #define H3_EPHY_SHUTDOWN      BIT(16) /* 1: shutdown, 0: power up */
>> + #define H3_EPHY_SELECT                BIT(15) /* 1: internal PHY, 0: external PHY */
>> ++#define H3_EPHY_MUX_MASK      (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
>> ++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID      1
>> ++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID      2
>> +
>> + /* H3/A64 specific bits */
>> + #define SYSCON_RMII_EN                BIT(13) /* 1: enable RMII (overrides EPIT) */
>> +@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm
>> +       return 0;
>> + }
>> +
>> ++/* Search in mdio-mux node for internal PHY node and get its clk/reset */
>> ++static int get_ephy_nodes(struct stmmac_priv *priv)
>> ++{
>> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> ++      struct device_node *mdio_mux, *iphynode;
>> ++      struct device_node *mdio_internal;
>> ++      int ret;
>> ++
>> ++      mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
>> ++      if (!mdio_mux) {
>> ++              dev_err(priv->device, "Cannot get mdio-mux node\n");
>> ++              return -ENODEV;
>> ++      }
>> ++
>> ++      mdio_internal = of_find_compatible_node(mdio_mux, NULL,
>> ++                                              "allwinner,sun8i-h3-mdio-internal");
>> ++      if (!mdio_internal) {
>> ++              dev_err(priv->device, "Cannot get internal_mdio node\n");
>> ++              return -ENODEV;
>> ++      }
>> ++
>> ++      /* Seek for internal PHY */
>> ++      for_each_child_of_node(mdio_internal, iphynode) {
>> ++              gmac->ephy_clk = of_clk_get(iphynode, 0);
>> ++              if (IS_ERR(gmac->ephy_clk))
>> ++                      continue;
>> ++              gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);
>> ++              if (IS_ERR(gmac->rst_ephy)) {
>> ++                      ret = PTR_ERR(gmac->rst_ephy);
>> ++                      if (ret == -EPROBE_DEFER)
>> ++                              return ret;
>> ++                      continue;
>> ++              }
>> ++              dev_info(priv->device, "Found internal PHY node\n");
>> ++              return 0;
>> ++      }
>> ++      return -ENODEV;
>> ++}
>> ++
>> ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
>> ++{
>> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> ++      int ret;
>> ++
>> ++      if (gmac->internal_phy_powered) {
>> ++              dev_warn(priv->device, "Internal PHY already powered\n");
>> ++              return 0;
>> ++      }
>> ++
>> ++      dev_info(priv->device, "Powering internal PHY\n");
>> ++      ret = clk_prepare_enable(gmac->ephy_clk);
>> ++      if (ret) {
>> ++              dev_err(priv->device, "Cannot enable internal PHY\n");
>> ++              return ret;
>> ++      }
>> ++
>> ++      /* Make sure the EPHY is properly reseted, as U-Boot may leave
>> ++       * it at deasserted state, and thus it may fail to reset EMAC.
>> ++       */
>> ++      reset_control_assert(gmac->rst_ephy);
>> ++
>> ++      ret = reset_control_deassert(gmac->rst_ephy);
>> ++      if (ret) {
>> ++              dev_err(priv->device, "Cannot deassert internal phy\n");
>> ++              clk_disable_unprepare(gmac->ephy_clk);
>> ++              return ret;
>> ++      }
>> ++
>> ++      gmac->internal_phy_powered = true;
>> ++
>> ++      return 0;
>> ++}
>> ++
>> ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
>> ++{
>> ++      if (!gmac->internal_phy_powered)
>> ++              return 0;
>> ++
>> ++      clk_disable_unprepare(gmac->ephy_clk);
>> ++      reset_control_assert(gmac->rst_ephy);
>> ++      gmac->internal_phy_powered = false;
>> ++      return 0;
>> ++}
>> ++
>> ++/* MDIO multiplexing switch function
>> ++ * This function is called by the mdio-mux layer when it thinks the mdio bus
>> ++ * multiplexer needs to switch.
>> ++ * 'current_child' is the current value of the mux register
>> ++ * 'desired_child' is the value of the 'reg' property of the target child MDIO
>> ++ * node.
>> ++ * The first time this function is called, current_child == -1.
>> ++ * If current_child == desired_child, then the mux is already set to the
>> ++ * correct bus.
>> ++ */
>> ++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
>> ++                                   void *data)
>> ++{
>> ++      struct stmmac_priv *priv = data;
>> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> ++      u32 reg, val;
>> ++      int ret = 0;
>> ++      bool need_power_ephy = false;
>> ++
>> ++      if (current_child ^ desired_child) {
>> ++              regmap_read(gmac->regmap, SYSCON_EMAC_REG, &reg);
>> ++              switch (desired_child) {
>> ++              case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
>> ++                      dev_info(priv->device, "Switch mux to internal PHY");
>> ++                      val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
>> ++
>> ++                      need_power_ephy = true;
>> ++                      break;
>> ++              case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
>> ++                      dev_info(priv->device, "Switch mux to external PHY");
>> ++                      val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
>> ++                      need_power_ephy = false;
>> ++                      break;
>> ++              default:
>> ++                      dev_err(priv->device, "Invalid child ID %x\n",
>> ++                              desired_child);
>> ++                      return -EINVAL;
>> ++              }
>> ++              regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
>> ++              if (need_power_ephy) {
>> ++                      ret = sun8i_dwmac_power_internal_phy(priv);
>> ++                      if (ret)
>> ++                              return ret;
>> ++              } else {
>> ++                      sun8i_dwmac_unpower_internal_phy(gmac);
>> ++              }
>> ++              /* After changing syscon value, the MAC need reset or it will
>> ++               * use the last value (and so the last PHY set).
>> ++               */
>> ++              ret = sun8i_dwmac_reset(priv);
>> ++      }
>> ++      return ret;
>> ++}
>> ++
>> ++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
>> ++{
>> ++      int ret;
>> ++      struct device_node *mdio_mux;
>> ++      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> ++
>> ++      mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
>> ++      if (!mdio_mux)
>> ++              return -ENODEV;
>> ++
>> ++      ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
>> ++                          &gmac->mux_handle, priv, priv->mii);
>> ++      return ret;
>> ++}
>> ++
>> + static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
>> + {
>> +       struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> +@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct
>> +                        "Current syscon value is not the default %x (expect %x)\n",
>> +                        val, reg);
>> +
>> +-      if (gmac->variant->internal_phy) {
>> +-              if (!gmac->use_internal_phy) {
>> +-                      /* switch to external PHY interface */
>> +-                      reg &= ~H3_EPHY_SELECT;
>> +-              } else {
>> +-                      reg |= H3_EPHY_SELECT;
>> +-                      reg &= ~H3_EPHY_SHUTDOWN;
>> +-                      dev_dbg(priv->device, "Select internal_phy %x\n", reg);
>> +-
>> +-                      if (of_property_read_bool(priv->plat->phy_node,
>> +-                                                "allwinner,leds-active-low"))
>> +-                              reg |= H3_EPHY_LED_POL;
>> +-                      else
>> +-                              reg &= ~H3_EPHY_LED_POL;
>> +-
>> +-                      /* Force EPHY xtal frequency to 24MHz. */
>> +-                      reg |= H3_EPHY_CLK_SEL;
>> +-
>> +-                      ret = of_mdio_parse_addr(priv->device,
>> +-                                               priv->plat->phy_node);
>> +-                      if (ret < 0) {
>> +-                              dev_err(priv->device, "Could not parse MDIO addr\n");
>> +-                              return ret;
>> +-                      }
>> +-                      /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
>> +-                       * address. No need to mask it again.
>> +-                       */
>> +-                      reg |= ret << H3_EPHY_ADDR_SHIFT;
>> ++      if (gmac->variant->soc_has_internal_phy) {
>> ++              if (of_property_read_bool(priv->plat->phy_node,
>> ++                                        "allwinner,leds-active-low"))
>> ++                      reg |= H3_EPHY_LED_POL;
>> ++              else
>> ++                      reg &= ~H3_EPHY_LED_POL;
>> ++
>> ++              /* Force EPHY xtal frequency to 24MHz. */
>> ++              reg |= H3_EPHY_CLK_SEL;
>> ++
>> ++              ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node);
>> ++              if (ret < 0) {
>> ++                      dev_err(priv->device, "Could not parse MDIO addr\n");
>> ++                      return ret;
>> +               }
>> ++              /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
>> ++               * address. No need to mask it again.
>> ++               */
>> ++              reg |= 1 << H3_EPHY_ADDR_SHIFT;
>> +       }
>> +
>> +       if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
>> +@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str
>> +       regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);
>> + }
>> +
>> +-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
>> ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
>> + {
>> +-      struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
>> +-      int ret;
>> +-
>> +-      if (!gmac->use_internal_phy)
>> +-              return 0;
>> ++      struct sunxi_priv_data *gmac = priv;
>> +
>> +-      ret = clk_prepare_enable(gmac->ephy_clk);
>> +-      if (ret) {
>> +-              dev_err(priv->device, "Cannot enable ephy\n");
>> +-              return ret;
>> ++      if (gmac->variant->soc_has_internal_phy) {
>> ++              /* sun8i_dwmac_exit could be called with mdiomux uninit */
>> ++              if (gmac->mux_handle)
>> ++                      mdio_mux_uninit(gmac->mux_handle);
>> ++              if (gmac->internal_phy_powered)
>> ++                      sun8i_dwmac_unpower_internal_phy(gmac);
>> +       }
>> +
>> +-      /* Make sure the EPHY is properly reseted, as U-Boot may leave
>> +-       * it at deasserted state, and thus it may fail to reset EMAC.
>> +-       */
>> +-      reset_control_assert(gmac->rst_ephy);
>> +-
>> +-      ret = reset_control_deassert(gmac->rst_ephy);
>> +-      if (ret) {
>> +-              dev_err(priv->device, "Cannot deassert ephy\n");
>> +-              clk_disable_unprepare(gmac->ephy_clk);
>> +-              return ret;
>> +-      }
>> +-
>> +-      return 0;
>> +-}
>> +-
>> +-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
>> +-{
>> +-      if (!gmac->use_internal_phy)
>> +-              return 0;
>> +-
>> +-      clk_disable_unprepare(gmac->ephy_clk);
>> +-      reset_control_assert(gmac->rst_ephy);
>> +-      return 0;
>> +-}
>> +-
>> +-/* sun8i_power_phy() - Activate the PHY:
>> +- * In case of error, no need to call sun8i_unpower_phy(),
>> +- * it will be called anyway by sun8i_dwmac_exit()
>> +- */
>> +-static int sun8i_power_phy(struct stmmac_priv *priv)
>> +-{
>> +-      int ret;
>> +-
>> +-      ret = sun8i_dwmac_power_internal_phy(priv);
>> +-      if (ret)
>> +-              return ret;
>> +-
>> +-      ret = sun8i_dwmac_set_syscon(priv);
>> +-      if (ret)
>> +-              return ret;
>> +-
>> +-      /* After changing syscon value, the MAC need reset or it will use
>> +-       * the last value (and so the last PHY set.
>> +-       */
>> +-      ret = sun8i_dwmac_reset(priv);
>> +-      if (ret)
>> +-              return ret;
>> +-      return 0;
>> +-}
>> +-
>> +-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac)
>> +-{
>> +       sun8i_dwmac_unset_syscon(gmac);
>> +-      sun8i_dwmac_unpower_internal_phy(gmac);
>> +-}
>> +-
>> +-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
>> +-{
>> +-      struct sunxi_priv_data *gmac = priv;
>> +
>> +-      sun8i_unpower_phy(gmac);
>> ++      reset_control_put(gmac->rst_ephy);
>> +
>> +       clk_disable_unprepare(gmac->tx_clk);
>> +
>> +@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm
>> +       if (!mac)
>> +               return NULL;
>> +
>> +-      ret = sun8i_power_phy(priv);
>> ++      ret = sun8i_dwmac_set_syscon(priv);
>> +       if (ret)
>> +               return NULL;
>> +
>> +@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat
>> +       struct sunxi_priv_data *gmac;
>> +       struct device *dev = &pdev->dev;
>> +       int ret;
>> ++      struct stmmac_priv *priv;
>> ++      struct net_device *ndev;
>> +
>> +       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
>> +       if (ret)
>> +@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat
>> +       }
>> +
>> +       plat_dat->interface = of_get_phy_mode(dev->of_node);
>> +-      if (plat_dat->interface == gmac->variant->internal_phy) {
>> +-              dev_info(&pdev->dev, "Will use internal PHY\n");
>> +-              gmac->use_internal_phy = true;
>> +-              gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
>> +-              if (IS_ERR(gmac->ephy_clk)) {
>> +-                      ret = PTR_ERR(gmac->ephy_clk);
>> +-                      dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret);
>> +-                      return -EINVAL;
>> +-              }
>> +-
>> +-              gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
>> +-              if (IS_ERR(gmac->rst_ephy)) {
>> +-                      ret = PTR_ERR(gmac->rst_ephy);
>> +-                      if (ret == -EPROBE_DEFER)
>> +-                              return ret;
>> +-                      dev_err(&pdev->dev, "No EPHY reset control found %d\n",
>> +-                              ret);
>> +-                      return -EINVAL;
>> +-              }
>> +-      } else {
>> +-              dev_info(&pdev->dev, "Will use external PHY\n");
>> +-              gmac->use_internal_phy = false;
>> +-      }
>> +
>> +       /* platform data specifying hardware features and callbacks.
>> +        * hardware features were copied from Allwinner drivers.
>> +@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat
>> +
>> +       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>> +       if (ret)
>> +-              sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
>> ++              goto dwmac_exit;
>> ++
>> ++      ndev = dev_get_drvdata(&pdev->dev);
>> ++      priv = netdev_priv(ndev);
>> ++      /* The mux must be registered after parent MDIO
>> ++       * so after stmmac_dvr_probe()
>> ++       */
>> ++      if (gmac->variant->soc_has_internal_phy) {
>> ++              ret = get_ephy_nodes(priv);
>> ++              if (ret)
>> ++                      goto dwmac_exit;
>> ++              ret = sun8i_dwmac_register_mdio_mux(priv);
>> ++              if (ret) {
>> ++                      dev_err(&pdev->dev, "Failed to register mux\n");
>> ++                      goto dwmac_mux;
>> ++              }
>> ++      } else {
>> ++              ret = sun8i_dwmac_reset(priv);
>> ++              if (ret)
>> ++                      goto dwmac_exit;
>> ++      }
>> +
>> +       return ret;
>> ++dwmac_mux:
>> ++      sun8i_dwmac_unset_syscon(gmac);
>> ++dwmac_exit:
>> ++      sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
>> ++return ret;
>> + }
>> +
>> + static const struct of_device_id sun8i_dwmac_match[] = {
>> diff --git a/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
>> new file mode 100644
>> index 0000000000..2f43585053
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
>> @@ -0,0 +1,35 @@
>> +From a8ff8ccb45d37efa64476958fc5e9a8d9716b23b Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 24 Oct 2017 19:57:14 +0200
>> +Subject: [PATCH] net: stmmac: sun8i: Restore the compatibles
>> +
>> +The original dwmac-sun8i DT bindings have some issue on how to handle
>> +integrated PHY and was reverted in last RC of 4.13.
>> +But now we have a solution so we need to get back that was reverted.
>> +
>> +This patch restore compatibles about dwmac-sun8i
>> +This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Signed-off-by: David S. Miller <davem@davemloft.net>
>> +---
>> + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
>> + 1 file changed, 8 insertions(+)
>> +
>> +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
>> ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
>> +@@ -1072,6 +1072,14 @@ return ret;
>> + }
>> +
>> + static const struct of_device_id sun8i_dwmac_match[] = {
>> ++      { .compatible = "allwinner,sun8i-h3-emac",
>> ++              .data = &emac_variant_h3 },
>> ++      { .compatible = "allwinner,sun8i-v3s-emac",
>> ++              .data = &emac_variant_v3s },
>> ++      { .compatible = "allwinner,sun8i-a83t-emac",
>> ++              .data = &emac_variant_a83t },
>> ++      { .compatible = "allwinner,sun50i-a64-emac",
>> ++              .data = &emac_variant_a64 },
>> +       { }
>> + };
>> + MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
>> diff --git a/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
>> new file mode 100644
>> index 0000000000..b89278d5d3
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
>> @@ -0,0 +1,292 @@
>> +From 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:12 +0100
>> +Subject: [PATCH] ARM: dts: sunxi: Restore EMAC changes (boards)
>> +
>> +The original dwmac-sun8i DT bindings have some issue on how to handle
>> +integrated PHY and was reverted in last RC of 4.13.
>> +But now we have a solution so we need to get back that was reverted.
>> +
>> +This patch restore all boards DT about dwmac-sun8i
>> +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +++++++
>> + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++
>> + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts     | 29 +++++++++++++++++++++++
>> + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 ++++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 +++++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 +++++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 ++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 +++++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 +++++++++++++++++
>> + arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 +++++++++++++
>> + 10 files changed, 131 insertions(+)
>> +
>> +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
>> +@@ -56,6 +56,8 @@
>> +
>> +       aliases {
>> +               serial0 = &uart0;
>> ++              /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
>> ++              ethernet0 = &emac;
>> +               ethernet1 = &xr819;
>> +       };
>> +
>> +@@ -102,6 +104,13 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      phy-handle = <&int_mii_phy>;
>> ++      phy-mode = "mii";
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> + &mmc0 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc0_pins_a>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
>> +@@ -52,6 +52,7 @@
>> +       compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +               serial1 = &uart1;
>> +       };
>> +@@ -114,6 +115,24 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <0>;
>> ++      };
>> ++};
>> ++
>> + &ir {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&ir_pins_a>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
>> +@@ -45,6 +45,16 @@
>> + / {
>> +       model = "FriendlyArm NanoPi M1 Plus";
>> +       compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
>> ++
>> ++      reg_gmac_3v3: gmac-3v3 {
>> ++              compatible = "regulator-fixed";
>> ++              regulator-name = "gmac-3v3";
>> ++              regulator-min-microvolt = <3300000>;
>> ++              regulator-max-microvolt = <3300000>;
>> ++              startup-delay-us = <100000>;
>> ++              enable-active-high;
>> ++              gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
>> ++      };
>> + };
>> +
>> + &ehci1 {
>> +@@ -55,6 +65,25 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++
>> ++      allwinner,leds-active-low;
>> ++
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <7>;
>> ++      };
>> ++};
>> ++
>> + &ohci1 {
>> +       status = "okay";
>> + };
>> +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
>> +@@ -46,3 +46,10 @@
>> +       model = "FriendlyARM NanoPi NEO";
>> +       compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
>> + };
>> ++
>> ++&emac {
>> ++      phy-handle = <&int_mii_phy>;
>> ++      phy-mode = "mii";
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
>> +@@ -54,6 +54,7 @@
>> +       aliases {
>> +               serial0 = &uart0;
>> +               /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
>> ++              ethernet0 = &emac;
>> +               ethernet1 = &rtl8189;
>> +       };
>> +
>> +@@ -117,6 +118,13 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      phy-handle = <&int_mii_phy>;
>> ++      phy-mode = "mii";
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> + &ir {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&ir_pins_a>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
>> +@@ -52,6 +52,7 @@
>> +       compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -97,6 +98,13 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      phy-handle = <&int_mii_phy>;
>> ++      phy-mode = "mii";
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> + &mmc0 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
>> +@@ -53,6 +53,11 @@
>> +       };
>> + };
>> +
>> ++&emac {
>> ++      /* LEDs changed to active high on the plus */
>> ++      /delete-property/ allwinner,leds-active-low;
>> ++};
>> ++
>> + &mmc1 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc1_pins_a>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
>> +@@ -52,6 +52,7 @@
>> +       compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -113,6 +114,13 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      phy-handle = <&int_mii_phy>;
>> ++      phy-mode = "mii";
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> + &ir {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&ir_pins_a>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
>> +@@ -47,6 +47,10 @@
>> +       model = "Xunlong Orange Pi Plus / Plus 2";
>> +       compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
>> +
>> ++      aliases {
>> ++              ethernet0 = &emac;
>> ++      };
>> ++
>> +       reg_gmac_3v3: gmac-3v3 {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "gmac-3v3";
>> +@@ -74,6 +78,24 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++
>> ++      allwinner,leds-active-low;
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <0>;
>> ++      };
>> ++};
>> ++
>> + &mmc2 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc2_8bit_pins>;
>> +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
>> ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
>> +@@ -61,3 +61,19 @@
>> +               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
>> +       };
>> + };
>> ++
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> diff --git a/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
>> new file mode 100644
>> index 0000000000..9e7319b4c8
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
>> @@ -0,0 +1,54 @@
>> +From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:10 +0100
>> +Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
>> +
>> +The original dwmac-sun8i DT bindings have some issue on how to handle
>> +integrated PHY and was reverted in last RC of 4.13.
>> +But now we have a solution so we need to get back that was reverted.
>> +
>> +This patch restore sunxi-h3-h5.dtsi
>> +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
>> + 1 file changed, 26 insertions(+)
>> +
>> +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> +@@ -391,6 +391,32 @@
>> +                       clocks = <&osc24M>;
>> +               };
>> +
>> ++              emac: ethernet@1c30000 {
>> ++                      compatible = "allwinner,sun8i-h3-emac";
>> ++                      syscon = <&syscon>;
>> ++                      reg = <0x01c30000 0x10000>;
>> ++                      interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
>> ++                      interrupt-names = "macirq";
>> ++                      resets = <&ccu RST_BUS_EMAC>;
>> ++                      reset-names = "stmmaceth";
>> ++                      clocks = <&ccu CLK_BUS_EMAC>;
>> ++                      clock-names = "stmmaceth";
>> ++                      #address-cells = <1>;
>> ++                      #size-cells = <0>;
>> ++                      status = "disabled";
>> ++
>> ++                      mdio: mdio {
>> ++                              #address-cells = <1>;
>> ++                              #size-cells = <0>;
>> ++                              int_mii_phy: ethernet-phy@1 {
>> ++                                      compatible = "ethernet-phy-ieee802.3-c22";
>> ++                                      reg = <1>;
>> ++                                      clocks = <&ccu CLK_BUS_EPHY>;
>> ++                                      resets = <&ccu RST_BUS_EPHY>;
>> ++                              };
>> ++                      };
>> ++              };
>> ++
>> +               spi0: spi@01c68000 {
>> +                       compatible = "allwinner,sun8i-h3-spi";
>> +                       reg = <0x01c68000 0x1000>;
>> diff --git a/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
>> new file mode 100644
>> index 0000000000..2db4f13609
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
>> @@ -0,0 +1,59 @@
>> +From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:11 +0100
>> +Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by
>> + sun8i-h3-emac
>> +
>> +Since dwmac-sun8i could use either an integrated PHY or an external PHY
>> +(which could be at same MDIO address), we need to represent this selection
>> +by a MDIO switch.
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++----
>> + 1 file changed, 27 insertions(+), 4 deletions(-)
>> +
>> +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
>> +@@ -408,11 +408,34 @@
>> +                       mdio: mdio {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +-                              int_mii_phy: ethernet-phy@1 {
>> +-                                      compatible = "ethernet-phy-ieee802.3-c22";
>> ++                              compatible = "snps,dwmac-mdio";
>> ++                      };
>> ++
>> ++                      mdio-mux {
>> ++                              compatible = "allwinner,sun8i-h3-mdio-mux";
>> ++                              #address-cells = <1>;
>> ++                              #size-cells = <0>;
>> ++
>> ++                              mdio-parent-bus = <&mdio>;
>> ++                              /* Only one MDIO is usable at the time */
>> ++                              internal_mdio: mdio@1 {
>> ++                                      compatible = "allwinner,sun8i-h3-mdio-internal";
>> +                                       reg = <1>;
>> +-                                      clocks = <&ccu CLK_BUS_EPHY>;
>> +-                                      resets = <&ccu RST_BUS_EPHY>;
>> ++                                      #address-cells = <1>;
>> ++                                      #size-cells = <0>;
>> ++
>> ++                                      int_mii_phy: ethernet-phy@1 {
>> ++                                              compatible = "ethernet-phy-ieee802.3-c22";
>> ++                                              reg = <1>;
>> ++                                              clocks = <&ccu CLK_BUS_EPHY>;
>> ++                                              resets = <&ccu RST_BUS_EPHY>;
>> ++                                      };
>> ++                              };
>> ++
>> ++                              external_mdio: mdio@2 {
>> ++                                      reg = <2>;
>> ++                                      #address-cells = <1>;
>> ++                                      #size-cells = <0>;
>> +                               };
>> +                       };
>> +               };
>> diff --git a/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
>> new file mode 100644
>> index 0000000000..af4a921583
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
>> @@ -0,0 +1,184 @@
>> +From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:13 +0100
>> +Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes
>> +
>> +The original dwmac-sun8i DT bindings have some issue on how to handle
>> +integrated PHY and was reverted in last RC of 4.13.
>> +But now we have a solution so we need to get back that was reverted.
>> +
>> +This patch restore arm64 DT about dwmac-sun8i for A64
>> +This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 ++++++++++++++++
>> + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts    | 15 +++++++++++++++
>> + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +++++++++++++++++
>> + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts    | 16 ++++++++++++++++
>> + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi        | 20 ++++++++++++++++++++
>> + 5 files changed, 84 insertions(+)
>> +
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
>> +@@ -51,6 +51,7 @@
>> +       compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +               serial1 = &uart1;
>> +       };
>> +@@ -69,6 +70,14 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&rgmii_pins>;
>> ++      phy-mode = "rgmii";
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      status = "okay";
>> ++};
>> ++
>> + &i2c1 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&i2c1_pins>;
>> +@@ -79,6 +88,13 @@
>> +       bias-pull-up;
>> + };
>> +
>> ++&mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> ++
>> + &mmc0 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc0_pins>;
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
>> +@@ -48,3 +48,18 @@
>> +
>> +       /* TODO: Camera, touchscreen, etc. */
>> + };
>> ++
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&rgmii_pins>;
>> ++      phy-mode = "rgmii";
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      status = "okay";
>> ++};
>> ++
>> ++&mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
>> +@@ -51,6 +51,7 @@
>> +       compatible = "pine64,pine64", "allwinner,sun50i-a64";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +               serial1 = &uart1;
>> +               serial2 = &uart2;
>> +@@ -71,6 +72,15 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&rmii_pins>;
>> ++      phy-mode = "rmii";
>> ++      phy-handle = <&ext_rmii_phy1>;
>> ++      status = "okay";
>> ++
>> ++};
>> ++
>> + &i2c1 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&i2c1_pins>;
>> +@@ -81,6 +91,13 @@
>> +       bias-pull-up;
>> + };
>> +
>> ++&mdio {
>> ++      ext_rmii_phy1: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> ++
>> + &mmc0 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc0_pins>;
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
>> +@@ -53,6 +53,7 @@
>> +                    "allwinner,sun50i-a64";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -76,6 +77,21 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&rgmii_pins>;
>> ++      phy-mode = "rgmii";
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      status = "okay";
>> ++};
>> ++
>> ++&mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> ++
>> + &mmc2 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc2_pins>;
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +@@ -449,6 +449,26 @@
>> +                       #size-cells = <0>;
>> +               };
>> +
>> ++              emac: ethernet@1c30000 {
>> ++                      compatible = "allwinner,sun50i-a64-emac";
>> ++                      syscon = <&syscon>;
>> ++                      reg = <0x01c30000 0x10000>;
>> ++                      interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
>> ++                      interrupt-names = "macirq";
>> ++                      resets = <&ccu RST_BUS_EMAC>;
>> ++                      reset-names = "stmmaceth";
>> ++                      clocks = <&ccu CLK_BUS_EMAC>;
>> ++                      clock-names = "stmmaceth";
>> ++                      status = "disabled";
>> ++                      #address-cells = <1>;
>> ++                      #size-cells = <0>;
>> ++
>> ++                      mdio: mdio {
>> ++                              #address-cells = <1>;
>> ++                              #size-cells = <0>;
>> ++                      };
>> ++              };
>> ++
>> +               gic: interrupt-controller@1c81000 {
>> +                       compatible = "arm,gic-400";
>> +                       reg = <0x01c81000 0x1000>,
>> diff --git a/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
>> new file mode 100644
>> index 0000000000..40efc9f3e8
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
>> @@ -0,0 +1,28 @@
>> +From 16416084e06e1ebff51a9e7721a8cc4ccc186f28 Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:15 +0100
>> +Subject: [PATCH] arm64: dts: allwinner: add snps,dwmac-mdio compatible to
>> + emac/mdio
>> +
>> +stmmac bindings docs said that its mdio node must have
>> +compatible = "snps,dwmac-mdio";
>> +Since dwmac-sun8i does not have any good reasons to not doing it, all
>> +their MDIO node must have it.
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
>> + 1 file changed, 1 insertion(+)
>> +
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +@@ -464,6 +464,7 @@
>> +                       #size-cells = <0>;
>> +
>> +                       mdio: mdio {
>> ++                              compatible = "snps,dwmac-mdio";
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                       };
>> diff --git a/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
>> new file mode 100644
>> index 0000000000..b2c9d75ad7
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
>> @@ -0,0 +1,120 @@
>> +From 44a94c7ef989317de81e3e7f84385be2bf1b5fe2 Mon Sep 17 00:00:00 2001
>> +From: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Date: Tue, 31 Oct 2017 09:19:14 +0100
>> +Subject: [PATCH] arm64: dts: allwinner: H5: Restore EMAC changes
>> +
>> +The original dwmac-sun8i DT bindings have some issue on how to handle
>> +integrated PHY and was reverted in last RC of 4.13.
>> +But now we have a solution so we need to get back that was reverted.
>> +
>> +This patch restore arm64 DT about dwmac-sun8i for H5
>> +This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
>> +
>> +Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
>> +Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++
>> + .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++
>> + .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts     | 17 +++++++++++++++++
>> + 3 files changed, 51 insertions(+)
>> +
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
>> +@@ -50,6 +50,7 @@
>> +       compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -108,6 +109,22 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@7 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <7>;
>> ++      };
>> ++};
>> ++
>> + &mmc0 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
>> +@@ -59,6 +59,7 @@
>> +       };
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -136,6 +137,22 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> ++
>> + &ir {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&ir_pins_a>;
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
>> +@@ -54,6 +54,7 @@
>> +       compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
>> +
>> +       aliases {
>> ++              ethernet0 = &emac;
>> +               serial0 = &uart0;
>> +       };
>> +
>> +@@ -143,6 +144,22 @@
>> +       status = "okay";
>> + };
>> +
>> ++&emac {
>> ++      pinctrl-names = "default";
>> ++      pinctrl-0 = <&emac_rgmii_pins>;
>> ++      phy-supply = <&reg_gmac_3v3>;
>> ++      phy-handle = <&ext_rgmii_phy>;
>> ++      phy-mode = "rgmii";
>> ++      status = "okay";
>> ++};
>> ++
>> ++&external_mdio {
>> ++      ext_rgmii_phy: ethernet-phy@1 {
>> ++              compatible = "ethernet-phy-ieee802.3-c22";
>> ++              reg = <1>;
>> ++      };
>> ++};
>> ++
>> + &ir {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&ir_pins_a>;
>> diff --git a/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
>> new file mode 100644
>> index 0000000000..295fff2e74
>> --- /dev/null
>> +++ b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
>> @@ -0,0 +1,51 @@
>> +From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
>> +From: Icenowy Zheng <icenowy@aosc.io>
>> +Date: Fri, 10 Nov 2017 17:26:54 +0800
>> +Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
>> + boards
>> +
>> +On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
>> +on the AXP803 PMIC.
>> +
>> +Add phy-handle property to these boards' emac node.
>> +
>> +Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> +Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
>> +Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
>> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> +---
>> + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts     | 1 +
>> + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts           | 1 +
>> + arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
>> + 3 files changed, 3 insertions(+)
>> +
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
>> +@@ -75,6 +75,7 @@
>> +       pinctrl-0 = <&rgmii_pins>;
>> +       phy-mode = "rgmii";
>> +       phy-handle = <&ext_rgmii_phy>;
>> ++      phy-supply = <&reg_dc1sw>;
>> +       status = "okay";
>> + };
>> +
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
>> +@@ -77,6 +77,7 @@
>> +       pinctrl-0 = <&rmii_pins>;
>> +       phy-mode = "rmii";
>> +       phy-handle = <&ext_rmii_phy1>;
>> ++      phy-supply = <&reg_dc1sw>;
>> +       status = "okay";
>> +
>> + };
>> +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
>> ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
>> +@@ -82,6 +82,7 @@
>> +       pinctrl-0 = <&rgmii_pins>;
>> +       phy-mode = "rgmii";
>> +       phy-handle = <&ext_rgmii_phy>;
>> ++      phy-supply = <&reg_dc1sw>;
>> +       status = "okay";
>> + };
>> +
>> --
>> 2.11.0
>>
>>
>>
>> _______________________________________________
>> Lede-dev mailing list
>> Lede-dev@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/lede-dev

Patch

diff --git a/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
new file mode 100644
index 0000000000..3a9668b641
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
@@ -0,0 +1,33 @@ 
+From b5beecb580376cd8d959eb990abece6a748a3ce3 Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 24 Oct 2017 19:57:12 +0200
+Subject: [PATCH] net: stmmac: snps, dwmac-mdio MDIOs are automatically
+ registered
+
+stmmac bindings docs said that its mdio node must have
+compatible = "snps,dwmac-mdio";
+Since dwmac-sun8i does not have any good reasons to not doing it, all
+their MDIO node must have it.
+
+Since these compatible is automatically registered, dwmac-sun8i compatible
+does not need to be in need_mdio_ids.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stm
+ 	bool mdio = true;
+ 	static const struct of_device_id need_mdio_ids[] = {
+ 		{ .compatible = "snps,dwc-qos-ethernet-4.10" },
+-		{ .compatible = "allwinner,sun8i-a83t-emac" },
+-		{ .compatible = "allwinner,sun8i-h3-emac" },
+-		{ .compatible = "allwinner,sun8i-v3s-emac" },
+-		{ .compatible = "allwinner,sun50i-a64-emac" },
+ 		{},
+ 	};
+ 
diff --git a/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
new file mode 100644
index 0000000000..8e0527f3d8
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
@@ -0,0 +1,506 @@ 
+From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 24 Oct 2017 19:57:13 +0200
+Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
+
+The Allwinner H3 SoC have two distinct MDIO bus, only one could be
+active at the same time.
+The selection of the active MDIO bus are done via some bits in the EMAC
+register of the system controller.
+
+This patch implement this MDIO switch via a custom MDIO-mux.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/stmicro/stmmac/Kconfig       |   1 +
+ drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++--------
+ 2 files changed, 224 insertions(+), 130 deletions(-)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
+@@ -159,6 +159,7 @@ config DWMAC_SUN8I
+ 	tristate "Allwinner sun8i GMAC support"
+ 	default ARCH_SUNXI
+ 	depends on OF && (ARCH_SUNXI || COMPILE_TEST)
++	select MDIO_BUS_MUX
+ 	---help---
+ 	  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
+ 
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+@@ -17,6 +17,7 @@
+ #include <linux/clk.h>
+ #include <linux/io.h>
+ #include <linux/iopoll.h>
++#include <linux/mdio-mux.h>
+ #include <linux/mfd/syscon.h>
+ #include <linux/module.h>
+ #include <linux/of_device.h>
+@@ -41,14 +42,14 @@
+  *				This value is used for disabling properly EMAC
+  *				and used as a good starting value in case of the
+  *				boot process(uboot) leave some stuff.
+- * @internal_phy:		Does the MAC embed an internal PHY
++ * @soc_has_internal_phy:	Does the MAC embed an internal PHY
+  * @support_mii:		Does the MAC handle MII
+  * @support_rmii:		Does the MAC handle RMII
+  * @support_rgmii:		Does the MAC handle RGMII
+  */
+ struct emac_variant {
+ 	u32 default_syscon_value;
+-	int internal_phy;
++	bool soc_has_internal_phy;
+ 	bool support_mii;
+ 	bool support_rmii;
+ 	bool support_rgmii;
+@@ -61,7 +62,8 @@ struct emac_variant {
+  * @rst_ephy:	reference to the optional EPHY reset for the internal PHY
+  * @variant:	reference to the current board variant
+  * @regmap:	regmap for using the syscon
+- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
++ * @internal_phy_powered: Does the internal PHY is enabled
++ * @mux_handle:	Internal pointer used by mdio-mux lib
+  */
+ struct sunxi_priv_data {
+ 	struct clk *tx_clk;
+@@ -70,12 +72,13 @@ struct sunxi_priv_data {
+ 	struct reset_control *rst_ephy;
+ 	const struct emac_variant *variant;
+ 	struct regmap *regmap;
+-	bool use_internal_phy;
++	bool internal_phy_powered;
++	void *mux_handle;
+ };
+ 
+ static const struct emac_variant emac_variant_h3 = {
+ 	.default_syscon_value = 0x58000,
+-	.internal_phy = PHY_INTERFACE_MODE_MII,
++	.soc_has_internal_phy = true,
+ 	.support_mii = true,
+ 	.support_rmii = true,
+ 	.support_rgmii = true
+@@ -83,20 +86,20 @@ static const struct emac_variant emac_va
+ 
+ static const struct emac_variant emac_variant_v3s = {
+ 	.default_syscon_value = 0x38000,
+-	.internal_phy = PHY_INTERFACE_MODE_MII,
++	.soc_has_internal_phy = true,
+ 	.support_mii = true
+ };
+ 
+ static const struct emac_variant emac_variant_a83t = {
+ 	.default_syscon_value = 0,
+-	.internal_phy = 0,
++	.soc_has_internal_phy = false,
+ 	.support_mii = true,
+ 	.support_rgmii = true
+ };
+ 
+ static const struct emac_variant emac_variant_a64 = {
+ 	.default_syscon_value = 0,
+-	.internal_phy = 0,
++	.soc_has_internal_phy = false,
+ 	.support_mii = true,
+ 	.support_rmii = true,
+ 	.support_rgmii = true
+@@ -195,6 +198,9 @@ static const struct emac_variant emac_va
+ #define H3_EPHY_LED_POL		BIT(17) /* 1: active low, 0: active high */
+ #define H3_EPHY_SHUTDOWN	BIT(16) /* 1: shutdown, 0: power up */
+ #define H3_EPHY_SELECT		BIT(15) /* 1: internal PHY, 0: external PHY */
++#define H3_EPHY_MUX_MASK	(H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID	1
++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID	2
+ 
+ /* H3/A64 specific bits */
+ #define SYSCON_RMII_EN		BIT(13) /* 1: enable RMII (overrides EPIT) */
+@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm
+ 	return 0;
+ }
+ 
++/* Search in mdio-mux node for internal PHY node and get its clk/reset */
++static int get_ephy_nodes(struct stmmac_priv *priv)
++{
++	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
++	struct device_node *mdio_mux, *iphynode;
++	struct device_node *mdio_internal;
++	int ret;
++
++	mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
++	if (!mdio_mux) {
++		dev_err(priv->device, "Cannot get mdio-mux node\n");
++		return -ENODEV;
++	}
++
++	mdio_internal = of_find_compatible_node(mdio_mux, NULL,
++						"allwinner,sun8i-h3-mdio-internal");
++	if (!mdio_internal) {
++		dev_err(priv->device, "Cannot get internal_mdio node\n");
++		return -ENODEV;
++	}
++
++	/* Seek for internal PHY */
++	for_each_child_of_node(mdio_internal, iphynode) {
++		gmac->ephy_clk = of_clk_get(iphynode, 0);
++		if (IS_ERR(gmac->ephy_clk))
++			continue;
++		gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);
++		if (IS_ERR(gmac->rst_ephy)) {
++			ret = PTR_ERR(gmac->rst_ephy);
++			if (ret == -EPROBE_DEFER)
++				return ret;
++			continue;
++		}
++		dev_info(priv->device, "Found internal PHY node\n");
++		return 0;
++	}
++	return -ENODEV;
++}
++
++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
++{
++	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
++	int ret;
++
++	if (gmac->internal_phy_powered) {
++		dev_warn(priv->device, "Internal PHY already powered\n");
++		return 0;
++	}
++
++	dev_info(priv->device, "Powering internal PHY\n");
++	ret = clk_prepare_enable(gmac->ephy_clk);
++	if (ret) {
++		dev_err(priv->device, "Cannot enable internal PHY\n");
++		return ret;
++	}
++
++	/* Make sure the EPHY is properly reseted, as U-Boot may leave
++	 * it at deasserted state, and thus it may fail to reset EMAC.
++	 */
++	reset_control_assert(gmac->rst_ephy);
++
++	ret = reset_control_deassert(gmac->rst_ephy);
++	if (ret) {
++		dev_err(priv->device, "Cannot deassert internal phy\n");
++		clk_disable_unprepare(gmac->ephy_clk);
++		return ret;
++	}
++
++	gmac->internal_phy_powered = true;
++
++	return 0;
++}
++
++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
++{
++	if (!gmac->internal_phy_powered)
++		return 0;
++
++	clk_disable_unprepare(gmac->ephy_clk);
++	reset_control_assert(gmac->rst_ephy);
++	gmac->internal_phy_powered = false;
++	return 0;
++}
++
++/* MDIO multiplexing switch function
++ * This function is called by the mdio-mux layer when it thinks the mdio bus
++ * multiplexer needs to switch.
++ * 'current_child' is the current value of the mux register
++ * 'desired_child' is the value of the 'reg' property of the target child MDIO
++ * node.
++ * The first time this function is called, current_child == -1.
++ * If current_child == desired_child, then the mux is already set to the
++ * correct bus.
++ */
++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
++				     void *data)
++{
++	struct stmmac_priv *priv = data;
++	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
++	u32 reg, val;
++	int ret = 0;
++	bool need_power_ephy = false;
++
++	if (current_child ^ desired_child) {
++		regmap_read(gmac->regmap, SYSCON_EMAC_REG, &reg);
++		switch (desired_child) {
++		case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
++			dev_info(priv->device, "Switch mux to internal PHY");
++			val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
++
++			need_power_ephy = true;
++			break;
++		case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
++			dev_info(priv->device, "Switch mux to external PHY");
++			val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
++			need_power_ephy = false;
++			break;
++		default:
++			dev_err(priv->device, "Invalid child ID %x\n",
++				desired_child);
++			return -EINVAL;
++		}
++		regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
++		if (need_power_ephy) {
++			ret = sun8i_dwmac_power_internal_phy(priv);
++			if (ret)
++				return ret;
++		} else {
++			sun8i_dwmac_unpower_internal_phy(gmac);
++		}
++		/* After changing syscon value, the MAC need reset or it will
++		 * use the last value (and so the last PHY set).
++		 */
++		ret = sun8i_dwmac_reset(priv);
++	}
++	return ret;
++}
++
++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
++{
++	int ret;
++	struct device_node *mdio_mux;
++	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
++
++	mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
++	if (!mdio_mux)
++		return -ENODEV;
++
++	ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
++			    &gmac->mux_handle, priv, priv->mii);
++	return ret;
++}
++
+ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
+ {
+ 	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct
+ 			 "Current syscon value is not the default %x (expect %x)\n",
+ 			 val, reg);
+ 
+-	if (gmac->variant->internal_phy) {
+-		if (!gmac->use_internal_phy) {
+-			/* switch to external PHY interface */
+-			reg &= ~H3_EPHY_SELECT;
+-		} else {
+-			reg |= H3_EPHY_SELECT;
+-			reg &= ~H3_EPHY_SHUTDOWN;
+-			dev_dbg(priv->device, "Select internal_phy %x\n", reg);
+-
+-			if (of_property_read_bool(priv->plat->phy_node,
+-						  "allwinner,leds-active-low"))
+-				reg |= H3_EPHY_LED_POL;
+-			else
+-				reg &= ~H3_EPHY_LED_POL;
+-
+-			/* Force EPHY xtal frequency to 24MHz. */
+-			reg |= H3_EPHY_CLK_SEL;
+-
+-			ret = of_mdio_parse_addr(priv->device,
+-						 priv->plat->phy_node);
+-			if (ret < 0) {
+-				dev_err(priv->device, "Could not parse MDIO addr\n");
+-				return ret;
+-			}
+-			/* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
+-			 * address. No need to mask it again.
+-			 */
+-			reg |= ret << H3_EPHY_ADDR_SHIFT;
++	if (gmac->variant->soc_has_internal_phy) {
++		if (of_property_read_bool(priv->plat->phy_node,
++					  "allwinner,leds-active-low"))
++			reg |= H3_EPHY_LED_POL;
++		else
++			reg &= ~H3_EPHY_LED_POL;
++
++		/* Force EPHY xtal frequency to 24MHz. */
++		reg |= H3_EPHY_CLK_SEL;
++
++		ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node);
++		if (ret < 0) {
++			dev_err(priv->device, "Could not parse MDIO addr\n");
++			return ret;
+ 		}
++		/* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
++		 * address. No need to mask it again.
++		 */
++		reg |= 1 << H3_EPHY_ADDR_SHIFT;
+ 	}
+ 
+ 	if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
+@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str
+ 	regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);
+ }
+ 
+-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
+ {
+-	struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+-	int ret;
+-
+-	if (!gmac->use_internal_phy)
+-		return 0;
++	struct sunxi_priv_data *gmac = priv;
+ 
+-	ret = clk_prepare_enable(gmac->ephy_clk);
+-	if (ret) {
+-		dev_err(priv->device, "Cannot enable ephy\n");
+-		return ret;
++	if (gmac->variant->soc_has_internal_phy) {
++		/* sun8i_dwmac_exit could be called with mdiomux uninit */
++		if (gmac->mux_handle)
++			mdio_mux_uninit(gmac->mux_handle);
++		if (gmac->internal_phy_powered)
++			sun8i_dwmac_unpower_internal_phy(gmac);
+ 	}
+ 
+-	/* Make sure the EPHY is properly reseted, as U-Boot may leave
+-	 * it at deasserted state, and thus it may fail to reset EMAC.
+-	 */
+-	reset_control_assert(gmac->rst_ephy);
+-
+-	ret = reset_control_deassert(gmac->rst_ephy);
+-	if (ret) {
+-		dev_err(priv->device, "Cannot deassert ephy\n");
+-		clk_disable_unprepare(gmac->ephy_clk);
+-		return ret;
+-	}
+-
+-	return 0;
+-}
+-
+-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
+-{
+-	if (!gmac->use_internal_phy)
+-		return 0;
+-
+-	clk_disable_unprepare(gmac->ephy_clk);
+-	reset_control_assert(gmac->rst_ephy);
+-	return 0;
+-}
+-
+-/* sun8i_power_phy() - Activate the PHY:
+- * In case of error, no need to call sun8i_unpower_phy(),
+- * it will be called anyway by sun8i_dwmac_exit()
+- */
+-static int sun8i_power_phy(struct stmmac_priv *priv)
+-{
+-	int ret;
+-
+-	ret = sun8i_dwmac_power_internal_phy(priv);
+-	if (ret)
+-		return ret;
+-
+-	ret = sun8i_dwmac_set_syscon(priv);
+-	if (ret)
+-		return ret;
+-
+-	/* After changing syscon value, the MAC need reset or it will use
+-	 * the last value (and so the last PHY set.
+-	 */
+-	ret = sun8i_dwmac_reset(priv);
+-	if (ret)
+-		return ret;
+-	return 0;
+-}
+-
+-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac)
+-{
+ 	sun8i_dwmac_unset_syscon(gmac);
+-	sun8i_dwmac_unpower_internal_phy(gmac);
+-}
+-
+-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
+-{
+-	struct sunxi_priv_data *gmac = priv;
+ 
+-	sun8i_unpower_phy(gmac);
++	reset_control_put(gmac->rst_ephy);
+ 
+ 	clk_disable_unprepare(gmac->tx_clk);
+ 
+@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm
+ 	if (!mac)
+ 		return NULL;
+ 
+-	ret = sun8i_power_phy(priv);
++	ret = sun8i_dwmac_set_syscon(priv);
+ 	if (ret)
+ 		return NULL;
+ 
+@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat
+ 	struct sunxi_priv_data *gmac;
+ 	struct device *dev = &pdev->dev;
+ 	int ret;
++	struct stmmac_priv *priv;
++	struct net_device *ndev;
+ 
+ 	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
+ 	if (ret)
+@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat
+ 	}
+ 
+ 	plat_dat->interface = of_get_phy_mode(dev->of_node);
+-	if (plat_dat->interface == gmac->variant->internal_phy) {
+-		dev_info(&pdev->dev, "Will use internal PHY\n");
+-		gmac->use_internal_phy = true;
+-		gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
+-		if (IS_ERR(gmac->ephy_clk)) {
+-			ret = PTR_ERR(gmac->ephy_clk);
+-			dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret);
+-			return -EINVAL;
+-		}
+-
+-		gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
+-		if (IS_ERR(gmac->rst_ephy)) {
+-			ret = PTR_ERR(gmac->rst_ephy);
+-			if (ret == -EPROBE_DEFER)
+-				return ret;
+-			dev_err(&pdev->dev, "No EPHY reset control found %d\n",
+-				ret);
+-			return -EINVAL;
+-		}
+-	} else {
+-		dev_info(&pdev->dev, "Will use external PHY\n");
+-		gmac->use_internal_phy = false;
+-	}
+ 
+ 	/* platform data specifying hardware features and callbacks.
+ 	 * hardware features were copied from Allwinner drivers.
+@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat
+ 
+ 	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ 	if (ret)
+-		sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
++		goto dwmac_exit;
++
++	ndev = dev_get_drvdata(&pdev->dev);
++	priv = netdev_priv(ndev);
++	/* The mux must be registered after parent MDIO
++	 * so after stmmac_dvr_probe()
++	 */
++	if (gmac->variant->soc_has_internal_phy) {
++		ret = get_ephy_nodes(priv);
++		if (ret)
++			goto dwmac_exit;
++		ret = sun8i_dwmac_register_mdio_mux(priv);
++		if (ret) {
++			dev_err(&pdev->dev, "Failed to register mux\n");
++			goto dwmac_mux;
++		}
++	} else {
++		ret = sun8i_dwmac_reset(priv);
++		if (ret)
++			goto dwmac_exit;
++	}
+ 
+ 	return ret;
++dwmac_mux:
++	sun8i_dwmac_unset_syscon(gmac);
++dwmac_exit:
++	sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
++return ret;
+ }
+ 
+ static const struct of_device_id sun8i_dwmac_match[] = {
diff --git a/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
new file mode 100644
index 0000000000..2f43585053
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch
@@ -0,0 +1,35 @@ 
+From a8ff8ccb45d37efa64476958fc5e9a8d9716b23b Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 24 Oct 2017 19:57:14 +0200
+Subject: [PATCH] net: stmmac: sun8i: Restore the compatibles
+
+The original dwmac-sun8i DT bindings have some issue on how to handle
+integrated PHY and was reverted in last RC of 4.13.
+But now we have a solution so we need to get back that was reverted.
+
+This patch restore compatibles about dwmac-sun8i
+This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+@@ -1072,6 +1072,14 @@ return ret;
+ }
+ 
+ static const struct of_device_id sun8i_dwmac_match[] = {
++	{ .compatible = "allwinner,sun8i-h3-emac",
++		.data = &emac_variant_h3 },
++	{ .compatible = "allwinner,sun8i-v3s-emac",
++		.data = &emac_variant_v3s },
++	{ .compatible = "allwinner,sun8i-a83t-emac",
++		.data = &emac_variant_a83t },
++	{ .compatible = "allwinner,sun50i-a64-emac",
++		.data = &emac_variant_a64 },
+ 	{ }
+ };
+ MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
diff --git a/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
new file mode 100644
index 0000000000..b89278d5d3
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
@@ -0,0 +1,292 @@ 
+From 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:12 +0100
+Subject: [PATCH] ARM: dts: sunxi: Restore EMAC changes (boards)
+
+The original dwmac-sun8i DT bindings have some issue on how to handle
+integrated PHY and was reverted in last RC of 4.13.
+But now we have a solution so we need to get back that was reverted.
+
+This patch restore all boards DT about dwmac-sun8i
+This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +++++++
+ arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++
+ arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts     | 29 +++++++++++++++++++++++
+ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 ++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 ++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 +++++++++++++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 +++++++++++++
+ 10 files changed, 131 insertions(+)
+
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+@@ -56,6 +56,8 @@
+ 
+ 	aliases {
+ 		serial0 = &uart0;
++		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
++		ethernet0 = &emac;
+ 		ethernet1 = &xr819;
+ 	};
+ 
+@@ -102,6 +104,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>;
+--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 	};
+@@ -114,6 +115,24 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <0>;
++	};
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+@@ -45,6 +45,16 @@
+ / {
+ 	model = "FriendlyArm NanoPi M1 Plus";
+ 	compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
++
++	reg_gmac_3v3: gmac-3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "gmac-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		startup-delay-us = <100000>;
++		enable-active-high;
++		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
++	};
+ };
+ 
+ &ehci1 {
+@@ -55,6 +65,25 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++
++	allwinner,leds-active-low;
++
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <7>;
++	};
++};
++
+ &ohci1 {
+ 	status = "okay";
+ };
+--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+@@ -46,3 +46,10 @@
+ 	model = "FriendlyARM NanoPi NEO";
+ 	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
+ };
++
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+@@ -54,6 +54,7 @@
+ 	aliases {
+ 		serial0 = &uart0;
+ 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
++		ethernet0 = &emac;
+ 		ethernet1 = &rtl8189;
+ 	};
+ 
+@@ -117,6 +118,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -97,6 +98,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+@@ -53,6 +53,11 @@
+ 	};
+ };
+ 
++&emac {
++	/* LEDs changed to active high on the plus */
++	/delete-property/ allwinner,leds-active-low;
++};
++
+ &mmc1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc1_pins_a>;
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -113,6 +114,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+@@ -47,6 +47,10 @@
+ 	model = "Xunlong Orange Pi Plus / Plus 2";
+ 	compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
+ 
++	aliases {
++		ethernet0 = &emac;
++	};
++
+ 	reg_gmac_3v3: gmac-3v3 {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "gmac-3v3";
+@@ -74,6 +78,24 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <0>;
++	};
++};
++
+ &mmc2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc2_8bit_pins>;
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+@@ -61,3 +61,19 @@
+ 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ 	};
+ };
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
diff --git a/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
new file mode 100644
index 0000000000..9e7319b4c8
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
@@ -0,0 +1,54 @@ 
+From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:10 +0100
+Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
+
+The original dwmac-sun8i DT bindings have some issue on how to handle
+integrated PHY and was reverted in last RC of 4.13.
+But now we have a solution so we need to get back that was reverted.
+
+This patch restore sunxi-h3-h5.dtsi
+This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+@@ -391,6 +391,32 @@
+ 			clocks = <&osc24M>;
+ 		};
+ 
++		emac: ethernet@1c30000 {
++			compatible = "allwinner,sun8i-h3-emac";
++			syscon = <&syscon>;
++			reg = <0x01c30000 0x10000>;
++			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			resets = <&ccu RST_BUS_EMAC>;
++			reset-names = "stmmaceth";
++			clocks = <&ccu CLK_BUS_EMAC>;
++			clock-names = "stmmaceth";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++
++			mdio: mdio {
++				#address-cells = <1>;
++				#size-cells = <0>;
++				int_mii_phy: ethernet-phy@1 {
++					compatible = "ethernet-phy-ieee802.3-c22";
++					reg = <1>;
++					clocks = <&ccu CLK_BUS_EPHY>;
++					resets = <&ccu RST_BUS_EPHY>;
++				};
++			};
++		};
++
+ 		spi0: spi@01c68000 {
+ 			compatible = "allwinner,sun8i-h3-spi";
+ 			reg = <0x01c68000 0x1000>;
diff --git a/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
new file mode 100644
index 0000000000..2db4f13609
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
@@ -0,0 +1,59 @@ 
+From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:11 +0100
+Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by
+ sun8i-h3-emac
+
+Since dwmac-sun8i could use either an integrated PHY or an external PHY
+(which could be at same MDIO address), we need to represent this selection
+by a MDIO switch.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++----
+ 1 file changed, 27 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+@@ -408,11 +408,34 @@
+ 			mdio: mdio {
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
+-				int_mii_phy: ethernet-phy@1 {
+-					compatible = "ethernet-phy-ieee802.3-c22";
++				compatible = "snps,dwmac-mdio";
++			};
++
++			mdio-mux {
++				compatible = "allwinner,sun8i-h3-mdio-mux";
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				mdio-parent-bus = <&mdio>;
++				/* Only one MDIO is usable at the time */
++				internal_mdio: mdio@1 {
++					compatible = "allwinner,sun8i-h3-mdio-internal";
+ 					reg = <1>;
+-					clocks = <&ccu CLK_BUS_EPHY>;
+-					resets = <&ccu RST_BUS_EPHY>;
++					#address-cells = <1>;
++					#size-cells = <0>;
++
++					int_mii_phy: ethernet-phy@1 {
++						compatible = "ethernet-phy-ieee802.3-c22";
++						reg = <1>;
++						clocks = <&ccu CLK_BUS_EPHY>;
++						resets = <&ccu RST_BUS_EPHY>;
++					};
++				};
++
++				external_mdio: mdio@2 {
++					reg = <2>;
++					#address-cells = <1>;
++					#size-cells = <0>;
+ 				};
+ 			};
+ 		};
diff --git a/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
new file mode 100644
index 0000000000..af4a921583
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
@@ -0,0 +1,184 @@ 
+From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:13 +0100
+Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes
+
+The original dwmac-sun8i DT bindings have some issue on how to handle
+integrated PHY and was reverted in last RC of 4.13.
+But now we have a solution so we need to get back that was reverted.
+
+This patch restore arm64 DT about dwmac-sun8i for A64
+This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 ++++++++++++++++
+ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts    | 15 +++++++++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +++++++++++++++++
+ .../dts/allwinner/sun50i-a64-sopine-baseboard.dts    | 16 ++++++++++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi        | 20 ++++++++++++++++++++
+ 5 files changed, 84 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+@@ -51,6 +51,7 @@
+ 	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 	};
+@@ -69,6 +70,14 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins>;
+@@ -79,6 +88,13 @@
+ 	bias-pull-up;
+ };
+ 
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+@@ -48,3 +48,18 @@
+ 
+ 	/* TODO: Camera, touchscreen, etc. */
+ };
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+@@ -51,6 +51,7 @@
+ 	compatible = "pine64,pine64", "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 		serial2 = &uart2;
+@@ -71,6 +72,15 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rmii_pins>;
++	phy-mode = "rmii";
++	phy-handle = <&ext_rmii_phy1>;
++	status = "okay";
++
++};
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins>;
+@@ -81,6 +91,13 @@
+ 	bias-pull-up;
+ };
+ 
++&mdio {
++	ext_rmii_phy1: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+@@ -53,6 +53,7 @@
+ 		     "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -76,6 +77,21 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc2_pins>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -449,6 +449,26 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		emac: ethernet@1c30000 {
++			compatible = "allwinner,sun50i-a64-emac";
++			syscon = <&syscon>;
++			reg = <0x01c30000 0x10000>;
++			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			resets = <&ccu RST_BUS_EMAC>;
++			reset-names = "stmmaceth";
++			clocks = <&ccu CLK_BUS_EMAC>;
++			clock-names = "stmmaceth";
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			mdio: mdio {
++				#address-cells = <1>;
++				#size-cells = <0>;
++			};
++		};
++
+ 		gic: interrupt-controller@1c81000 {
+ 			compatible = "arm,gic-400";
+ 			reg = <0x01c81000 0x1000>,
diff --git a/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
new file mode 100644
index 0000000000..40efc9f3e8
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
@@ -0,0 +1,28 @@ 
+From 16416084e06e1ebff51a9e7721a8cc4ccc186f28 Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:15 +0100
+Subject: [PATCH] arm64: dts: allwinner: add snps,dwmac-mdio compatible to
+ emac/mdio
+
+stmmac bindings docs said that its mdio node must have
+compatible = "snps,dwmac-mdio";
+Since dwmac-sun8i does not have any good reasons to not doing it, all
+their MDIO node must have it.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -464,6 +464,7 @@
+ 			#size-cells = <0>;
+ 
+ 			mdio: mdio {
++				compatible = "snps,dwmac-mdio";
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
+ 			};
diff --git a/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
new file mode 100644
index 0000000000..b2c9d75ad7
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
@@ -0,0 +1,120 @@ 
+From 44a94c7ef989317de81e3e7f84385be2bf1b5fe2 Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Tue, 31 Oct 2017 09:19:14 +0100
+Subject: [PATCH] arm64: dts: allwinner: H5: Restore EMAC changes
+
+The original dwmac-sun8i DT bindings have some issue on how to handle
+integrated PHY and was reverted in last RC of 4.13.
+But now we have a solution so we need to get back that was reverted.
+
+This patch restore arm64 DT about dwmac-sun8i for H5
+This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++
+ .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++
+ .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts     | 17 +++++++++++++++++
+ 3 files changed, 51 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+@@ -50,6 +50,7 @@
+ 	compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -108,6 +109,22 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@7 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <7>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+@@ -59,6 +59,7 @@
+ 	};
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -136,6 +137,22 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+@@ -54,6 +54,7 @@
+ 	compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -143,6 +144,22 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&external_mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
diff --git a/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
new file mode 100644
index 0000000000..295fff2e74
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
@@ -0,0 +1,51 @@ 
+From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Fri, 10 Nov 2017 17:26:54 +0800
+Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
+ boards
+
+On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
+on the AXP803 PMIC.
+
+Add phy-handle property to these boards' emac node.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
+Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts     | 1 +
+ arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts           | 1 +
+ arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
+ 3 files changed, 3 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+@@ -75,6 +75,7 @@
+ 	pinctrl-0 = <&rgmii_pins>;
+ 	phy-mode = "rgmii";
+ 	phy-handle = <&ext_rgmii_phy>;
++	phy-supply = <&reg_dc1sw>;
+ 	status = "okay";
+ };
+ 
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+@@ -77,6 +77,7 @@
+ 	pinctrl-0 = <&rmii_pins>;
+ 	phy-mode = "rmii";
+ 	phy-handle = <&ext_rmii_phy1>;
++	phy-supply = <&reg_dc1sw>;
+ 	status = "okay";
+ 
+ };
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+@@ -82,6 +82,7 @@
+ 	pinctrl-0 = <&rgmii_pins>;
+ 	phy-mode = "rgmii";
+ 	phy-handle = <&ext_rgmii_phy>;
++	phy-supply = <&reg_dc1sw>;
+ 	status = "okay";
+ };
+