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[i386] : Fix PR 77874, two problems with gcc.target/i386/avx-1.c

Message ID CAFULd4YrEGZLThHtYY6HYiLC=tTKM64+b7F82VF1Er7yE-kh5w@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak Oct. 5, 2016, 10:01 p.m. UTC 
2016-10-05  Uros Bizjak  <ubizjak@gmail.com>

    PR target/77874
    * config/i386/sse.md (<mask_codefor><code><mode>3<mask_name>):
    Remove wrong assert.
    (<floatsuffix>float<sseintvecmodelower><mode>2<mask_name><round_name>:
    Use <round_constraint> as operand 1 constraint.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN, will backport to release branches.

Uros.
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Patch

Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md	(revision 240805)
+++ config/i386/sse.md	(working copy)
@@ -4666,7 +4666,7 @@ 
 (define_insn "<floatsuffix>float<sseintvecmodelower><mode>2<mask_name><round_name>"
   [(set (match_operand:VF2_AVX512VL 0 "register_operand" "=v")
 	(any_float:VF2_AVX512VL
-	  (match_operand:<sseintvecmode> 1 "nonimmediate_operand" "vm")))]
+	  (match_operand:<sseintvecmode> 1 "nonimmediate_operand" "<round_constraint>")))]
   "TARGET_AVX512DQ"
   "vcvt<floatsuffix>qq2pd\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
   [(set_attr "type" "ssecvt")
@@ -11420,7 +11420,6 @@ 
       gcc_assert (TARGET_AVX);
     case MODE_V4SF:
       gcc_assert (TARGET_SSE);
-      gcc_assert (!<mask_applied>);
       tmp = "<logic>ps";
       break;