From patchwork Thu Aug 25 14:04:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 662813 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sKmCJ1wR6z9sRZ for ; Fri, 26 Aug 2016 00:05:00 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id 583623161F; Thu, 25 Aug 2016 14:04:58 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UEwdSIHkHLcv; Thu, 25 Aug 2016 14:04:54 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by silver.osuosl.org (Postfix) with ESMTP id 7396831600; Thu, 25 Aug 2016 14:04:54 +0000 (UTC) X-Original-To: buildroot@lists.busybox.net Delivered-To: buildroot@osuosl.org Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by ash.osuosl.org (Postfix) with ESMTP id 66F311C0677 for ; Thu, 25 Aug 2016 14:04:52 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 62B298BF15 for ; Thu, 25 Aug 2016 14:04:52 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4u6hQ7nnaKAo for ; Thu, 25 Aug 2016 14:04:51 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by whitealder.osuosl.org (Postfix) with ESMTPS id 922BA876EF for ; Thu, 25 Aug 2016 14:04:51 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 25 Aug 2016 07:04:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.28,575,1464678000"; d="scan'208"; a="1041374054" Received: from black.fi.intel.com ([10.237.72.56]) by orsmga002.jf.intel.com with ESMTP; 25 Aug 2016 07:04:49 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5DC793D2; Thu, 25 Aug 2016 17:04:48 +0300 (EEST) From: Andy Shevchenko To: Padraig James Connolly , Mika Westerberg , buildroot@busybox.net, Thomas Petazzoni Date: Thu, 25 Aug 2016 17:04:42 +0300 Message-Id: <1472133887-34746-5-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1472133887-34746-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1472133887-34746-1-git-send-email-andriy.shevchenko@linux.intel.com> Cc: Andy Shevchenko Subject: [Buildroot] [PATCH v1 4/9] board / intel: Add SPI peripherals for Minnowboard MAX X-BeenThere: buildroot@busybox.net X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: buildroot-bounces@busybox.net Sender: "buildroot" From: Mika Westerberg Add two SPI peripherals which can be connected to Minnowboard MAX low speed connector. First is Atmel AT25 compatible SPI EEPROM and second is M25P80 compatible SPI serial flash. Signed-off-by: Mika Westerberg Signed-off-by: Andy Shevchenko --- board/intel/minnowboard-max/acpi/at25.asl | 58 +++++++++++++++++++++++++++++ board/intel/minnowboard-max/acpi/m25p80.asl | 52 ++++++++++++++++++++++++++ 2 files changed, 110 insertions(+) create mode 100644 board/intel/minnowboard-max/acpi/at25.asl create mode 100644 board/intel/minnowboard-max/acpi/m25p80.asl diff --git a/board/intel/minnowboard-max/acpi/at25.asl b/board/intel/minnowboard-max/acpi/at25.asl new file mode 100644 index 0000000..fdc169a --- /dev/null +++ b/board/intel/minnowboard-max/acpi/at25.asl @@ -0,0 +1,58 @@ +/* + * Minnowboard MAX + * + * http://wiki.minnowboard.org/MinnowBoard_MAX + * + * This adds Atmel AT25 compatible 1kb serial EEPROM to the SPI host + * controller available on Minnowboard MAX low speed connector (JP1) pins: + * + * pin name pin number + * ----------------------------- + * GPIO_SPI_CS 5 + * GPIO_SPI_MISO 7 + * GPIO_SPI_MOSI 9 + * GPIO_SPI_CLK 11 + * + * In Linux you need to set CONFIG_EEPROM_AT25=y (or m) to be able to use + * this device. + */ +DefinitionBlock ("at25.aml", "SSDT", 5, "INTEL", "AT25", 1) +{ + External (_SB_.SPI1, DeviceObj) + + Scope (\_SB.SPI1) + { + Device (EEP0) { + Name (_HID, "PRP0001") + Name (_DDN, "Atmel AT25 compatible EEPROM") + Name (_CRS, ResourceTemplate () { + SpiSerialBus ( + 1, // Chip select + PolarityLow, // Chip select is active low + FourWireMode, // Full duplex + 8, // Bits per word is 8 (byte) + ControllerInitiated, // Don't care + 1000000, // 1 MHz + ClockPolarityLow, // SPI mode 0 + ClockPhaseFirst, // SPI mode 0 + "\\_SB.SPI1", // SPI host controller + 0 // Must be 0 + ) + }) + + /* + * See Documentation/devicetree/bindings/eeprom/at25.txt for + * more information about these bindings. + */ + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"compatible", "atmel,at25"}, + Package () {"size", 1024}, + Package () {"pagesize", 32}, + Package () {"address-width", 16}, + } + }) + } + } +} diff --git a/board/intel/minnowboard-max/acpi/m25p80.asl b/board/intel/minnowboard-max/acpi/m25p80.asl new file mode 100644 index 0000000..d0676c6 --- /dev/null +++ b/board/intel/minnowboard-max/acpi/m25p80.asl @@ -0,0 +1,52 @@ +/* + * Minnowboard MAX + * + * http://wiki.minnowboard.org/MinnowBoard_MAX + * + * This adds M25P80 (AT26DF, M25P, W25X) compatible serial flash to the SPI + * host controller available on Minnowboard MAX low speed connector (JP1) + * pins: + * + * pin name pin number + * ----------------------------- + * GPIO_SPI_CS 5 + * GPIO_SPI_MISO 7 + * GPIO_SPI_MOSI 9 + * GPIO_SPI_CLK 11 + * + * In Linux you need to set CONFIG_MTD_M25P80=y (or m) to be able to use + * this device. + */ +DefinitionBlock ("m25p80.aml", "SSDT", 5, "INTEL", "M25P80", 1) +{ + External (_SB_.SPI1, DeviceObj) + + Scope (\_SB.SPI1) + { + Device (FLS0) { + Name (_HID, "PRP0001") + Name (_DDN, "M25P80 compatible serial flash") + Name (_CRS, ResourceTemplate () { + SpiSerialBus ( + 1, // Chip select + PolarityLow, // Chip select is active low + FourWireMode, // Full duplex + 8, // Bits per word is 8 (byte) + ControllerInitiated, // Don't care + 10000000, // 10 MHz + ClockPolarityLow, // SPI mode 0 + ClockPhaseFirst, // SPI mode 0 + "\\_SB.SPI1", // SPI host controller + 0 // Must be 0 + ) + }) + + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"compatible", "jedec,spi-nor"}, + } + }) + } + } +}