[v1,4/9] board / intel: Add SPI peripherals for Minnowboard MAX
diff mbox

Message ID 1472133887-34746-5-git-send-email-andriy.shevchenko@linux.intel.com
State Changes Requested
Headers show

Commit Message

Andy Shevchenko Aug. 25, 2016, 2:04 p.m. UTC
From: Mika Westerberg <mika.westerberg@linux.intel.com>

Add two SPI peripherals which can be connected to Minnowboard MAX low speed
connector. First is Atmel AT25 compatible SPI EEPROM and second is M25P80
compatible SPI serial flash.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 board/intel/minnowboard-max/acpi/at25.asl   | 58 +++++++++++++++++++++++++++++
 board/intel/minnowboard-max/acpi/m25p80.asl | 52 ++++++++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 board/intel/minnowboard-max/acpi/at25.asl
 create mode 100644 board/intel/minnowboard-max/acpi/m25p80.asl

Comments

Thomas Petazzoni Aug. 25, 2016, 9:47 p.m. UTC | #1
Hello,

On Thu, 25 Aug 2016 17:04:42 +0300, Andy Shevchenko wrote:
> From: Mika Westerberg <mika.westerberg@linux.intel.com>
> 
> Add two SPI peripherals which can be connected to Minnowboard MAX low speed
> connector. First is Atmel AT25 compatible SPI EEPROM and second is M25P80
> compatible SPI serial flash.
> 
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  board/intel/minnowboard-max/acpi/at25.asl   | 58 +++++++++++++++++++++++++++++
>  board/intel/minnowboard-max/acpi/m25p80.asl | 52 ++++++++++++++++++++++++++
>  2 files changed, 110 insertions(+)
>  create mode 100644 board/intel/minnowboard-max/acpi/at25.asl
>  create mode 100644 board/intel/minnowboard-max/acpi/m25p80.asl

Is there some upstream project for those ACPI tables? I wouldn't want
to have them all in Buildroot, I'd very much prefer to have a Buildroot
package download them, compile them using the acpica compiler, and
install them in the proper place.

It's fine to have them in Buildroot as a temporary solution, as long as
some upstream is being put in place. But if the long term idea is to
keep those ACPI tables source code in Buildroot, then I don't think
it's what we want to do.

This of course applies to patches 4/9 to 9/9.

Best regards,

Thomas
Thomas Petazzoni Aug. 26, 2016, 9:26 a.m. UTC | #2
Hello,

On Fri, 26 Aug 2016 12:09:17 +0300, Mika Westerberg wrote:

> > Is there some upstream project for those ACPI tables? I wouldn't want
> > to have them all in Buildroot, I'd very much prefer to have a Buildroot
> > package download them, compile them using the acpica compiler, and
> > install them in the proper place.  
> 
> Currently there is no upstream project for these but we have plans to do
> so eventually. The idea is to have only one per-device ASL template and
> then tune that to work with the target board, but the template format is
> not yet crystal clear.

So you're storing those files in both Yocto Project recipes, and intend
to do so in Buildroot? And every other build system wanting to support
your platforms would have to carry those files as well. Doesn't seem
like a solution that will make it easy for you to update those files.

What about having some Git repo hosted somewhere to host those files?
We could then have a Buildroot package that fetches them and does the
acpica compilation process.

Best regards,

Thomas

Patch
diff mbox

diff --git a/board/intel/minnowboard-max/acpi/at25.asl b/board/intel/minnowboard-max/acpi/at25.asl
new file mode 100644
index 0000000..fdc169a
--- /dev/null
+++ b/board/intel/minnowboard-max/acpi/at25.asl
@@ -0,0 +1,58 @@ 
+/*
+ * Minnowboard MAX
+ *
+ * http://wiki.minnowboard.org/MinnowBoard_MAX
+ *
+ * This adds Atmel AT25 compatible 1kb serial EEPROM to the SPI host
+ * controller available on Minnowboard MAX low speed connector (JP1) pins:
+ *
+ *   pin name		pin number
+ *   -----------------------------
+ *   GPIO_SPI_CS	5
+ *   GPIO_SPI_MISO	7
+ *   GPIO_SPI_MOSI	9
+ *   GPIO_SPI_CLK	11
+ *
+ * In Linux you need to set CONFIG_EEPROM_AT25=y (or m) to be able to use
+ * this device.
+ */
+DefinitionBlock ("at25.aml", "SSDT", 5, "INTEL", "AT25", 1)
+{
+    External (_SB_.SPI1, DeviceObj)
+
+    Scope (\_SB.SPI1)
+    {
+        Device (EEP0) {
+            Name (_HID, "PRP0001")
+            Name (_DDN, "Atmel AT25 compatible EEPROM")
+            Name (_CRS, ResourceTemplate () {
+                SpiSerialBus (
+                    1,                      // Chip select
+                    PolarityLow,            // Chip select is active low
+                    FourWireMode,           // Full duplex
+                    8,                      // Bits per word is 8 (byte)
+                    ControllerInitiated,    // Don't care
+                    1000000,                // 1 MHz
+                    ClockPolarityLow,       // SPI mode 0
+                    ClockPhaseFirst,        // SPI mode 0
+                    "\\_SB.SPI1",           // SPI host controller
+                    0                       // Must be 0
+                )
+            })
+
+            /*
+	     * See Documentation/devicetree/bindings/eeprom/at25.txt for
+	     * more information about these bindings.
+             */
+            Name (_DSD, Package () {
+                ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                Package () {
+                    Package () {"compatible", "atmel,at25"},
+                    Package () {"size", 1024},
+                    Package () {"pagesize", 32},
+                    Package () {"address-width", 16},
+                }
+            })
+        }
+    }
+}
diff --git a/board/intel/minnowboard-max/acpi/m25p80.asl b/board/intel/minnowboard-max/acpi/m25p80.asl
new file mode 100644
index 0000000..d0676c6
--- /dev/null
+++ b/board/intel/minnowboard-max/acpi/m25p80.asl
@@ -0,0 +1,52 @@ 
+/*
+ * Minnowboard MAX
+ *
+ * http://wiki.minnowboard.org/MinnowBoard_MAX
+ *
+ * This adds M25P80 (AT26DF, M25P, W25X) compatible serial flash to the SPI
+ * host controller available on Minnowboard MAX low speed connector (JP1)
+ * pins:
+ *
+ *   pin name		pin number
+ *   -----------------------------
+ *   GPIO_SPI_CS	5
+ *   GPIO_SPI_MISO	7
+ *   GPIO_SPI_MOSI	9
+ *   GPIO_SPI_CLK	11
+ *
+ * In Linux you need to set CONFIG_MTD_M25P80=y (or m) to be able to use
+ * this device.
+ */
+DefinitionBlock ("m25p80.aml", "SSDT", 5, "INTEL", "M25P80", 1)
+{
+    External (_SB_.SPI1, DeviceObj)
+
+    Scope (\_SB.SPI1)
+    {
+        Device (FLS0) {
+            Name (_HID, "PRP0001")
+            Name (_DDN, "M25P80 compatible serial flash")
+            Name (_CRS, ResourceTemplate () {
+                SpiSerialBus (
+                    1,                      // Chip select
+                    PolarityLow,            // Chip select is active low
+                    FourWireMode,           // Full duplex
+                    8,                      // Bits per word is 8 (byte)
+                    ControllerInitiated,    // Don't care
+                    10000000,               // 10 MHz
+                    ClockPolarityLow,       // SPI mode 0
+                    ClockPhaseFirst,        // SPI mode 0
+                    "\\_SB.SPI1",           // SPI host controller
+                    0                       // Must be 0
+                )
+            })
+
+            Name (_DSD, Package () {
+                ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                Package () {
+                    Package () {"compatible", "jedec,spi-nor"},
+                }
+            })
+        }
+    }
+}