From patchwork Fri Feb 5 18:36:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faraz Shahbazker X-Patchwork-Id: 579578 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B809714031D for ; Sat, 6 Feb 2016 05:36:49 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=BFyaRwXr; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type :content-transfer-encoding; q=dns; s=default; b=mwOtnc32Vllyk6gO Q5HiRc2MQHyJlBz4dIXMyYqzJ/CnV8WZSk1E8d3334ACa5iPn+ldhe0igg5wPtmH TrXB5G7SHQN4MPIvigivimhCPScRA0nmP3AUy/c6at4ZCxwufy1RIwzd3+zREFJA Yd41wIAzYw+1xHyD6SaDKC5W0hE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type :content-transfer-encoding; s=default; bh=LVsO6cAs/CQcTwlKz58qpJ SliZ0=; b=BFyaRwXrWyJ7pAynXPXjXtk5V8pNEIKKsHbrfItZPMTS9JOrPgqRmm 2yxWTtsRcRI1hHVKjO4qecoj+VwmSJeLCfHRNLKHAmzRRrJceO/CsWiYDmQzpbMZ mZW9UkCO5rUc2sjsAkRRcNVOo+Nwk3dlPtf3a1hQ0zSmBHSEvg8BA= Received: (qmail 23353 invoked by alias); 5 Feb 2016 18:36:39 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 23335 invoked by uid 89); 5 Feb 2016 18:36:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.4 required=5.0 tests=AWL, BAYES_50, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=UD:RUNTIME, copyingruntime, COPYINGRUNTIME, copying.runtime X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 05 Feb 2016 18:36:37 +0000 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Websense Email Security Gateway with ESMTPS id 9B7F758DA6ADF for ; Fri, 5 Feb 2016 18:36:30 +0000 (GMT) Received: from BAMAIL02.ba.imgtec.org (10.20.40.28) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.266.1; Fri, 5 Feb 2016 18:36:33 +0000 Received: from ubuntu-frs.ba.imgtec.org (10.20.3.30) by bamail02.ba.imgtec.org (10.20.40.28) with Microsoft SMTP Server (TLS) id 14.3.174.1; Fri, 5 Feb 2016 10:36:31 -0800 Message-ID: <56B4EBAE.1090509@imgtec.com> Date: Fri, 5 Feb 2016 10:36:30 -0800 From: Faraz Shahbazker User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: CC: Matthew Fortune Subject: [RFC] [MIPS] Enable non-executable PT_GNU_STACK support Enable non-executable stack mode if assembler and linker support it. Currently the MIPS FPU emulator uses eXecute Out of Line (XOL) on the stack to handle instructions in the delay slots of FPU branches. Because of this MIPS cannot have a non-executable stack. While the solution on the kernel side is not yet finalized, we propose changes required on the tools-side to make them ready for a seamless transition whenever a fixed kernel becomes available. glibc/dynamic linker: ---- * When non-executable stack is requested, first check AT_FLAGS in the auxiliary vector to decide if this kernel supports a non-executable stack. Persist with the non-executable mode specified on the PT_GNU_STACK segment only if kernel supports it, else revert to an executable stack. * The 25th bit (1<<24) in AT_FLAGS is reserved for use by the kernel to indicate that it supports a non-executable stack on MIPS. * glibc's ABIVERSION is incremented from 3 to 5, so that applications linked for this glibc can't be accidentally run against older versions. ABIVERSION 4 has been skipped over because it was chosen for IFUNC support, which is still under review. Patch under review: https://sourceware.org/ml/libc-alpha/2016-01/msg00567.html binutils: ---- * Increment the ABIVERSION to 5 for objects with non-executable stacks. Patch under review: https://sourceware.org/ml/binutils/2016-02/msg00087.html gcc: ---- * Check if assembler/dynamic linker support the new behaviour (ABIVERSION >= 5). If yes, enable non-executable stack by default for all objects. gcc/ChangeLog * configure.ac: Check if assembler supports the new PT_GNU_STACK ABI change; if yes, enable non-executable stack mode by default. * configure: Regenerate. * config.in: Regenerate. * config/mips/mips.c: Define TARGET_ASM_FILE_END to indicate stack mode for each C file if LD_MIPS_GNUSTACK is enabled. libgcc/ChangeLog config/mips/crti.S: Add .note.GNU-stack marker if LD_MIPS_GNUSTACK support is enabled. config/mips/crtn.S: Add .note.GNU-stack marker if LD_MIPS_GNUSTACK support is enabled. config/mips/mips16.S: Add .note.GNU-stack marker if LD_MIPS_GNUSTACK support is enabled. config/mips/vr4120-div.S: Add .note.GNU-stack marker if LD_MIPS_GNUSTACK support is enabled. -- gcc/configure.ac gcc/config/mips/mip.c config/mips/crti.S config/mips/crtn.S config/mips/mips16.S config/mips/vr4120-div.S --- gcc/config/mips/mips.c | 5 +++++ gcc/configure.ac | 23 +++++++++++++++++++++++ libgcc/config/mips/crti.S | 6 ++++++ libgcc/config/mips/crtn.S | 6 ++++++ libgcc/config/mips/mips16.S | 7 +++++++ libgcc/config/mips/vr4120-div.S | 7 +++++++ 6 files changed, 54 insertions(+) diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ea18ad6..c3eefc0 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -20194,6 +20194,11 @@ mips_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, #undef TARGET_HARD_REGNO_SCRATCH_OK #define TARGET_HARD_REGNO_SCRATCH_OK mips_hard_regno_scratch_ok +#if HAVE_LD_MIPS_GNUSTACK +#undef TARGET_ASM_FILE_END +#define TARGET_ASM_FILE_END file_end_indicate_exec_stack +#endif + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-mips.h" diff --git a/gcc/configure.ac b/gcc/configure.ac index 0a626e9..9b8190e 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -4562,6 +4562,29 @@ pointers into PC-relative form.]) AC_MSG_ERROR( [Requesting --with-nan= requires assembler support for -mnan=]) fi + + AC_CACHE_CHECK([linker for GNU-stack ABI support], + [gcc_cv_ld_mips_gnustack], + [gcc_cv_ld_mips_gnustack=no + if test x$gcc_cv_as != x \ + -a x$gcc_cv_ld != x \ + -a x$gcc_cv_readelf != x ; then + cat > conftest.s < /dev/null 2>&1 \ + && $gcc_cv_ld -o conftest conftest.o > /dev/null 2>&1; then + abi_version=`$gcc_cv_readelf -h conftest 2>&1 | grep "ABI Version:" | cut -d: -f2 | tr -d '[[:space:]]'` + if test "$abi_version" -ge 5; then + gcc_cv_ld_mips_gnustack=yes + fi + fi + fi + rm -f conftest.s conftest.o conftest]) + if test x$gcc_cv_ld_mips_gnustack = xyes; then + AC_DEFINE(HAVE_LD_MIPS_GNUSTACK, 1, + [Define if your linker can handle PT_GNU_STACK segments correctly.]) + fi ;; s390*-*-*) gcc_GAS_CHECK_FEATURE([.gnu_attribute support], diff --git a/libgcc/config/mips/crti.S b/libgcc/config/mips/crti.S index 8521d3c..aa85d94 100644 --- a/libgcc/config/mips/crti.S +++ b/libgcc/config/mips/crti.S @@ -21,6 +21,12 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ +#include "config.h" +#if HAVE_LD_MIPS_GNUSTACK +/* An executable stack is *not* required for these functions. */ + .section .note.GNU-stack,"",%progbits +#endif + /* 4 slots for argument spill area. 1 for cpreturn, 1 for stack. Return spill offset of 40 and 20. Aligned to 16 bytes for n32. */ diff --git a/libgcc/config/mips/crtn.S b/libgcc/config/mips/crtn.S index d80c342..6a13b46 100644 --- a/libgcc/config/mips/crtn.S +++ b/libgcc/config/mips/crtn.S @@ -21,6 +21,12 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ +#include "config.h" +#if HAVE_LD_MIPS_GNUSTACK +/* An executable stack is *not* required for these functions. */ + .section .note.GNU-stack,"",%progbits +#endif + /* 4 slots for argument spill area. 1 for cpreturn, 1 for stack. Return spill offset of 40 and 20. Aligned to 16 bytes for n32. */ diff --git a/libgcc/config/mips/mips16.S b/libgcc/config/mips/mips16.S index 5080f86..b8f6df8 100644 --- a/libgcc/config/mips/mips16.S +++ b/libgcc/config/mips/mips16.S @@ -48,6 +48,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see values using the soft-float calling convention, but do the actual operation using the hard floating point instructions. */ +#include "config.h" +#if HAVE_LD_MIPS_GNUSTACK +/* An executable stack is *not* required for these functions. */ + .section .note.GNU-stack,"",%progbits + .previous +#endif + #if defined _MIPS_SIM && (_MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIO64) /* This file contains 32-bit assembly code. */ diff --git a/libgcc/config/mips/vr4120-div.S b/libgcc/config/mips/vr4120-div.S index 9954bc3..262de67 100644 --- a/libgcc/config/mips/vr4120-div.S +++ b/libgcc/config/mips/vr4120-div.S @@ -26,6 +26,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -mfix-vr4120. div and ddiv do not give the correct result when one of the operands is negative. */ +#include "config.h" +#if HAVE_LD_MIPS_GNUSTACK +/* An executable stack is *not* required for these functions. */ + .section .note.GNU-stack,"",%progbits +#endif + .previous + .set nomips16 #define DIV \