| Message ID | 1348314355-10992-1-git-send-email-andreas.faerber@web.de |
|---|---|
| State | New |
| Headers | show |
On 22 September 2012 12:45, Andreas Färber <andreas.faerber@web.de> wrote: > +static void cortex_r4_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + set_feature(&cpu->env, ARM_FEATURE_V7); > + set_feature(&cpu->env, ARM_FEATURE_THUMB_DIV); > + set_feature(&cpu->env, ARM_FEATURE_MPU); This will trip the assert in register_cp_regs_for_features(): if (arm_feature(env, ARM_FEATURE_MPU)) { /* These are the MPU registers prior to PMSAv6. Any new * PMSA core later than the ARM946 will require that we * implement the PMSAv6 or PMSAv7 registers, which are * completely different. */ assert(!arm_feature(env, ARM_FEATURE_V6)); ...indicating that R4 support is more work than is contained in this patch :-) -- PMM
Am 22.09.2012 15:05, schrieb Peter Maydell: > On 22 September 2012 12:45, Andreas Färber <andreas.faerber@web.de> wrote: >> +static void cortex_r4_initfn(Object *obj) >> +{ >> + ARMCPU *cpu = ARM_CPU(obj); >> + set_feature(&cpu->env, ARM_FEATURE_V7); >> + set_feature(&cpu->env, ARM_FEATURE_THUMB_DIV); >> + set_feature(&cpu->env, ARM_FEATURE_MPU); > > This will trip the assert in register_cp_regs_for_features(): Thanks for the pointer. This rebased version is only compile-tested and is provided mainly for the ST guys to build upon, during my absence. > if (arm_feature(env, ARM_FEATURE_MPU)) { > /* These are the MPU registers prior to PMSAv6. Any new > * PMSA core later than the ARM946 will require that we > * implement the PMSAv6 or PMSAv7 registers, which are > * completely different. > */ > assert(!arm_feature(env, ARM_FEATURE_V6)); > > ...indicating that R4 support is more work than is contained > in this patch :-) ...which confirms what I stated in the message this is threaded to, and is reflected by "prepare". :) Same for VFPv3-D16 in the second RFC patch (which used to "add" to cortex-r4, now should've been updated to "prepare" as well). And of course the Cortex-R4's lock-step mode that seems to make it so interesting for automotive customers. /-F
On 22 September 2012 14:56, Andreas Färber <andreas.faerber@web.de> wrote: > And of course the Cortex-R4's lock-step mode that seems to make it so > interesting for automotive customers. Lock-step is trivial to emulate: just do nothing and never raise a "cores out of sync" error :-) -- PMM
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index b00f5fa..6726498 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -382,6 +382,29 @@ static void cortex_m3_initfn(Object *obj) cpu->midr = 0x410fc231; } +static void cortex_r4_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + set_feature(&cpu->env, ARM_FEATURE_V7); + set_feature(&cpu->env, ARM_FEATURE_THUMB_DIV); + set_feature(&cpu->env, ARM_FEATURE_MPU); + cpu->midr = 0x411FC144; /* r1p4 */ + cpu->id_pfr0 = 0x0131; + cpu->id_pfr1 = 0x001; + cpu->id_dfr0 = 0x010400; + cpu->id_afr0 = 0x0; + cpu->id_mmfr0 = 0x0210030; + cpu->id_mmfr1 = 0x00000000; + cpu->id_mmfr2 = 0x01200000; + cpu->id_mmfr3 = 0x0211; + cpu->id_isar0 = 0x1101111; + cpu->id_isar1 = 0x13112111; + cpu->id_isar2 = 0x21232131; + cpu->id_isar3 = 0x01112131; + cpu->id_isar4 = 0x0010142; + cpu->id_isar5 = 0x0; +} + static const ARMCPRegInfo cortexa8_cp_reginfo[] = { { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, @@ -737,6 +760,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm1176", .initfn = arm1176_initfn }, { .name = "arm11mpcore", .initfn = arm11mpcore_initfn }, { .name = "cortex-m3", .initfn = cortex_m3_initfn }, + { .name = "cortex-r4", .initfn = cortex_r4_initfn }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, { .name = "cortex-a15", .initfn = cortex_a15_initfn },
Glue "cortex-r4" to r1p4, the latest available TRM. Set MPU and Thumb division feature bit. Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- target-arm/cpu.c | 24 ++++++++++++++++++++++++ 1 Datei geändert, 24 Zeilen hinzugefügt(+)